diff --git a/drivers/mipi_dsi/dsi_mcux.c b/drivers/mipi_dsi/dsi_mcux.c
index f0eceb4697e..0093a2467a0 100644
--- a/drivers/mipi_dsi/dsi_mcux.c
+++ b/drivers/mipi_dsi/dsi_mcux.c
@@ -39,6 +39,9 @@ LOG_MODULE_REGISTER(dsi_mcux, CONFIG_MIPI_DSI_LOG_LEVEL);
 #define DSI_DPHY_PLL_CO_MIN 0
 #define DSI_DPHY_PLL_CO_MAX 3
 
+/* MAX DSI TX payload */
+#define DSI_TX_MAX_PAYLOAD_BYTE (64U * 4U)
+
 struct display_mcux_mipi_dsi_config {
 	MIPI_DSI_Type base;
 	dsi_dpi_config_t dpi_config;
@@ -251,6 +254,14 @@ static ssize_t dsi_mcux_transfer(const struct device *dev, uint8_t channel,
 		dsi_xfer.dscCmd = msg->cmd;
 		dsi_xfer.flags = kDSI_TransferUseHighSpeed;
 		dsi_xfer.txDataType = kDSI_TxDataDcsLongWr;
+		/*
+		 * Cap transfer size. Note that we subtract six bytes here,
+		 * one for the DSC command and one to insure that
+		 * transfers are still aligned on a pixel boundary
+		 * (two or three byte pixel sizes are supported).
+		 */
+		dsi_xfer.txDataSize = MIN(dsi_xfer.txDataSize,
+					(DSI_TX_MAX_PAYLOAD_BYTE - 6));
 		break;
 	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
 		dsi_xfer.txDataType = kDSI_TxDataGenShortWrNoParam;
@@ -285,11 +296,11 @@ static ssize_t dsi_mcux_transfer(const struct device *dev, uint8_t channel,
 
 	if (msg->rx_len != 0) {
 		/* Return rx_len on a read */
-		return msg->rx_len;
+		return dsi_xfer.rxDataSize;
 	}
 
 	/* Return tx_len on a write */
-	return msg->tx_len;
+	return dsi_xfer.txDataSize;
 
 }