tests: kernel: interrupt: Add nested interrupt test for ARM GIC
This commit adds the nested interrupt testing support for the ARM Generic Interrupt Controller (GIC). Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
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2 changed files with 43 additions and 2 deletions
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@ -60,6 +60,24 @@ static inline void trigger_irq(int irq)
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#endif
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}
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#elif defined(CONFIG_GIC)
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#include <drivers/interrupt_controller/gic.h>
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static inline void trigger_irq(int irq)
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{
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printk("Triggering irq : %d\n", irq);
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/* Ensure that the specified IRQ number is a valid SGI interrupt ID */
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zassert_true(irq <= 15, "%u is not a valid SGI interrupt ID", irq);
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/*
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* Generate a software generated interrupt and forward it to the
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* requesting CPU.
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*/
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sys_write32(GICD_SGIR_TGTFILT_REQONLY | GICD_SGIR_SGIINTID(irq),
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GICD_SGIR);
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}
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#elif defined(CONFIG_CPU_ARCV2)
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static inline void trigger_irq(int irq)
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{
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@ -8,6 +8,19 @@
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#include <ztest.h>
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#include "interrupt_util.h"
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/*
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* Run the nested interrupt test for the supported platforms only.
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*
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* NOTE: Cortex-A and Cortex-R platforms with the ARM GIC are skipped because
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* the arch port for these architectures do not support interrupt
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* nesting yet.
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*/
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#if defined(CONFIG_CPU_CORTEX_M) || defined(CONFIG_CPU_ARCV2) || \
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(defined(CONFIG_GIC) && !defined(CONFIG_CPU_CORTEX_A) && \
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!defined(CONFIG_CPU_CORTEX_R))
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#define TEST_NESTED_ISR
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#endif
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#define DURATION 5
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#define ISR0_TOKEN 0xDEADBEEF
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@ -29,6 +42,16 @@
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* The IRQ priorities start at 1 because the priority 0 is reserved for the
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* SVCall exception and Zero-Latency IRQs (see `_EXCEPTION_RESERVED_PRIO`).
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*/
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#define IRQ0_PRIO 2
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#define IRQ1_PRIO 1
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#elif defined(CONFIG_GIC)
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/*
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* For the platforms that use the ARM GIC, use the SGI (software generated
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* interrupt) lines 14 and 15 for testing.
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*/
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#define IRQ0_LINE 14
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#define IRQ1_LINE 15
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#define IRQ0_PRIO 2
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#define IRQ1_PRIO 1
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#else
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@ -43,7 +66,7 @@
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#define IRQ1_PRIO 0
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#endif
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#ifndef NO_TRIGGER_FROM_SW
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#ifdef TEST_NESTED_ISR
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static u32_t irq_line_0;
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static u32_t irq_line_1;
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@ -133,4 +156,4 @@ void test_nested_isr(void)
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{
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ztest_test_skip();
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}
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#endif /* NO_TRIGGER_FROM_SW */
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#endif /* TEST_NESTED_ISR */
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