boards: enable mdb runner for arc boards

* current supported boards:
   * emsk, iotdk, nsim, emsdp, hsdk.
* for the unsupported future boards, pls take a
  reference of supported boards' board.cmake.
* mdb runner is required and the default runner for SMP
  case, e.g., HSDK and nsim_hs_smp.
* other ARC boards can also choose to use mdb by
  setting runner as mdb, e.g. west flash --runner mdb.
* with mdb runner, user can make a debug through mdb gui
* with arc_nsim or opencod runner (default runner), user
  can make a debug through gdb cmdline.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>

boards/arc/em_starterkit/board.cmake

@@ -1,4 +1,6 @@
 # SPDX-License-Identifier: Apache-2.0
 
 board_runner_args(openocd "--use-elf")
+board_runner_args(mdb "--jtag=digilent")
 include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/mdb.board.cmake)

boards/arc/emsdp/board.cmake

@@ -1,4 +1,6 @@
 # SPDX-License-Identifier: Apache-2.0
 
 board_runner_args(openocd "--use-elf")
+board_runner_args(mdb "--jtag=digilent")
 include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/mdb.board.cmake)

boards/arc/hsdk/board.cmake

@@ -1,4 +1,6 @@
 # SPDX-License-Identifier: Apache-2.0
 
 board_runner_args(openocd "--use-elf")
+board_runner_args(mdb "--jtag=digilent" "--cores=4")
 include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/mdb.board.cmake)

boards/arc/iotdk/board.cmake

@@ -1,4 +1,6 @@
 # SPDX-License-Identifier: Apache-2.0
 
 board_runner_args(openocd "--use-elf")
+board_runner_args(mdb "--jtag=digilent")
 include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/mdb.board.cmake)

boards/arc/nsim/board.cmake

@@ -6,17 +6,23 @@ else()
 set(EMU_PLATFORM nsim)
 endif()
 
-if(NOT ${CONFIG_SOC_NSIM_HS_SMP})
+if(NOT CONFIG_SOC_NSIM_HS_SMP)
 board_set_flasher_ifnset(arc-nsim)
 board_set_debugger_ifnset(arc-nsim)
 endif()
 
 if(${CONFIG_SOC_NSIM_EM})
 board_runner_args(arc-nsim "--props=nsim_em.props")
+board_runner_args(mdb "--nsim_args=mdb_em.args")
 elseif(${CONFIG_SOC_NSIM_SEM})
 board_runner_args(arc-nsim "--props=nsim_sem.props")
+board_runner_args(mdb "--nsim_args=mdb_sem.args")
 elseif(${CONFIG_SOC_NSIM_HS})
 board_runner_args(arc-nsim "--props=nsim_hs.props")
+board_runner_args(mdb "--nsim_args=mdb_hs.args")
+elseif(${CONFIG_SOC_NSIM_HS_SMP})
+board_runner_args(mdb "--cores=2" "--nsim_args=mdb_hs_smp.args")
 endif()
 
 board_finalize_runner_args(arc-nsim)
+include(${ZEPHYR_BASE}/boards/common/mdb.board.cmake)

boards/arc/nsim/support/mdb_em.args

@@ -0,0 +1,63 @@
+	-arcv2em
+	-core3
+	-rgf_num_banks=2
+	-rgf_banked_regs=32
+	-rgf_num_wr_ports=2
+	-Xcode_density
+	-Xdiv_rem=radix2
+	-turbo_boost
+	-Xswap
+	-Xbitscan
+	-Xmpy_option=mpyd
+	-mpu
+	-mpu_regions=16
+	-Xshift_assist
+	-Xbarrel_shifter
+	-Xdsp2
+	-Xdsp_complex
+	-Xdsp_divsqrt=radix2
+	-Xdsp_itu
+	-Xdsp_accshift=full
+	-Xagu_large
+	-Xagu_wb_depth=4
+	-Xagu_accord
+	-Xxy
+	-Xxy_config=dccm_y
+	-Xxy_size=8K
+	-Xxy_interleave
+	-Xxy_y_base=0xe0000000
+	-Xfpus_div
+	-Xfpu_mac
+	-Xfpuda
+	-Xfpus_mpy_slow
+	-Xfpus_div_slow
+	-Xtimer0
+	-Xtimer0_level=1
+	-Xtimer1
+	-Xtimer1_level=0
+	-action_points=2
+	-Xstack_check
+	-dmp_peripheral
+	-smart_stack_entries=8
+	-interrupts=20
+	-interrupt_priorities=4
+	-ext_interrupts=16
+	-firq
+	-interrupt_base=0x0
+	-dcache=16384,32,2,a
+	-dcache_feature=2
+	-icache=16384,32,2,a
+	-icache_feature=2
+	-dccm_size=0x80000
+	-dccm_base=0x80000000
+	-dccm_interleave
+	-iccm0_size=0x80000
+	-iccm0_base=0x00000000
+	-Xpct_counters=8
+	-dmac
+	-dmac_channels=2
+	-dmac_registers=0
+	-dmac_fifo_depth=2
+	-dmac_int_config=single_internal
+	-prop=nsim_mem-dev=uart0,base=0xf0000000,irq=24
+	-noprofile

boards/arc/nsim/support/mdb_hs.args

@@ -0,0 +1,43 @@
+	-arcv2hs
+	-core2
+	-arcnum=3
+	-rgf_num_banks=2
+	-rgf_banked_regs=32
+	-rgf_num_wr_ports=2
+	-Xatomic
+	-Xll64
+	-Xunaligned
+	-Xcode_density
+	-Xdiv_rem=radix4
+	-Xswap
+	-Xbitscan
+	-Xmpy_option=qmpyh
+	-Xshift_assist
+	-Xbarrel_shifter
+	-Xfpud_div
+	-Xfpu_mac
+	-Xtimer0
+	-Xtimer0_level=1
+	-Xtimer1
+	-Xtimer1_level=0
+	-Xrtc
+	-action_points=8
+	-Xstack_check
+	-interrupts=72
+	-interrupt_priorities=2
+	-ext_interrupts=70
+	-firq
+	-interrupt_base=0x0
+	-dcache=65536,64,2,a
+	-dcache_feature=2
+	-dcache_uncached_region
+	-dcache_mem_cycles=2
+	-icache=65536,64,4,a
+	-icache_feature=2
+	-dccm_size=0x40000
+	-dccm_base=0x80000000
+	-dccm_mem_cycles=2
+	-iccm0_size=0x40000
+	-iccm0_base=0x70000000
+	-prop=nsim_mem-dev=uart0,base=0xf0000000,irq=24
+	-noprofile

boards/arc/nsim/support/mdb_sem.args

@@ -0,0 +1,54 @@
+	-arcv2em
+	-core3
+	-rgf_num_banks=1
+	-rgf_num_wr_ports=1
+	-Xcode_density
+	-Xdiv_rem=radix2
+	-turbo_boost
+	-Xswap
+	-Xbitscan
+	-Xmpy_option=mpyd
+	-Xshift_assist
+	-Xbarrel_shifter
+	-Xdsp2
+	-Xdsp_complex
+	-Xdsp_divsqrt=radix2
+	-Xdsp_accshift=limited
+	-Xtimer0
+	-Xtimer0_level=1
+	-Xtimer1
+	-Xtimer1_level=0
+	-Xsec_timer0
+	-Xsec_timer0_level=1
+	-action_points=2
+	-Xstack_check
+	-smart_stack_entries=8
+	-mpuv4
+	-mpu_sid
+	-mpu_regions=16
+	-interrupts=22
+	-interrupt_priorities=4
+	-ext_interrupts=17
+	-interrupt_base=0x0
+	-sec_interrupt_base=0x0
+	-dcache=16384,32,2,a
+	-dcache_feature=2
+	-icache=16384,32,2,a
+	-icache_feature=2
+	-dccm_size=0x80000
+	-dccm_base=0x80000000
+	-dccm_interleave
+	-iccm0_size=0x80000
+	-iccm0_base=0x00000000
+	-esp_encrypt
+	-Xsec_modes
+	-iccm0_sec_lvl=NS
+	-dccm_sec_lvl=NS
+	-Xpct_counters=8
+	-dmac
+	-dmac_channels=2
+	-dmac_registers=0
+	-dmac_fifo_depth=2
+	-dmac_int_config=single_internal
+	-prop=nsim_mem-dev=uart0,base=0xf0000000,irq=24
+	-noprofile

boards/common/mdb.board.cmake

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: Apache-2.0
+
+board_set_flasher_ifnset(mdb)
+board_set_debugger_ifnset(mdb)
+board_finalize_runner_args(mdb)