dts/stm32: add clock property to spi nodes

For test purpose, add clocks property to (some) spi nodes

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2018-06-22 13:54:24 +02:00 committed by Kumar Gala
commit 9b046ec08a
21 changed files with 28 additions and 1 deletions

View file

@ -155,6 +155,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00001000>;
interrupts = <25 3>;
status = "disabled";
label = "SPI_1";

View file

@ -13,6 +13,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <26 3>;
status = "disabled";
label = "SPI_2";

View file

@ -13,6 +13,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <26 3>;
status = "disabled";
label = "SPI_2";

View file

@ -13,6 +13,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <26 3>;
status = "disabled";
label = "SPI_2";

View file

@ -40,6 +40,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <26 3>;
status = "disabled";
label = "SPI_2";

View file

@ -28,6 +28,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <26 3>;
status = "disabled";
label = "SPI_2";

View file

@ -152,6 +152,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>;
interrupts = <35 5>;
status = "disabled";
label = "SPI_1";

View file

@ -19,6 +19,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <36 5>;
status = "disabled";
label = "SPI_2";

View file

@ -70,6 +70,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003C00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
interrupts = <51 5>;
status = "disabled";
};

View file

@ -150,6 +150,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>;
interrupts = <35 5>;
status = "disabled";
label = "SPI_1";

View file

@ -30,6 +30,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <36 5>;
status = "disabled";
label = "SPI_2";

View file

@ -25,6 +25,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <36 5>;
status = "disabled";
label = "SPI_2";
@ -35,6 +36,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003C00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
interrupts = <51 5>;
status = "disabled";
label = "SPI_3";

View file

@ -186,6 +186,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>;
interrupts = <35 5>;
status = "disabled";
label = "SPI_1";

View file

@ -13,6 +13,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <36 5>;
status = "disabled";
label = "SPI_2";
@ -23,6 +24,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003C00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
interrupts = <51 5>;
status = "disabled";
label = "SPI_3";

View file

@ -152,6 +152,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>;
interrupts = <25 3>;
status = "disabled";
label = "SPI_1";

View file

@ -25,6 +25,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <26 3>;
status = "disabled";
label = "SPI_2";

View file

@ -49,6 +49,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <26 3>;
status = "disabled";
label = "SPI_2";

View file

@ -37,6 +37,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <26 3>;
status = "disabled";
label = "SPI_2";

View file

@ -166,6 +166,7 @@
#size-cells = <0>;
reg = <0x40013000 0x400>;
interrupts = <35 5>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>;
status = "disabled";
label = "SPI_1";
};
@ -175,6 +176,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <36 5>;
status = "disabled";
label = "SPI_2";

View file

@ -94,6 +94,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003C00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
interrupts = <51 5>;
status = "disabled";
label = "SPI_3";

View file

@ -28,7 +28,11 @@ properties:
category: required
description: Human readable string describing the device (used by Zephyr for API name)
generation: define
clocks:
type: array
category: required
description: Clock gate information
generation: define
cs-gpios:
type: compound
category: optional