arch/x86: rework z_arch_irq_lock() and z_arch_irq_unlock()
Simplified these two inline functions somewhat, and refactored them: unlocking can be shared between subarches, but locking cannot. Signed-off-by: Charles E. Youse <charles.youse@intel.com>
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3 changed files with 45 additions and 81 deletions
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@ -316,57 +316,6 @@ struct _x86_syscall_stack_frame {
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u32_t ss;
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};
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/**
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*
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* @internal
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*
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* @brief Disable all interrupts on the CPU
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*
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* GCC assembly internals of irq_lock(). See irq_lock() for a complete
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* description.
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*
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* @return An architecture-dependent lock-out key representing the
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* "interrupt disable state" prior to the call.
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*/
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static ALWAYS_INLINE unsigned int _do_irq_lock(void)
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{
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unsigned int key;
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__asm__ volatile (
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"pushfl;\n\t"
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"cli;\n\t"
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"popl %0;\n\t"
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: "=g" (key)
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:
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: "memory"
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);
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return key;
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}
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/**
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*
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* @internal
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*
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* @brief Enable all interrupts on the CPU (inline)
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*
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* GCC assembly internals of irq_lock_unlock(). See irq_lock_unlock() for a
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* complete description.
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*
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* @return N/A
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*/
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static ALWAYS_INLINE void z_do_irq_unlock(void)
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{
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__asm__ volatile (
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"sti;\n\t"
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: : : "memory"
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);
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}
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/**
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*
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* @brief Get a 32 bit CPU timestamp counter
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@ -418,35 +367,21 @@ static ALWAYS_INLINE
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static ALWAYS_INLINE unsigned int z_arch_irq_lock(void)
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{
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unsigned int key = _do_irq_lock();
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unsigned int key;
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__asm__ volatile (
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"pushfl;\n\t"
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"cli;\n\t"
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"popl %0;\n\t"
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: "=g" (key)
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:
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: "memory"
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);
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return key;
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}
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/**
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*
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* @brief Enable all interrupts on the CPU (inline)
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*
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* This routine re-enables interrupts on the CPU. The @a key parameter
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* is an architecture-dependent lock-out key that is returned by a previous
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* invocation of irq_lock().
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*
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* This routine can be called from either interrupt or thread level.
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*
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* @return N/A
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*
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*/
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static ALWAYS_INLINE void z_arch_irq_unlock(unsigned int key)
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{
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if ((key & 0x200U) == 0U) {
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return;
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}
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z_do_irq_unlock();
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}
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/**
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* The NANO_SOFT_IRQ macro must be used as the value for the @a irq parameter
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* to NANO_CPU_INT_REGISTER when connecting to an interrupt that does not
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