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toolchain: add support for iamcu toolchain

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See
https://groups.google.com/forum/#!topic/ia32-abi/cn7TM6J_TIg

for more details.

• Support IA32 without FPU.
• Minimum ISA: Pentium ISA without x87 FPU instructions.
• Don't allow mixing i386 object files with Intel MCU object files.
• Support floating point with software emulation:
     a. Long double is the same as double.
     b. Use __float80 for 80-bit double.
• Minimize memory footprint:
     a. Code size
     b. Data size
     c. Stack size

Here is the draft of Intel MCU psABI.   The differences from IA32
 psABI are

1. The minimum instruction set is Intel Pentium ISA minus instructions
for x87 floating point unit.
2. There are no x87 floating point registers.
3. There are no vector registers.
4. Segment registers are optional.
5. Support for TLS relocations are optional.
6. Scalar types larger than 4 bytes are aligned to 4 bytes.
7. There are no vector types.
8. _Decimal32, _Decimal64, and _Decimal128 types are optional.
9. long double type is the same as double.
10. float, double and long double types are passed and returned in
 general purpose registers.
11. _Decimal32 and _Decimal64 types are passed in general purpose
registers.
12. Aggregate types no larger than 8 bytes are passed and returned
in general purpose registers.
13. Stack is 4-byte aligned.
14. The auxiliary vector support is optional.
15. Register %edx has undefined value at process entry.
16. New ELF machine code: EM_IAMCU.
17. New predefined C/C++ pre-processor symbols: __iamcu and __iamcu__

Change-Id: I6a0c45ad22d8f710b6f37a041aaa2fc1bf0b1c39
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2015-06-19 23:37:23 -04:00
commit 9aeb08213f
4 changed files with 31 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

2
Makefile
View file

@ -631,7 +631,7 @@ endif
endif
KBUILD_CFLAGS += $(stackp-flag)
export x86_FLAGS arm_FLAGS arc_FLAGS LDFLAG_LINKERCMD
export x86_FLAGS arm_FLAGS arc_FLAGS LDFLAG_LINKERCMD OUTPUT_FORMAT OUTPUT_ARCH
ARCHFLAGS = $($(SRCARCH)_FLAGS)

5
include/linker-tool-gcc.h
View file

@ -44,9 +44,14 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
#elif defined(CONFIG_ARC)
OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc")
#else
#if defined(__IAMCU)
OUTPUT_FORMAT("elf32-iamcu")
OUTPUT_ARCH(iamcu:intel)
#else
OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)
#endif
#endif
/*
* The GROUP_START() and GROUP_END() macros are used to define a group

21
scripts/Makefile.toolchain.iamcu Normal file
View file

@ -0,0 +1,21 @@
ifndef IAMCU_TOOLCHAIN_PATH
$(error IAMCU_TOOLCHAIN_PATH is not set)
endif
CROSS_COMPILE_TARGET_x86 = i586-intel-elfiamcu
CROSS_COMPILE_x86_version = 4.9.3
CROSS_COMPILE_x86=${IAMCU_TOOLCHAIN_PATH}/bin/${CROSS_COMPILE_TARGET_x86}-
CROSS_COMPILE= $(CROSS_COMPILE_$(ARCH))
LIB_INCLUDE_DIR_x86 = -L $(IAMCU_TOOLCHAIN_PATH)/lib/gcc/$(CROSS_COMPILE_TARGET_x86)/$(CROSS_COMPILE_x86_version)
LIB_INCLUDE_DIR = $(LIB_INCLUDE_DIR_$(ARCH))
TOOLCHAIN_LIBS = gcc
LD_TOOLCHAIN ?= -D__GCC_LINKER_CMD__ -D__IAMCU
OUTPUT_FORMAT = elf32-iamcu
OUTPUT_ARCH = iamcu:intel
export CROSS_COMPILE TOOLCHAIN_LIBS LIB_INCLUDE_DIR

6
scripts/link-zephyr.sh
View file

@ -76,9 +76,11 @@ initial_link()
# ${2} output file (staticIdt.o)
gen_idt()
{
${OBJCOPY} -I elf32-i386 -O binary -j intList ${1} isrList.bin
test -z $OUTPUT_FORMAT && OUTPUT_FORMAT=elf32-i386
test -z $OUTPUT_ARCH && OUTPUT_ARCH=i386
${OBJCOPY} -I $OUTPUT_FORMAT -O binary -j intList ${1} isrList.bin
${GENIDT} -i isrList.bin -n ${CONFIG_IDT_NUM_VECTORS:-256} -o staticIdt.bin
${OBJCOPY} -I binary -B i386 -O elf32-i386 --rename-section .data=staticIdt staticIdt.bin ${2}
${OBJCOPY} -I binary -B $OUTPUT_ARCH -O $OUTPUT_FORMAT --rename-section .data=staticIdt staticIdt.bin ${2}
rm -f staticIdt.bin
rm -f isrList.bin
}