From 9970d21348c40c900578d0aab91913ac80c8dba7 Mon Sep 17 00:00:00 2001 From: Tien Nguyen Date: Wed, 7 May 2025 09:57:40 +0700 Subject: [PATCH] soc: renesas: Add initial support for Renesas RZ/V2H Add initial support for Renesas RZ/V2H Signed-off-by: Tien Nguyen Signed-off-by: Quang Le --- soc/renesas/rz/rzv2h/CMakeLists.txt | 10 +++++++ soc/renesas/rz/rzv2h/Kconfig | 12 +++++++++ soc/renesas/rz/rzv2h/Kconfig.defconfig | 8 ++++++ .../rz/rzv2h/Kconfig.defconfig.rzv2h_cm33 | 24 +++++++++++++++++ soc/renesas/rz/rzv2h/Kconfig.soc | 26 +++++++++++++++++++ soc/renesas/rz/rzv2h/cm33/soc.c | 21 +++++++++++++++ soc/renesas/rz/rzv2h/cm33/soc.h | 12 +++++++++ soc/renesas/rz/rzv2h/pinctrl_soc.h | 11 ++++++++ soc/renesas/rz/soc.yml | 5 ++++ 9 files changed, 129 insertions(+) create mode 100644 soc/renesas/rz/rzv2h/CMakeLists.txt create mode 100644 soc/renesas/rz/rzv2h/Kconfig create mode 100644 soc/renesas/rz/rzv2h/Kconfig.defconfig create mode 100644 soc/renesas/rz/rzv2h/Kconfig.defconfig.rzv2h_cm33 create mode 100644 soc/renesas/rz/rzv2h/Kconfig.soc create mode 100644 soc/renesas/rz/rzv2h/cm33/soc.c create mode 100644 soc/renesas/rz/rzv2h/cm33/soc.h create mode 100644 soc/renesas/rz/rzv2h/pinctrl_soc.h diff --git a/soc/renesas/rz/rzv2h/CMakeLists.txt b/soc/renesas/rz/rzv2h/CMakeLists.txt new file mode 100644 index 00000000000..b73f91a583d --- /dev/null +++ b/soc/renesas/rz/rzv2h/CMakeLists.txt @@ -0,0 +1,10 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +zephyr_include_directories(.) + +if(CONFIG_SOC_R9A09G057H44GBG_CM33) + zephyr_include_directories(cm33) + zephyr_sources(cm33/soc.c) + set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "") +endif() diff --git a/soc/renesas/rz/rzv2h/Kconfig b/soc/renesas/rz/rzv2h/Kconfig new file mode 100644 index 00000000000..4f92146a023 --- /dev/null +++ b/soc/renesas/rz/rzv2h/Kconfig @@ -0,0 +1,12 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +config SOC_R9A09G057H44GBG_CM33 + select ARM + select CPU_CORTEX_M33 + select CPU_HAS_ARM_MPU + select HAS_RENESAS_RZ_FSP + select CPU_CORTEX_M_HAS_DWT + select SOC_EARLY_INIT_HOOK + select CPU_HAS_FPU + select ARMV8_M_DSP diff --git a/soc/renesas/rz/rzv2h/Kconfig.defconfig b/soc/renesas/rz/rzv2h/Kconfig.defconfig new file mode 100644 index 00000000000..3e64f46cb37 --- /dev/null +++ b/soc/renesas/rz/rzv2h/Kconfig.defconfig @@ -0,0 +1,8 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_RZV2H + +rsource "Kconfig.defconfig.*" + +endif # SOC_SERIES_RZV2H diff --git a/soc/renesas/rz/rzv2h/Kconfig.defconfig.rzv2h_cm33 b/soc/renesas/rz/rzv2h/Kconfig.defconfig.rzv2h_cm33 new file mode 100644 index 00000000000..119d0b0d920 --- /dev/null +++ b/soc/renesas/rz/rzv2h/Kconfig.defconfig.rzv2h_cm33 @@ -0,0 +1,24 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +if SOC_R9A09G057H44GBG_CM33 + +config NUM_IRQS + default 480 + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency) + +config FLASH_SIZE + default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K) + +config FLASH_BASE_ADDRESS + default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH)) + +config SYS_CLOCK_EXISTS + default y + +config INIT_ARCH_HW_AT_BOOT + default y + +endif # SOC_R9A09G057H44GBG_CM33 diff --git a/soc/renesas/rz/rzv2h/Kconfig.soc b/soc/renesas/rz/rzv2h/Kconfig.soc new file mode 100644 index 00000000000..d3f32a5c785 --- /dev/null +++ b/soc/renesas/rz/rzv2h/Kconfig.soc @@ -0,0 +1,26 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_RZV2H + bool + select SOC_FAMILY_RENESAS_RZ + help + Renesas RZ/V2H series + +config SOC_SERIES + default "rzv2h" if SOC_SERIES_RZV2H + +config SOC_R9A09G057H44GBG + bool + select SOC_SERIES_RZV2H + help + R9A09G057H44GBG + +config SOC_R9A09G057H44GBG_CM33 + bool + select SOC_R9A09G057H44GBG + help + RZ/V2H CM33 + +config SOC + default "r9a09g057h44gbg" if SOC_R9A09G057H44GBG diff --git a/soc/renesas/rz/rzv2h/cm33/soc.c b/soc/renesas/rz/rzv2h/cm33/soc.c new file mode 100644 index 00000000000..7a643926060 --- /dev/null +++ b/soc/renesas/rz/rzv2h/cm33/soc.c @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief System/hardware module for Renesas RZ/V2H Group + */ + +#include +#include + +/* System core clock is set to 200 MHz after reset */ +uint32_t SystemCoreClock = 200000000; + +void soc_early_init_hook(void) +{ + bsp_clock_init(); +} diff --git a/soc/renesas/rz/rzv2h/cm33/soc.h b/soc/renesas/rz/rzv2h/cm33/soc.h new file mode 100644 index 00000000000..57d7cbbb53e --- /dev/null +++ b/soc/renesas/rz/rzv2h/cm33/soc.h @@ -0,0 +1,12 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_SOC_RENESAS_RZV2H_SOC_H_ +#define ZEPHYR_SOC_RENESAS_RZV2H_SOC_H_ + +#include + +#endif /* ZEPHYR_SOC_RENESAS_RZV2H_SOC_H_ */ diff --git a/soc/renesas/rz/rzv2h/pinctrl_soc.h b/soc/renesas/rz/rzv2h/pinctrl_soc.h new file mode 100644 index 00000000000..d7eb2f9b516 --- /dev/null +++ b/soc/renesas/rz/rzv2h/pinctrl_soc.h @@ -0,0 +1,11 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_SOC_RENESAS_RZ_RZV2H_PINCTRL_SOC_H_ +#define ZEPHYR_SOC_RENESAS_RZ_RZV2H_PINCTRL_SOC_H_ + +#include + +#endif /* ZEPHYR_SOC_RENESAS_RZ_RZV2H_PINCTRL_SOC_H_ */ diff --git a/soc/renesas/rz/soc.yml b/soc/renesas/rz/soc.yml index 57681f2cab3..a4b5ff8891a 100644 --- a/soc/renesas/rz/soc.yml +++ b/soc/renesas/rz/soc.yml @@ -25,6 +25,11 @@ family: - name: r9a07g054l23gbg cpuclusters: - name: cm33 + - name: rzv2h + socs: + - name: r9a09g057h44gbg + cpuclusters: + - name: cm33 - name: rzn2l socs: - name: r9a07g084m04gbg