From 99235d651614483a1a1f9823c9ecf87aa1275d0b Mon Sep 17 00:00:00 2001 From: Krystof Sadlik Date: Thu, 8 Aug 2024 09:45:36 +0200 Subject: [PATCH] boards: mimxrt1040_evk: Added pinctrl for fxls8974 Added fxls8974 pinctrl to the dts file Signed-off-by: Krystof Sadlik --- .../mimxrt1040_evk-pinctrl.dtsi | 6 +++--- boards/nxp/mimxrt1040_evk/mimxrt1040_evk.dts | 19 +++++++++++++++++-- 2 files changed, 20 insertions(+), 5 deletions(-) diff --git a/boards/nxp/mimxrt1040_evk/mimxrt1040_evk-pinctrl.dtsi b/boards/nxp/mimxrt1040_evk/mimxrt1040_evk-pinctrl.dtsi index 27b025a428b..4ff94aa892d 100644 --- a/boards/nxp/mimxrt1040_evk/mimxrt1040_evk-pinctrl.dtsi +++ b/boards/nxp/mimxrt1040_evk/mimxrt1040_evk-pinctrl.dtsi @@ -43,11 +43,11 @@ }; }; - /* Conflicts with lpspi1 pin routing. SDA: J17 pin 3, SCL: J17 pin 6 */ + /* LPI2C3 SDA: J33 pin 6, LPI2C3 SCL: J33 pin 5 */ pinmux_lpi2c3: pinmux_lpi2c3 { group0 { - pinmux = <&iomuxc_gpio_sd_b0_00_lpi2c3_scl>, - <&iomuxc_gpio_sd_b0_01_lpi2c3_sda>; + pinmux = <&iomuxc_gpio_ad_b1_06_lpi2c3_sda>, + <&iomuxc_gpio_ad_b1_07_lpi2c3_scl>; drive-strength = "r0-6"; slew-rate = "slow"; nxp,speed = "100-mhz"; diff --git a/boards/nxp/mimxrt1040_evk/mimxrt1040_evk.dts b/boards/nxp/mimxrt1040_evk/mimxrt1040_evk.dts index 9b0be26ba1b..e506ce1e995 100644 --- a/boards/nxp/mimxrt1040_evk/mimxrt1040_evk.dts +++ b/boards/nxp/mimxrt1040_evk/mimxrt1040_evk.dts @@ -18,6 +18,7 @@ led0 = &green_led; sw0 = &user_button; pwm-0 = &flexpwm1_pwm3; + accel0 = &fxls8974; }; chosen { @@ -198,10 +199,24 @@ zephyr_lcdif: &lcdif { pinctrl-names = "default"; }; -/* Leave LPI2C3 disabled by default, since it conflicts with LPSPI1 pins */ -&lpi2c3 { +lpi2c3: &lpi2c3 { pinctrl-0 = <&pinmux_lpi2c3>; pinctrl-names = "default"; + status = "okay"; + + fxls8974: fxls8974@18 { + compatible = "nxp,fxls8974"; + reg = <0x18>; + status = "okay"; + + /* Two zero ohm resistors (R115 and R122) isolate sensor + * interrupt gpios from the soc and are unpopulated by default. + * Note that if you populate them, they conflict with JTAG_TDO and + * ethernet PHY interrupt signals. + * int1-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + * int2-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; + */ + }; }; /* GPT and Systick are enabled. If power management is enabled, the GPT