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drivers: all: mcux: remove conditional support for pinctrl

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The MCUX platform always uses pinctrl, there's no need to keep extra
macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL` (note that some already did).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2023-04-19 16:41:53 +02:00 • committed by Carles Cufí
commit 989d103d53
30 changed files with 47 additions and 291 deletions
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18
drivers/adc/adc_mcux_lpadc.c
View file

@ -14,9 +14,7 @@
#include <zephyr/drivers/adc.h> #include <zephyr/drivers/adc.h>
#include <fsl_lpadc.h> #include <fsl_lpadc.h>
#if CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif
#if !defined(CONFIG_SOC_SERIES_IMX_RT11XX) #if !defined(CONFIG_SOC_SERIES_IMX_RT11XX)
#include <fsl_power.h> #include <fsl_power.h>
@ -58,9 +56,7 @@ struct mcux_lpadc_config {
uint32_t offset_a; uint32_t offset_a;
uint32_t offset_b; uint32_t offset_b;
void (*irq_config_func)(const struct device *dev); void (*irq_config_func)(const struct device *dev);
#if CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif
}; };
struct mcux_lpadc_data { struct mcux_lpadc_data {
@ -403,14 +399,12 @@ static int mcux_lpadc_init(const struct device *dev)
struct mcux_lpadc_data *data = dev->data; struct mcux_lpadc_data *data = dev->data;
ADC_Type *base = config->base; ADC_Type *base = config->base;
lpadc_config_t adc_config; lpadc_config_t adc_config;
#ifdef CONFIG_PINCTRL
int err; int err;
err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (err) { if (err) {
return err; return err;
} }
#endif
#if !defined(CONFIG_SOC_SERIES_IMX_RT11XX) #if !defined(CONFIG_SOC_SERIES_IMX_RT11XX)
#if defined(CONFIG_SOC_SERIES_IMX_RT6XX) #if defined(CONFIG_SOC_SERIES_IMX_RT6XX)
@ -556,14 +550,6 @@ static const struct adc_driver_api mcux_lpadc_driver_api = {
#define TO_LPADC_POWER_LEVEL(val) \ #define TO_LPADC_POWER_LEVEL(val) \
_DO_CONCAT(kLPADC_PowerLevelAlt, val) _DO_CONCAT(kLPADC_PowerLevelAlt, val)
#if CONFIG_PINCTRL
#define PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n);
#define PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#else
#define PINCTRL_DEFINE(n)
#define PINCTRL_INIT(n)
#endif /* CONFIG_PINCTRL */
#define LPADC_MCUX_INIT(n) \ #define LPADC_MCUX_INIT(n) \
static void mcux_lpadc_config_func_##n(const struct device *dev); \ static void mcux_lpadc_config_func_##n(const struct device *dev); \
\ \
@ -578,7 +564,7 @@ static const struct adc_driver_api mcux_lpadc_driver_api = {
"Invalid conversion average number for auto-calibration time"); \ "Invalid conversion average number for auto-calibration time"); \
ASSERT_WITHIN_RANGE(DT_INST_PROP(n, power_level), 1, 4, \ ASSERT_WITHIN_RANGE(DT_INST_PROP(n, power_level), 1, 4, \
"Invalid power level"); \ "Invalid power level"); \
PINCTRL_DEFINE(n) \ PINCTRL_DT_INST_DEFINE(n); \
static const struct mcux_lpadc_config mcux_lpadc_config_##n = { \ static const struct mcux_lpadc_config mcux_lpadc_config_##n = { \
.base = (ADC_Type *)DT_INST_REG_ADDR(n), \ .base = (ADC_Type *)DT_INST_REG_ADDR(n), \
.clock_source = TO_LPADC_CLOCK_SOURCE(DT_INST_PROP(n, clk_source)), \ .clock_source = TO_LPADC_CLOCK_SOURCE(DT_INST_PROP(n, clk_source)), \
@ -591,7 +577,7 @@ static const struct adc_driver_api mcux_lpadc_driver_api = {
.offset_a = DT_INST_PROP(n, offset_value_a), \ .offset_a = DT_INST_PROP(n, offset_value_a), \
.offset_b = DT_INST_PROP(n, offset_value_b), \ .offset_b = DT_INST_PROP(n, offset_value_b), \
.irq_config_func = mcux_lpadc_config_func_##n, \ .irq_config_func = mcux_lpadc_config_func_##n, \
PINCTRL_INIT(n) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
}; \ }; \
\ \
static struct mcux_lpadc_data mcux_lpadc_data_##n = { \ static struct mcux_lpadc_data mcux_lpadc_data_##n = { \

2
drivers/can/Kconfig.mcux
View file

@ -8,6 +8,7 @@ config CAN_MCUX_FLEXCAN
default y default y
depends on DT_HAS_NXP_FLEXCAN_ENABLED depends on DT_HAS_NXP_FLEXCAN_ENABLED
depends on CLOCK_CONTROL depends on CLOCK_CONTROL
select PINCTRL
help help
Enable support for the NXP FlexCAN driver. Enable support for the NXP FlexCAN driver.
@ -37,5 +38,6 @@ config CAN_MCUX_MCAN
depends on DT_HAS_NXP_LPC_MCAN_ENABLED depends on DT_HAS_NXP_LPC_MCAN_ENABLED
depends on CLOCK_CONTROL depends on CLOCK_CONTROL
select CAN_MCAN select CAN_MCAN
select PINCTRL
help help
Enable support for mcux mcan driver. Enable support for mcux mcan driver.

19
drivers/can/can_mcux_flexcan.c
View file

@ -20,10 +20,7 @@
#include <fsl_flexcan.h> #include <fsl_flexcan.h>
#include <zephyr/logging/log.h> #include <zephyr/logging/log.h>
#include <zephyr/irq.h> #include <zephyr/irq.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif
LOG_MODULE_REGISTER(can_mcux_flexcan, CONFIG_CAN_LOG_LEVEL); LOG_MODULE_REGISTER(can_mcux_flexcan, CONFIG_CAN_LOG_LEVEL);
@ -107,9 +104,7 @@ struct mcux_flexcan_config {
void (*irq_disable_func)(void); void (*irq_disable_func)(void);
const struct device *phy; const struct device *phy;
uint32_t max_bitrate; uint32_t max_bitrate;
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif /* CONFIG_PINCTRL */
}; };
struct mcux_flexcan_rx_callback { struct mcux_flexcan_rx_callback {
@ -1238,12 +1233,10 @@ static int mcux_flexcan_init(const struct device *dev)
} }
#endif /* CONFIG_CAN_MCUX_FLEXCAN_FD */ #endif /* CONFIG_CAN_MCUX_FLEXCAN_FD */
#ifdef CONFIG_PINCTRL
err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (err != 0) { if (err != 0) {
return err; return err;
} }
#endif
err = mcux_flexcan_get_core_clock(dev, &clock_freq); err = mcux_flexcan_get_core_clock(dev, &clock_freq);
if (err != 0) { if (err != 0) {
@ -1434,14 +1427,6 @@ static const struct can_driver_api mcux_flexcan_fd_driver_api = {
FLEXCAN_IRQ_ENABLE_CODE(node_id, prop, idx); \ FLEXCAN_IRQ_ENABLE_CODE(node_id, prop, idx); \
} while (false); } while (false);
#ifdef CONFIG_PINCTRL
#define FLEXCAN_PINCTRL_DEFINE(id) PINCTRL_DT_INST_DEFINE(id);
#define FLEXCAN_PINCTRL_INIT(id) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(id),
#else
#define FLEXCAN_PINCTRL_DEFINE(id)
#define FLEXCAN_PINCTRL_INIT(id)
#endif /* CONFIG_PINCTRL */
#ifdef CONFIG_CAN_MCUX_FLEXCAN_FD #ifdef CONFIG_CAN_MCUX_FLEXCAN_FD
#define FLEXCAN_MAX_BITRATE(id) \ #define FLEXCAN_MAX_BITRATE(id) \
COND_CODE_1(DT_NODE_HAS_COMPAT(DT_DRV_INST(id), FLEXCAN_FD_DRV_COMPAT), \ COND_CODE_1(DT_NODE_HAS_COMPAT(DT_DRV_INST(id), FLEXCAN_FD_DRV_COMPAT), \
@ -1460,7 +1445,7 @@ static const struct can_driver_api mcux_flexcan_fd_driver_api = {
#endif /* !CONFIG_CAN_MCUX_FLEXCAN_FD */ #endif /* !CONFIG_CAN_MCUX_FLEXCAN_FD */
#define FLEXCAN_DEVICE_INIT_MCUX(id) \ #define FLEXCAN_DEVICE_INIT_MCUX(id) \
FLEXCAN_PINCTRL_DEFINE(id) \ PINCTRL_DT_INST_DEFINE(id); \
\ \
static void mcux_flexcan_irq_config_##id(const struct device *dev); \ static void mcux_flexcan_irq_config_##id(const struct device *dev); \
static void mcux_flexcan_irq_enable_##id(void); \ static void mcux_flexcan_irq_enable_##id(void); \
@ -1493,7 +1478,7 @@ static const struct can_driver_api mcux_flexcan_fd_driver_api = {
.phy = DEVICE_DT_GET_OR_NULL(DT_INST_PHANDLE(id, phys)),\ .phy = DEVICE_DT_GET_OR_NULL(DT_INST_PHANDLE(id, phys)),\
.max_bitrate = DT_INST_CAN_TRANSCEIVER_MAX_BITRATE(id, \ .max_bitrate = DT_INST_CAN_TRANSCEIVER_MAX_BITRATE(id, \
FLEXCAN_MAX_BITRATE(id)), \ FLEXCAN_MAX_BITRATE(id)), \
FLEXCAN_PINCTRL_INIT(id) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(id), \
}; \ }; \
\ \
static struct mcux_flexcan_data mcux_flexcan_data_##id; \ static struct mcux_flexcan_data mcux_flexcan_data_##id; \

18
drivers/can/can_mcux_mcan.c
View file

@ -7,9 +7,7 @@
#include <zephyr/device.h> #include <zephyr/device.h>
#include <zephyr/drivers/can.h> #include <zephyr/drivers/can.h>
#include <zephyr/drivers/clock_control.h> #include <zephyr/drivers/clock_control.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif
#include <zephyr/logging/log.h> #include <zephyr/logging/log.h>
#include <zephyr/irq.h> #include <zephyr/irq.h>
@ -23,9 +21,7 @@ struct mcux_mcan_config {
const struct device *clock_dev; const struct device *clock_dev;
clock_control_subsys_t clock_subsys; clock_control_subsys_t clock_subsys;
void (*irq_config_func)(const struct device *dev); void (*irq_config_func)(const struct device *dev);
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif
}; };
struct mcux_mcan_data { struct mcux_mcan_data {
@ -52,12 +48,10 @@ static int mcux_mcan_init(const struct device *dev)
return -ENODEV; return -ENODEV;
} }
#ifdef CONFIG_PINCTRL
err = pinctrl_apply_state(mcux_config->pincfg, PINCTRL_STATE_DEFAULT); err = pinctrl_apply_state(mcux_config->pincfg, PINCTRL_STATE_DEFAULT);
if (err) { if (err) {
return err; return err;
} }
#endif /* CONFIG_PINCTRL */
err = clock_control_on(mcux_config->clock_dev, mcux_config->clock_subsys); err = clock_control_on(mcux_config->clock_dev, mcux_config->clock_subsys);
if (err) { if (err) {
@ -142,16 +136,8 @@ static const struct can_driver_api mcux_mcan_driver_api = {
#endif /* CONFIG_CAN_FD_MODE */ #endif /* CONFIG_CAN_FD_MODE */
}; };
#ifdef CONFIG_PINCTRL
#define MCUX_MCAN_PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n)
#define MCUX_MCAN_PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#else
#define MCUX_MCAN_PINCTRL_DEFINE(n)
#define MCUX_MCAN_PINCTRL_INIT(n)
#endif
#define MCUX_MCAN_INIT(n) \ #define MCUX_MCAN_INIT(n) \
MCUX_MCAN_PINCTRL_DEFINE(n); \ PINCTRL_DT_INST_DEFINE(n); \
\ \
static void mcux_mcan_irq_config_##n(const struct device *dev); \ static void mcux_mcan_irq_config_##n(const struct device *dev); \
\ \
@ -160,7 +146,7 @@ static const struct can_driver_api mcux_mcan_driver_api = {
.clock_subsys = (clock_control_subsys_t) \ .clock_subsys = (clock_control_subsys_t) \
DT_INST_CLOCKS_CELL(n, name), \ DT_INST_CLOCKS_CELL(n, name), \
.irq_config_func = mcux_mcan_irq_config_##n, \ .irq_config_func = mcux_mcan_irq_config_##n, \
MCUX_MCAN_PINCTRL_INIT(n) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
}; \ }; \
\ \
static const struct can_mcan_config can_mcan_config_##n = \ static const struct can_mcan_config can_mcan_config_##n = \

1
drivers/gpio/Kconfig.mcux_igpio
View file

@ -8,5 +8,6 @@ config GPIO_MCUX_IGPIO
default y default y
depends on HAS_MCUX_IGPIO depends on HAS_MCUX_IGPIO
depends on DT_HAS_NXP_IMX_GPIO_ENABLED depends on DT_HAS_NXP_IMX_GPIO_ENABLED
select PINCTRL
help help
Enable the MCUX IGPIO driver. Enable the MCUX IGPIO driver.

20
drivers/gpio/gpio_mcux_igpio.c
View file

@ -14,9 +14,7 @@
#include <fsl_common.h> #include <fsl_common.h>
#include <fsl_gpio.h> #include <fsl_gpio.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif
#include <zephyr/drivers/gpio/gpio_utils.h> #include <zephyr/drivers/gpio/gpio_utils.h>
@ -29,12 +27,10 @@ struct mcux_igpio_config {
/* gpio_driver_config needs to be first */ /* gpio_driver_config needs to be first */
struct gpio_driver_config common; struct gpio_driver_config common;
GPIO_Type *base; GPIO_Type *base;
#ifdef CONFIG_PINCTRL
const struct pinctrl_soc_pinmux *pin_muxes; const struct pinctrl_soc_pinmux *pin_muxes;
const struct gpio_pin_gaps *pin_gaps; const struct gpio_pin_gaps *pin_gaps;
uint8_t mux_count; uint8_t mux_count;
uint8_t gap_count; uint8_t gap_count;
#endif
}; };
struct mcux_igpio_data { struct mcux_igpio_data {
@ -50,7 +46,6 @@ static int mcux_igpio_configure(const struct device *dev,
const struct mcux_igpio_config *config = dev->config; const struct mcux_igpio_config *config = dev->config;
GPIO_Type *base = config->base; GPIO_Type *base = config->base;
#ifdef CONFIG_PINCTRL
struct pinctrl_soc_pin pin_cfg; struct pinctrl_soc_pin pin_cfg;
int cfg_idx = pin, i; int cfg_idx = pin, i;
@ -195,16 +190,6 @@ static int mcux_igpio_configure(const struct device *dev,
/* cfg register will be set by pinctrl_configure_pins */ /* cfg register will be set by pinctrl_configure_pins */
pin_cfg.pin_ctrl_flags = reg; pin_cfg.pin_ctrl_flags = reg;
pinctrl_configure_pins(&pin_cfg, 1, PINCTRL_REG_NONE); pinctrl_configure_pins(&pin_cfg, 1, PINCTRL_REG_NONE);
#else
/* Without pinctrl, no support for GPIO flags */
if ((flags & GPIO_SINGLE_ENDED) != 0) {
return -ENOTSUP;
}
if (((flags & GPIO_PULL_UP) != 0) || ((flags & GPIO_PULL_DOWN) != 0)) {
return -ENOTSUP;
}
#endif /* CONFIG_PINCTRL */
if (((flags & GPIO_INPUT) != 0) && ((flags & GPIO_OUTPUT) != 0)) { if (((flags & GPIO_INPUT) != 0) && ((flags & GPIO_OUTPUT) != 0)) {
return -ENOTSUP; return -ENOTSUP;
@ -366,7 +351,6 @@ static const struct gpio_driver_api mcux_igpio_driver_api = {
}; };
#ifdef CONFIG_PINCTRL
/* These macros will declare an array of pinctrl_soc_pinmux types */ /* These macros will declare an array of pinctrl_soc_pinmux types */
#define PINMUX_INIT(node, prop, idx) MCUX_IMX_PINMUX(DT_PROP_BY_IDX(node, prop, idx)), #define PINMUX_INIT(node, prop, idx) MCUX_IMX_PINMUX(DT_PROP_BY_IDX(node, prop, idx)),
#define MCUX_IGPIO_PIN_DECLARE(n) \ #define MCUX_IGPIO_PIN_DECLARE(n) \
@ -380,10 +364,6 @@ static const struct gpio_driver_api mcux_igpio_driver_api = {
.pin_gaps = (const struct gpio_pin_gaps *)mcux_igpio_pin_gaps_##n, \ .pin_gaps = (const struct gpio_pin_gaps *)mcux_igpio_pin_gaps_##n, \
.mux_count = DT_PROP_LEN(DT_DRV_INST(n), pinmux), \ .mux_count = DT_PROP_LEN(DT_DRV_INST(n), pinmux), \
.gap_count = (ARRAY_SIZE(mcux_igpio_pin_gaps_##n) / 2) .gap_count = (ARRAY_SIZE(mcux_igpio_pin_gaps_##n) / 2)
#else
#define MCUX_IGPIO_PIN_DECLARE(n)
#define MCUX_IGPIO_PIN_INIT(n)
#endif /* CONFIG_PINCTRL */
#define MCUX_IGPIO_IRQ_INIT(n, i) \ #define MCUX_IGPIO_IRQ_INIT(n, i) \
do { \ do { \

2
drivers/i2c/Kconfig
View file

@ -121,6 +121,7 @@ config I2C_MCUX_FLEXCOMM
bool "MCUX FLEXCOMM I2C driver" bool "MCUX FLEXCOMM I2C driver"
default y default y
depends on DT_HAS_NXP_LPC_I2C_ENABLED depends on DT_HAS_NXP_LPC_I2C_ENABLED
select PINCTRL
help help
Enable the mcux flexcomm i2c driver. Enable the mcux flexcomm i2c driver.
@ -129,6 +130,7 @@ config I2C_MCUX_LPI2C
default y default y
depends on DT_HAS_NXP_IMX_LPI2C_ENABLED depends on DT_HAS_NXP_IMX_LPI2C_ENABLED
depends on CLOCK_CONTROL depends on CLOCK_CONTROL
select PINCTRL
help help
Enable the mcux LPI2C driver. Enable the mcux LPI2C driver.

19
drivers/i2c/i2c_mcux_flexcomm.c
View file

@ -11,9 +11,7 @@
#include <zephyr/drivers/i2c.h> #include <zephyr/drivers/i2c.h>
#include <zephyr/drivers/clock_control.h> #include <zephyr/drivers/clock_control.h>
#include <fsl_i2c.h> #include <fsl_i2c.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif
#include <zephyr/logging/log.h> #include <zephyr/logging/log.h>
#include <zephyr/irq.h> #include <zephyr/irq.h>
@ -27,9 +25,7 @@ struct mcux_flexcomm_config {
clock_control_subsys_t clock_subsys; clock_control_subsys_t clock_subsys;
void (*irq_config_func)(const struct device *dev); void (*irq_config_func)(const struct device *dev);
uint32_t bitrate; uint32_t bitrate;
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif
}; };
struct mcux_flexcomm_data { struct mcux_flexcomm_data {
@ -339,12 +335,10 @@ static int mcux_flexcomm_init(const struct device *dev)
i2c_master_config_t master_config; i2c_master_config_t master_config;
int error; int error;
#ifdef CONFIG_PINCTRL
error = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); error = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (error) { if (error) {
return error; return error;
} }
#endif
k_sem_init(&data->lock, 1, 1); k_sem_init(&data->lock, 1, 1);
k_sem_init(&data->device_sync_sem, 0, K_SEM_MAX_LIMIT); k_sem_init(&data->device_sync_sem, 0, K_SEM_MAX_LIMIT);
@ -387,17 +381,8 @@ static const struct i2c_driver_api mcux_flexcomm_driver_api = {
#endif #endif
}; };
#ifdef CONFIG_PINCTRL
#define I2C_MCUX_FLEXCOMM_PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n);
#define I2C_MCUX_FLEXCOMM_PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#else
#define I2C_MCUX_FLEXCOMM_PINCTRL_DEFINE(n)
#define I2C_MCUX_FLEXCOMM_PINCTRL_INIT(n)
#endif
#define I2C_MCUX_FLEXCOMM_DEVICE(id) \ #define I2C_MCUX_FLEXCOMM_DEVICE(id) \
I2C_MCUX_FLEXCOMM_PINCTRL_DEFINE(id) \ PINCTRL_DT_INST_DEFINE(id); \
static void mcux_flexcomm_config_func_##id(const struct device *dev); \ static void mcux_flexcomm_config_func_##id(const struct device *dev); \
static const struct mcux_flexcomm_config mcux_flexcomm_config_##id = { \ static const struct mcux_flexcomm_config mcux_flexcomm_config_##id = { \
.base = (I2C_Type *) DT_INST_REG_ADDR(id), \ .base = (I2C_Type *) DT_INST_REG_ADDR(id), \
@ -406,7 +391,7 @@ static const struct i2c_driver_api mcux_flexcomm_driver_api = {
(clock_control_subsys_t)DT_INST_CLOCKS_CELL(id, name),\ (clock_control_subsys_t)DT_INST_CLOCKS_CELL(id, name),\
.irq_config_func = mcux_flexcomm_config_func_##id, \ .irq_config_func = mcux_flexcomm_config_func_##id, \
.bitrate = DT_INST_PROP(id, clock_frequency), \ .bitrate = DT_INST_PROP(id, clock_frequency), \
I2C_MCUX_FLEXCOMM_PINCTRL_INIT(id) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(id), \
}; \ }; \
static struct mcux_flexcomm_data mcux_flexcomm_data_##id; \ static struct mcux_flexcomm_data mcux_flexcomm_data_##id; \
I2C_DEVICE_DT_INST_DEFINE(id, \ I2C_DEVICE_DT_INST_DEFINE(id, \

18
drivers/i2c/i2c_mcux_lpi2c.c
View file

@ -15,9 +15,7 @@
#include <zephyr/irq.h> #include <zephyr/irq.h>
#include <fsl_lpi2c.h> #include <fsl_lpi2c.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif /* CONFIG_PINCTRL */
#ifdef CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY #ifdef CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
#include "i2c_bitbang.h" #include "i2c_bitbang.h"
@ -41,9 +39,7 @@ struct mcux_lpi2c_config {
void (*irq_config_func)(const struct device *dev); void (*irq_config_func)(const struct device *dev);
uint32_t bitrate; uint32_t bitrate;
uint32_t bus_idle_timeout_ns; uint32_t bus_idle_timeout_ns;
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif /* CONFIG_PINCTRL */
#ifdef CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY #ifdef CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
struct gpio_dt_spec scl; struct gpio_dt_spec scl;
struct gpio_dt_spec sda; struct gpio_dt_spec sda;
@ -517,12 +513,10 @@ static int mcux_lpi2c_init(const struct device *dev)
return error; return error;
} }
#ifdef CONFIG_PINCTRL
error = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); error = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (error) { if (error) {
return error; return error;
} }
#endif /* CONFIG_PINCTRL */
config->irq_config_func(dev); config->irq_config_func(dev);
@ -541,14 +535,6 @@ static const struct i2c_driver_api mcux_lpi2c_driver_api = {
#endif /* CONFIG_I2C_TARGET */ #endif /* CONFIG_I2C_TARGET */
}; };
#ifdef CONFIG_PINCTRL
#define I2C_MCUX_LPI2C_PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n);
#define I2C_MCUX_LPI2C_PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#else
#define I2C_MCUX_LPI2C_PINCTRL_DEFINE(n)
#define I2C_MCUX_LPI2C_PINCTRL_INIT(n)
#endif /* CONFIG_PINCTRL */
#if CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY #if CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
#define I2C_MCUX_LPI2C_SCL_INIT(n) .scl = GPIO_DT_SPEC_INST_GET_OR(n, scl_gpios, {0}), #define I2C_MCUX_LPI2C_SCL_INIT(n) .scl = GPIO_DT_SPEC_INST_GET_OR(n, scl_gpios, {0}),
#define I2C_MCUX_LPI2C_SDA_INIT(n) .sda = GPIO_DT_SPEC_INST_GET_OR(n, sda_gpios, {0}), #define I2C_MCUX_LPI2C_SDA_INIT(n) .sda = GPIO_DT_SPEC_INST_GET_OR(n, sda_gpios, {0}),
@ -558,7 +544,7 @@ static const struct i2c_driver_api mcux_lpi2c_driver_api = {
#endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */ #endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */
#define I2C_MCUX_LPI2C_INIT(n) \ #define I2C_MCUX_LPI2C_INIT(n) \
I2C_MCUX_LPI2C_PINCTRL_DEFINE(n) \ PINCTRL_DT_INST_DEFINE(n); \
\ \
static void mcux_lpi2c_config_func_##n(const struct device *dev); \ static void mcux_lpi2c_config_func_##n(const struct device *dev); \
\ \
@ -569,7 +555,7 @@ static const struct i2c_driver_api mcux_lpi2c_driver_api = {
(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\ (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\
.irq_config_func = mcux_lpi2c_config_func_##n, \ .irq_config_func = mcux_lpi2c_config_func_##n, \
.bitrate = DT_INST_PROP(n, clock_frequency), \ .bitrate = DT_INST_PROP(n, clock_frequency), \
I2C_MCUX_LPI2C_PINCTRL_INIT(n) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
I2C_MCUX_LPI2C_SCL_INIT(n) \ I2C_MCUX_LPI2C_SCL_INIT(n) \
I2C_MCUX_LPI2C_SDA_INIT(n) \ I2C_MCUX_LPI2C_SDA_INIT(n) \
.bus_idle_timeout_ns = \ .bus_idle_timeout_ns = \

1
drivers/i2s/Kconfig.mcux
View file

@ -8,6 +8,7 @@ menuconfig I2S_MCUX_SAI
default y default y
depends on DT_HAS_NXP_MCUX_I2S_ENABLED depends on DT_HAS_NXP_MCUX_I2S_ENABLED
select DMA select DMA
select PINCTRL
help help
Enable I2S support on the I.MX family of processors. Enable I2S support on the I.MX family of processors.

19
drivers/i2s/i2s_mcux_flexcomm.c
View file

@ -15,9 +15,7 @@
#include <fsl_dma.h> #include <fsl_dma.h>
#include <zephyr/logging/log.h> #include <zephyr/logging/log.h>
#include <zephyr/irq.h> #include <zephyr/irq.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif
LOG_MODULE_REGISTER(i2s_mcux_flexcomm); LOG_MODULE_REGISTER(i2s_mcux_flexcomm);
@ -29,9 +27,7 @@ struct i2s_mcux_config {
const struct device *clock_dev; const struct device *clock_dev;
clock_control_subsys_t clock_subsys; clock_control_subsys_t clock_subsys;
void (*irq_config)(const struct device *dev); void (*irq_config)(const struct device *dev);
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif
}; };
struct stream { struct stream {
@ -836,14 +832,12 @@ static int i2s_mcux_init(const struct device *dev)
{ {
const struct i2s_mcux_config *cfg = dev->config; const struct i2s_mcux_config *cfg = dev->config;
struct i2s_mcux_data *const data = dev->data; struct i2s_mcux_data *const data = dev->data;
#ifdef CONFIG_PINCTRL
int err; int err;
err = pinctrl_apply_state(cfg->pincfg, PINCTRL_STATE_DEFAULT); err = pinctrl_apply_state(cfg->pincfg, PINCTRL_STATE_DEFAULT);
if (err) { if (err) {
return err; return err;
} }
#endif
cfg->irq_config(dev); cfg->irq_config(dev);
@ -879,15 +873,6 @@ static int i2s_mcux_init(const struct device *dev)
return 0; return 0;
} }
#ifdef CONFIG_PINCTRL
#define I2S_MCUX_FLEXCOMM_PINCTRL_DEFINE(id) PINCTRL_DT_INST_DEFINE(id);
#define I2S_MCUX_FLEXCOMM_PINCTRL_INIT(id) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(id),
#else
#define I2S_MCUX_FLEXCOMM_PINCTRL_DEFINE(id)
#define I2S_MCUX_FLEXCOMM_PINCTRL_INIT(id)
#endif
#define I2S_DMA_CHANNELS(id) \ #define I2S_DMA_CHANNELS(id) \
.tx = { \ .tx = { \
.dev_dma = UTIL_AND( \ .dev_dma = UTIL_AND( \
@ -919,7 +904,7 @@ static int i2s_mcux_init(const struct device *dev)
} }
#define I2S_MCUX_FLEXCOMM_DEVICE(id) \ #define I2S_MCUX_FLEXCOMM_DEVICE(id) \
I2S_MCUX_FLEXCOMM_PINCTRL_DEFINE(id) \ PINCTRL_DT_INST_DEFINE(id); \
static void i2s_mcux_config_func_##id(const struct device *dev); \ static void i2s_mcux_config_func_##id(const struct device *dev); \
static const struct i2s_mcux_config i2s_mcux_config_##id = { \ static const struct i2s_mcux_config i2s_mcux_config_##id = { \
.base = \ .base = \
@ -928,7 +913,7 @@ static int i2s_mcux_init(const struct device *dev)
.clock_subsys = \ .clock_subsys = \
(clock_control_subsys_t)DT_INST_CLOCKS_CELL(id, name),\ (clock_control_subsys_t)DT_INST_CLOCKS_CELL(id, name),\
.irq_config = i2s_mcux_config_func_##id, \ .irq_config = i2s_mcux_config_func_##id, \
I2S_MCUX_FLEXCOMM_PINCTRL_INIT(id) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(id), \
}; \ }; \
static struct i2s_mcux_data i2s_mcux_data_##id = { \ static struct i2s_mcux_data i2s_mcux_data_##id = { \
I2S_DMA_CHANNELS(id) \ I2S_DMA_CHANNELS(id) \

20
drivers/i2s/i2s_mcux_sai.c
View file

@ -17,9 +17,7 @@
#include <zephyr/init.h> #include <zephyr/init.h>
#include <zephyr/drivers/dma.h> #include <zephyr/drivers/dma.h>
#include <zephyr/drivers/i2s.h> #include <zephyr/drivers/i2s.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif
#include <zephyr/drivers/clock_control.h> #include <zephyr/drivers/clock_control.h>
#include <zephyr/dt-bindings/clock/imx_ccm.h> #include <zephyr/dt-bindings/clock/imx_ccm.h>
#include <soc.h> #include <soc.h>
@ -94,9 +92,7 @@ struct i2s_mcux_config {
uint32_t tx_channel; uint32_t tx_channel;
clock_control_subsys_t clk_sub_sys; clock_control_subsys_t clk_sub_sys;
const struct device *ccm_dev; const struct device *ccm_dev;
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pinctrl; const struct pinctrl_dev_config *pinctrl;
#endif
void (*irq_connect)(const struct device *dev); void (*irq_connect)(const struct device *dev);
bool rx_sync_mode; bool rx_sync_mode;
bool tx_sync_mode; bool tx_sync_mode;
@ -1157,9 +1153,7 @@ static int i2s_mcux_initialize(const struct device *dev)
I2S_Type *base = (I2S_Type *)dev_cfg->base; I2S_Type *base = (I2S_Type *)dev_cfg->base;
struct i2s_dev_data *dev_data = dev->data; struct i2s_dev_data *dev_data = dev->data;
uint32_t mclk; uint32_t mclk;
#ifdef CONFIG_PINCTRL
int err; int err;
#endif
if (!dev_data->dev_dma) { if (!dev_data->dev_dma) {
LOG_ERR("DMA device not found"); LOG_ERR("DMA device not found");
@ -1179,13 +1173,11 @@ static int i2s_mcux_initialize(const struct device *dev)
/* register ISR */ /* register ISR */
dev_cfg->irq_connect(dev); dev_cfg->irq_connect(dev);
/* pinctrl */ /* pinctrl */
#ifdef CONFIG_PINCTRL
err = pinctrl_apply_state(dev_cfg->pinctrl, PINCTRL_STATE_DEFAULT); err = pinctrl_apply_state(dev_cfg->pinctrl, PINCTRL_STATE_DEFAULT);
if (err) { if (err) {
LOG_ERR("mclk pinctrl setup failed (%d)", err); LOG_ERR("mclk pinctrl setup failed (%d)", err);
return err; return err;
} }
#endif
/*clock configuration*/ /*clock configuration*/
audio_clock_settings(dev); audio_clock_settings(dev);
@ -1235,18 +1227,10 @@ static const struct i2s_driver_api i2s_mcux_driver_api = {
.trigger = i2s_mcux_trigger, .trigger = i2s_mcux_trigger,
}; };
#ifdef CONFIG_PINCTRL
#define PINCTRL_DEFINE(i2s_id) PINCTRL_DT_INST_DEFINE(i2s_id);
#define PINCTRL_INIT(i2s_id) .pinctrl = PINCTRL_DT_INST_DEV_CONFIG_GET(i2s_id),
#else
#define PINCTRL_DEFINE(i2s_id)
#define PINCTRL_INIT(i2s_id)
#endif
#define I2S_MCUX_INIT(i2s_id) \ #define I2S_MCUX_INIT(i2s_id) \
static void i2s_irq_connect_##i2s_id(const struct device *dev); \ static void i2s_irq_connect_##i2s_id(const struct device *dev); \
\ \
PINCTRL_DEFINE(i2s_id) \ PINCTRL_DT_INST_DEFINE(i2s_id); \
\ \
static const struct i2s_mcux_config i2s_##i2s_id##_config = { \ static const struct i2s_mcux_config i2s_##i2s_id##_config = { \
.base = (I2S_Type *)DT_INST_REG_ADDR(i2s_id), \ .base = (I2S_Type *)DT_INST_REG_ADDR(i2s_id), \
@ -1280,7 +1264,7 @@ static const struct i2s_driver_api i2s_mcux_driver_api = {
DT_INST_CLOCKS_CELL_BY_IDX(i2s_id, 0, name), \ DT_INST_CLOCKS_CELL_BY_IDX(i2s_id, 0, name), \
.ccm_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(i2s_id)), \ .ccm_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(i2s_id)), \
.irq_connect = i2s_irq_connect_##i2s_id, \ .irq_connect = i2s_irq_connect_##i2s_id, \
PINCTRL_INIT(i2s_id) \ .pinctrl = PINCTRL_DT_INST_DEV_CONFIG_GET(i2s_id), \
.tx_sync_mode = \ .tx_sync_mode = \
DT_INST_PROP(i2s_id, nxp_tx_sync_mode), \ DT_INST_PROP(i2s_id, nxp_tx_sync_mode), \
.rx_sync_mode = \ .rx_sync_mode = \

18
drivers/i3c/i3c_mcux.c
View file

@ -18,9 +18,7 @@
#include <zephyr/drivers/clock_control.h> #include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/i3c.h> #include <zephyr/drivers/i3c.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif
/* /*
* This is from NXP HAL which contains register bits macros * This is from NXP HAL which contains register bits macros
@ -78,10 +76,8 @@ struct mcux_i3c_config {
/** Clock control subsys related struct. */ /** Clock control subsys related struct. */
clock_control_subsys_t clock_subsys; clock_control_subsys_t clock_subsys;
#ifdef CONFIG_PINCTRL
/** Pointer to pin control device. */ /** Pointer to pin control device. */
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif
/** Interrupt configuration function. */ /** Interrupt configuration function. */
void (*irq_config_func)(const struct device *dev); void (*irq_config_func)(const struct device *dev);
@ -2006,12 +2002,10 @@ static int mcux_i3c_init(const struct device *dev)
CLOCK_SetClkDiv(kCLOCK_DivI3cSlowClk, data->clocks.clk_div_od); CLOCK_SetClkDiv(kCLOCK_DivI3cSlowClk, data->clocks.clk_div_od);
CLOCK_SetClkDiv(kCLOCK_DivI3cTcClk, data->clocks.clk_div_tc); CLOCK_SetClkDiv(kCLOCK_DivI3cTcClk, data->clocks.clk_div_tc);
#ifdef CONFIG_PINCTRL
ret = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); ret = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (ret != 0) { if (ret != 0) {
goto err_out; goto err_out;
} }
#endif
k_sem_init(&data->lock, 1, 1); k_sem_init(&data->lock, 1, 1);
k_sem_init(&data->ibi_lock, 1, 1); k_sem_init(&data->ibi_lock, 1, 1);
@ -2120,16 +2114,8 @@ static const struct i3c_driver_api mcux_i3c_driver_api = {
#endif #endif
}; };
#ifdef CONFIG_PINCTRL
#define I3C_MCUX_PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n);
#define I3C_MCUX_PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#else
#define I3C_MCUX_PINCTRL_DEFINE(n)
#define I3C_MCUX_PINCTRL_INIT(n)
#endif
#define I3C_MCUX_DEVICE(id) \ #define I3C_MCUX_DEVICE(id) \
I3C_MCUX_PINCTRL_DEFINE(id) \ PINCTRL_DT_INST_DEFINE(n); \
static void mcux_i3c_config_func_##id(const struct device *dev); \ static void mcux_i3c_config_func_##id(const struct device *dev); \
static struct i3c_device_desc mcux_i3c_device_array_##id[] = \ static struct i3c_device_desc mcux_i3c_device_array_##id[] = \
I3C_DEVICE_ARRAY_DT_INST(id); \ I3C_DEVICE_ARRAY_DT_INST(id); \
@ -2145,7 +2131,7 @@ static const struct i3c_driver_api mcux_i3c_driver_api = {
.common.dev_list.num_i3c = ARRAY_SIZE(mcux_i3c_device_array_##id), \ .common.dev_list.num_i3c = ARRAY_SIZE(mcux_i3c_device_array_##id), \
.common.dev_list.i2c = mcux_i3c_i2c_device_array_##id, \ .common.dev_list.i2c = mcux_i3c_i2c_device_array_##id, \
.common.dev_list.num_i2c = ARRAY_SIZE(mcux_i3c_i2c_device_array_##id), \ .common.dev_list.num_i2c = ARRAY_SIZE(mcux_i3c_i2c_device_array_##id), \
I3C_MCUX_PINCTRL_INIT(id) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
}; \ }; \
static struct mcux_i3c_data mcux_i3c_data_##id = { \ static struct mcux_i3c_data mcux_i3c_data_##id = { \
.clocks.i3c_od_scl_hz = DT_INST_PROP_OR(id, i3c_od_scl_hz, 0), \ .clocks.i3c_od_scl_hz = DT_INST_PROP_OR(id, i3c_od_scl_hz, 0), \

1
drivers/memc/Kconfig.mcux
View file

@ -18,5 +18,6 @@ config MEMC_MCUX_FLEXSPI_APS6408L
config MEMC_MCUX_FLEXSPI config MEMC_MCUX_FLEXSPI
bool bool
select PINCTRL
endif endif

22
drivers/memc/memc_mcux_flexspi.c
View file

@ -8,9 +8,7 @@
#include <zephyr/logging/log.h> #include <zephyr/logging/log.h>
#include <zephyr/sys/util.h> #include <zephyr/sys/util.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif
#include <zephyr/pm/device.h> #include <zephyr/pm/device.h>
#include "memc_mcux_flexspi.h" #include "memc_mcux_flexspi.h"
@ -48,9 +46,7 @@ struct memc_flexspi_data {
bool combination_mode; bool combination_mode;
bool sck_differential_clock; bool sck_differential_clock;
flexspi_read_sample_clock_t rx_sample_clock; flexspi_read_sample_clock_t rx_sample_clock;
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif
size_t size[kFLEXSPI_PortCount]; size_t size[kFLEXSPI_PortCount];
struct memc_flexspi_buf_cfg *buf_cfg; struct memc_flexspi_buf_cfg *buf_cfg;
uint8_t buf_cfg_cnt; uint8_t buf_cfg_cnt;
@ -157,14 +153,12 @@ static int memc_flexspi_init(const struct device *dev)
* SOCs such as the RT1064 and RT1024 have internal flash, and no pinmux * SOCs such as the RT1064 and RT1024 have internal flash, and no pinmux
* settings, continue if no pinctrl state found. * settings, continue if no pinctrl state found.
*/ */
#ifdef CONFIG_PINCTRL
int ret; int ret;
ret = pinctrl_apply_state(data->pincfg, PINCTRL_STATE_DEFAULT); ret = pinctrl_apply_state(data->pincfg, PINCTRL_STATE_DEFAULT);
if (ret < 0 && ret != -ENOENT) { if (ret < 0 && ret != -ENOENT) {
return ret; return ret;
} }
#endif
FLEXSPI_GetDefaultConfig(&flexspi_config); FLEXSPI_GetDefaultConfig(&flexspi_config);
@ -210,20 +204,16 @@ static int memc_flexspi_pm_action(const struct device *dev, enum pm_device_actio
switch (action) { switch (action) {
case PM_DEVICE_ACTION_RESUME: case PM_DEVICE_ACTION_RESUME:
#ifdef CONFIG_PINCTRL
ret = pinctrl_apply_state(data->pincfg, PINCTRL_STATE_DEFAULT); ret = pinctrl_apply_state(data->pincfg, PINCTRL_STATE_DEFAULT);
if (ret < 0 && ret != -ENOENT) { if (ret < 0 && ret != -ENOENT) {
return ret; return ret;
} }
#endif
break; break;
case PM_DEVICE_ACTION_SUSPEND: case PM_DEVICE_ACTION_SUSPEND:
#ifdef CONFIG_PINCTRL
ret = pinctrl_apply_state(data->pincfg, PINCTRL_STATE_SLEEP); ret = pinctrl_apply_state(data->pincfg, PINCTRL_STATE_SLEEP);
if (ret < 0 && ret != -ENOENT) { if (ret < 0 && ret != -ENOENT) {
return ret; return ret;
} }
#endif
break; break;
default: default:
return -ENOTSUP; return -ENOTSUP;
@ -243,16 +233,8 @@ static int memc_flexspi_pm_action(const struct device *dev, enum pm_device_actio
#define MEMC_FLEXSPI_CFG_XIP(node_id) false #define MEMC_FLEXSPI_CFG_XIP(node_id) false
#endif #endif
#ifdef CONFIG_PINCTRL
#define PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n);
#define PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#else
#define PINCTRL_DEFINE(n)
#define PINCTRL_INIT(n)
#endif
#define MEMC_FLEXSPI(n) \ #define MEMC_FLEXSPI(n) \
PINCTRL_DEFINE(n) \ PINCTRL_DT_INST_DEFINE(n); \
static uint16_t buf_cfg_##n[] = \ static uint16_t buf_cfg_##n[] = \
DT_INST_PROP_OR(n, rx_buffer_config, {0}); \ DT_INST_PROP_OR(n, rx_buffer_config, {0}); \
\ \
@ -271,7 +253,7 @@ static int memc_flexspi_pm_action(const struct device *dev, enum pm_device_actio
.buf_cfg = (struct memc_flexspi_buf_cfg *)buf_cfg_##n, \ .buf_cfg = (struct memc_flexspi_buf_cfg *)buf_cfg_##n, \
.buf_cfg_cnt = sizeof(buf_cfg_##n) / \ .buf_cfg_cnt = sizeof(buf_cfg_##n) / \
sizeof(struct memc_flexspi_buf_cfg), \ sizeof(struct memc_flexspi_buf_cfg), \
PINCTRL_INIT(n) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
}; \ }; \
\ \
PM_DEVICE_DT_INST_DEFINE(n, memc_flexspi_pm_action); \ PM_DEVICE_DT_INST_DEFINE(n, memc_flexspi_pm_action); \

1
drivers/pwm/Kconfig.mcux_sctimer
View file

@ -5,5 +5,6 @@ config PWM_MCUX_SCTIMER
bool "MCUX SCTimer PWM driver" bool "MCUX SCTimer PWM driver"
default y default y
depends on DT_HAS_NXP_SCTIMER_PWM_ENABLED depends on DT_HAS_NXP_SCTIMER_PWM_ENABLED
select PINCTRL
help help
Enable sctimer based pwm driver. Enable sctimer based pwm driver.

18
drivers/pwm/pwm_mcux_sctimer.c
View file

@ -11,9 +11,7 @@
#include <zephyr/drivers/pwm.h> #include <zephyr/drivers/pwm.h>
#include <fsl_sctimer.h> #include <fsl_sctimer.h>
#include <fsl_clock.h> #include <fsl_clock.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif
#include <zephyr/logging/log.h> #include <zephyr/logging/log.h>
@ -24,9 +22,7 @@ LOG_MODULE_REGISTER(pwm_mcux_sctimer, CONFIG_PWM_LOG_LEVEL);
struct pwm_mcux_sctimer_config { struct pwm_mcux_sctimer_config {
SCT_Type *base; SCT_Type *base;
uint32_t prescale; uint32_t prescale;
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif
}; };
struct pwm_mcux_sctimer_data { struct pwm_mcux_sctimer_data {
@ -134,14 +130,12 @@ static int mcux_sctimer_pwm_init(const struct device *dev)
sctimer_config_t pwm_config; sctimer_config_t pwm_config;
status_t status; status_t status;
int i; int i;
#ifdef CONFIG_PINCTRL
int err; int err;
err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (err) { if (err) {
return err; return err;
} }
#endif
SCTIMER_GetDefaultConfig(&pwm_config); SCTIMER_GetDefaultConfig(&pwm_config);
/* Divide the SCT clock by 8 */ /* Divide the SCT clock by 8 */
@ -168,22 +162,14 @@ static const struct pwm_driver_api pwm_mcux_sctimer_driver_api = {
.get_cycles_per_sec = mcux_sctimer_pwm_get_cycles_per_sec, .get_cycles_per_sec = mcux_sctimer_pwm_get_cycles_per_sec,
}; };
#ifdef CONFIG_PINCTRL
#define PWM_MCUX_SCTIMER_PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n);
#define PWM_MCUX_SCTIMER_PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#else
#define PWM_MCUX_SCTIMER_PINCTRL_DEFINE(n)
#define PWM_MCUX_SCTIMER_PINCTRL_INIT(n)
#endif
#define PWM_MCUX_SCTIMER_DEVICE_INIT_MCUX(n) \ #define PWM_MCUX_SCTIMER_DEVICE_INIT_MCUX(n) \
PWM_MCUX_SCTIMER_PINCTRL_DEFINE(n) \ PINCTRL_DT_INST_DEFINE(n); \
static struct pwm_mcux_sctimer_data pwm_mcux_sctimer_data_##n; \ static struct pwm_mcux_sctimer_data pwm_mcux_sctimer_data_##n; \
\ \
static const struct pwm_mcux_sctimer_config pwm_mcux_sctimer_config_##n = { \ static const struct pwm_mcux_sctimer_config pwm_mcux_sctimer_config_##n = { \
.base = (SCT_Type *)DT_INST_REG_ADDR(n), \ .base = (SCT_Type *)DT_INST_REG_ADDR(n), \
.prescale = DT_INST_PROP(n, prescaler), \ .prescale = DT_INST_PROP(n, prescaler), \
PWM_MCUX_SCTIMER_PINCTRL_INIT(n) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
}; \ }; \
\ \
DEVICE_DT_INST_DEFINE(n, \ DEVICE_DT_INST_DEFINE(n, \

1
drivers/sdhc/Kconfig.mcux_sdif
View file

@ -6,6 +6,7 @@ config MCUX_SDIF
default y default y
depends on DT_HAS_NXP_LPC_SDIF_ENABLED depends on DT_HAS_NXP_LPC_SDIF_ENABLED
select SDHC_SUPPORTS_NATIVE_MODE select SDHC_SUPPORTS_NATIVE_MODE
select PINCTRL
help help
Enable the NXP SDIF Host controller driver Enable the NXP SDIF Host controller driver

1
drivers/sensor/qdec_mcux/Kconfig
View file

@ -6,5 +6,6 @@ config QDEC_MCUX
default y default y
depends on DT_HAS_NXP_MCUX_QDEC_ENABLED depends on DT_HAS_NXP_MCUX_QDEC_ENABLED
select MCUX_XBARA select MCUX_XBARA
select PINCTRL
help help
Enable support for NXP MCUX Quadrature Encoder driver. Enable support for NXP MCUX Quadrature Encoder driver.

18
drivers/sensor/qdec_mcux/qdec_mcux.c
View file

@ -11,9 +11,7 @@
#include <fsl_enc.h> #include <fsl_enc.h>
#include <fsl_xbara.h> #include <fsl_xbara.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif /* CONFIG_PINCTRL */
#include <zephyr/drivers/sensor.h> #include <zephyr/drivers/sensor.h>
#include <zephyr/drivers/sensor/qdec_mcux.h> #include <zephyr/drivers/sensor/qdec_mcux.h>
#include <zephyr/drivers/spi.h> #include <zephyr/drivers/spi.h>
@ -23,9 +21,7 @@ LOG_MODULE_REGISTER(qdec_mcux, CONFIG_SENSOR_LOG_LEVEL);
struct qdec_mcux_config { struct qdec_mcux_config {
ENC_Type *base; ENC_Type *base;
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif /* CONFIG_PINCTRL */
XBARA_Type *xbar; XBARA_Type *xbar;
size_t xbar_maps_len; size_t xbar_maps_len;
int xbar_maps[]; int xbar_maps[];
@ -138,10 +134,8 @@ static void init_inputs(const struct device *dev)
int i; int i;
const struct qdec_mcux_config *config = dev->config; const struct qdec_mcux_config *config = dev->config;
#ifdef CONFIG_PINCTRL
i = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); i = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
assert(i == 0); assert(i == 0);
#endif
/* Quadrature Encoder inputs are only accessible via crossbar */ /* Quadrature Encoder inputs are only accessible via crossbar */
XBARA_Init(config->xbar); XBARA_Init(config->xbar);
@ -151,14 +145,6 @@ static void init_inputs(const struct device *dev)
} }
} }
#ifdef CONFIG_PINCTRL
#define QDEC_MCUX_PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n);
#define QDEC_MCUX_PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#else
#define QDEC_MCUX_PINCTRL_DEFINE(n)
#define QDEC_MCUX_PINCTRL_INIT(n)
#endif
#define XBAR_PHANDLE(n) DT_INST_PHANDLE(n, xbar) #define XBAR_PHANDLE(n) DT_INST_PHANDLE(n, xbar)
#define QDEC_CHECK_COND(n, p, min, max) \ #define QDEC_CHECK_COND(n, p, min, max) \
@ -180,14 +166,14 @@ static void init_inputs(const struct device *dev)
.counts_per_revolution = DT_INST_PROP(n, counts_per_revolution) \ .counts_per_revolution = DT_INST_PROP(n, counts_per_revolution) \
}; \ }; \
\ \
QDEC_MCUX_PINCTRL_DEFINE(n) \ PINCTRL_DT_INST_DEFINE(n); \
\ \
static const struct qdec_mcux_config qdec_mcux_##n##_config = { \ static const struct qdec_mcux_config qdec_mcux_##n##_config = { \
.base = (ENC_Type *)DT_INST_REG_ADDR(n), \ .base = (ENC_Type *)DT_INST_REG_ADDR(n), \
.xbar = (XBARA_Type *)DT_REG_ADDR(XBAR_PHANDLE(n)), \ .xbar = (XBARA_Type *)DT_REG_ADDR(XBAR_PHANDLE(n)), \
.xbar_maps_len = DT_PROP_LEN(XBAR_PHANDLE(n), xbar_maps), \ .xbar_maps_len = DT_PROP_LEN(XBAR_PHANDLE(n), xbar_maps), \
.xbar_maps = DT_PROP(XBAR_PHANDLE(n), xbar_maps), \ .xbar_maps = DT_PROP(XBAR_PHANDLE(n), xbar_maps), \
QDEC_MCUX_PINCTRL_INIT(n) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
}; \ }; \
\ \
static int qdec_mcux_##n##_init(const struct device *dev) \ static int qdec_mcux_##n##_init(const struct device *dev) \

1
drivers/serial/Kconfig.mcux
View file

@ -11,5 +11,6 @@ config UART_MCUX
select SERIAL_HAS_DRIVER select SERIAL_HAS_DRIVER
select SERIAL_SUPPORT_INTERRUPT select SERIAL_SUPPORT_INTERRUPT
select SERIAL_SUPPORT_ASYNC select SERIAL_SUPPORT_ASYNC
select PINCTRL
help help
Enable the MCUX uart driver. Enable the MCUX uart driver.

1
drivers/serial/Kconfig.mcux_flexcomm
View file

@ -9,5 +9,6 @@ config UART_MCUX_FLEXCOMM
depends on DT_HAS_NXP_LPC_USART_ENABLED depends on DT_HAS_NXP_LPC_USART_ENABLED
select SERIAL_HAS_DRIVER select SERIAL_HAS_DRIVER
select SERIAL_SUPPORT_INTERRUPT select SERIAL_SUPPORT_INTERRUPT
select PINCTRL
help help
Enable the MCUX USART driver. Enable the MCUX USART driver.

1
drivers/serial/Kconfig.mcux_lpuart
View file

@ -12,6 +12,7 @@ config UART_MCUX_LPUART
select SERIAL_SUPPORT_INTERRUPT select SERIAL_SUPPORT_INTERRUPT
select SERIAL_SUPPORT_ASYNC select SERIAL_SUPPORT_ASYNC
select DMA if UART_ASYNC_API select DMA if UART_ASYNC_API
select PINCTRL
help help
Enable the MCUX LPUART driver. Enable the MCUX LPUART driver.

20
drivers/serial/uart_mcux.c
View file

@ -15,9 +15,7 @@
#include <fsl_uart.h> #include <fsl_uart.h>
#include <soc.h> #include <soc.h>
#include <zephyr/pm/device.h> #include <zephyr/pm/device.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif
struct uart_mcux_config { struct uart_mcux_config {
UART_Type *base; UART_Type *base;
@ -26,9 +24,7 @@ struct uart_mcux_config {
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
void (*irq_config_func)(const struct device *dev); void (*irq_config_func)(const struct device *dev);
#endif #endif
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif
}; };
struct uart_mcux_data { struct uart_mcux_data {
@ -327,9 +323,7 @@ static void uart_mcux_isr(const struct device *dev)
static int uart_mcux_init(const struct device *dev) static int uart_mcux_init(const struct device *dev)
{ {
#if defined(CONFIG_PINCTRL) || defined(CONFIG_UART_INTERRUPT_DRIVEN)
const struct uart_mcux_config *config = dev->config; const struct uart_mcux_config *config = dev->config;
#endif
struct uart_mcux_data *data = dev->data; struct uart_mcux_data *data = dev->data;
int err; int err;
@ -338,12 +332,10 @@ static int uart_mcux_init(const struct device *dev)
return err; return err;
} }
#ifdef CONFIG_PINCTRL
err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (err != 0) { if (err != 0) {
return err; return err;
} }
#endif
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
config->irq_config_func(dev); config->irq_config_func(dev);
@ -401,20 +393,12 @@ static const struct uart_driver_api uart_mcux_driver_api = {
#endif #endif
}; };
#ifdef CONFIG_PINCTRL
#define PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#define PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n);
#else
#define PINCTRL_DEFINE(n)
#define PINCTRL_INIT(n)
#endif
#define UART_MCUX_DECLARE_CFG(n, IRQ_FUNC_INIT) \ #define UART_MCUX_DECLARE_CFG(n, IRQ_FUNC_INIT) \
static const struct uart_mcux_config uart_mcux_##n##_config = { \ static const struct uart_mcux_config uart_mcux_##n##_config = { \
.base = (UART_Type *)DT_INST_REG_ADDR(n), \ .base = (UART_Type *)DT_INST_REG_ADDR(n), \
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \ .clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
.clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\ .clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\
PINCTRL_INIT(n) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
IRQ_FUNC_INIT \ IRQ_FUNC_INIT \
} }
@ -446,7 +430,7 @@ static const struct uart_mcux_config uart_mcux_##n##_config = { \
#endif #endif
#define UART_MCUX_INIT(n) \ #define UART_MCUX_INIT(n) \
PINCTRL_DEFINE(n) \ PINCTRL_DT_INST_DEFINE(n); \
\ \
static struct uart_mcux_data uart_mcux_##n##_data = { \ static struct uart_mcux_data uart_mcux_##n##_data = { \
.uart_cfg = { \ .uart_cfg = { \

19
drivers/serial/uart_mcux_flexcomm.c
View file

@ -22,9 +22,7 @@
#include <fsl_usart.h> #include <fsl_usart.h>
#include <soc.h> #include <soc.h>
#include <fsl_device_registers.h> #include <fsl_device_registers.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif
struct mcux_flexcomm_config { struct mcux_flexcomm_config {
USART_Type *base; USART_Type *base;
@ -35,9 +33,7 @@ struct mcux_flexcomm_config {
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
void (*irq_config_func)(const struct device *dev); void (*irq_config_func)(const struct device *dev);
#endif #endif
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif
}; };
struct mcux_flexcomm_data { struct mcux_flexcomm_data {
@ -360,14 +356,12 @@ static int mcux_flexcomm_init(const struct device *dev)
usart_config_t usart_config; usart_config_t usart_config;
usart_parity_mode_t parity_mode; usart_parity_mode_t parity_mode;
uint32_t clock_freq; uint32_t clock_freq;
#ifdef CONFIG_PINCTRL
int err; int err;
err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (err) { if (err) {
return err; return err;
} }
#endif /* CONFIG_PINCTRL */
if (!device_is_ready(config->clock_dev)) { if (!device_is_ready(config->clock_dev)) {
return -ENODEV; return -ENODEV;
@ -460,15 +454,6 @@ static const struct uart_driver_api mcux_flexcomm_driver_api = {
UART_MCUX_FLEXCOMM_DECLARE_CFG(n, UART_MCUX_FLEXCOMM_IRQ_CFG_FUNC_INIT) UART_MCUX_FLEXCOMM_DECLARE_CFG(n, UART_MCUX_FLEXCOMM_IRQ_CFG_FUNC_INIT)
#endif #endif
#ifdef CONFIG_PINCTRL
#define UART_MCUX_FLEXCOMM_PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n)
#define UART_MCUX_FLEXCOMM_PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#else
#define UART_MCUX_FLEXCOMM_PINCTRL_DEFINE(n)
#define UART_MCUX_FLEXCOMM_PINCTRL_INIT(n)
#endif
#define UART_MCUX_FLEXCOMM_DECLARE_CFG(n, IRQ_FUNC_INIT) \ #define UART_MCUX_FLEXCOMM_DECLARE_CFG(n, IRQ_FUNC_INIT) \
static const struct mcux_flexcomm_config mcux_flexcomm_##n##_config = { \ static const struct mcux_flexcomm_config mcux_flexcomm_##n##_config = { \
.base = (USART_Type *)DT_INST_REG_ADDR(n), \ .base = (USART_Type *)DT_INST_REG_ADDR(n), \
@ -477,13 +462,13 @@ static const struct mcux_flexcomm_config mcux_flexcomm_##n##_config = { \
(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\ (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\
.baud_rate = DT_INST_PROP(n, current_speed), \ .baud_rate = DT_INST_PROP(n, current_speed), \
.parity = DT_INST_ENUM_IDX_OR(n, parity, UART_CFG_PARITY_NONE), \ .parity = DT_INST_ENUM_IDX_OR(n, parity, UART_CFG_PARITY_NONE), \
UART_MCUX_FLEXCOMM_PINCTRL_INIT(n) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
IRQ_FUNC_INIT \ IRQ_FUNC_INIT \
} }
#define UART_MCUX_FLEXCOMM_INIT(n) \ #define UART_MCUX_FLEXCOMM_INIT(n) \
\ \
UART_MCUX_FLEXCOMM_PINCTRL_DEFINE(n); \ PINCTRL_DT_INST_DEFINE(n); \
\ \
static struct mcux_flexcomm_data mcux_flexcomm_##n##_data; \ static struct mcux_flexcomm_data mcux_flexcomm_##n##_data; \
\ \

20
drivers/serial/uart_mcux_lpuart.c
View file

@ -14,9 +14,7 @@
#include <zephyr/irq.h> #include <zephyr/irq.h>
#include <zephyr/kernel.h> #include <zephyr/kernel.h>
#include <zephyr/pm/policy.h> #include <zephyr/pm/policy.h>
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif
#ifdef CONFIG_UART_ASYNC_API #ifdef CONFIG_UART_ASYNC_API
#include <zephyr/drivers/dma.h> #include <zephyr/drivers/dma.h>
#endif #endif
@ -37,9 +35,7 @@ struct lpuart_dma_config {
struct mcux_lpuart_config { struct mcux_lpuart_config {
LPUART_Type *base; LPUART_Type *base;
const struct device *clock_dev; const struct device *clock_dev;
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif
clock_control_subsys_t clock_subsys; clock_control_subsys_t clock_subsys;
uint32_t baud_rate; uint32_t baud_rate;
uint8_t flow_ctrl; uint8_t flow_ctrl;
@ -1044,9 +1040,7 @@ static int mcux_lpuart_init(const struct device *dev)
const struct mcux_lpuart_config *config = dev->config; const struct mcux_lpuart_config *config = dev->config;
struct mcux_lpuart_data *data = dev->data; struct mcux_lpuart_data *data = dev->data;
struct uart_config *uart_api_config = &data->uart_config; struct uart_config *uart_api_config = &data->uart_config;
#ifdef CONFIG_PINCTRL
int err; int err;
#endif
uart_api_config->baudrate = config->baud_rate; uart_api_config->baudrate = config->baud_rate;
uart_api_config->parity = config->parity; uart_api_config->parity = config->parity;
@ -1056,12 +1050,10 @@ static int mcux_lpuart_init(const struct device *dev)
/* set initial configuration */ /* set initial configuration */
mcux_lpuart_configure_init(dev, uart_api_config); mcux_lpuart_configure_init(dev, uart_api_config);
#ifdef CONFIG_PINCTRL
err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (err < 0) { if (err < 0) {
return err; return err;
} }
#endif
#ifdef CONFIG_UART_MCUX_LPUART_ISR_SUPPORT #ifdef CONFIG_UART_MCUX_LPUART_ISR_SUPPORT
config->irq_config_func(dev); config->irq_config_func(dev);
@ -1186,14 +1178,6 @@ static const struct uart_driver_api mcux_lpuart_driver_api = {
#define TX_DMA_CONFIG(n) #define TX_DMA_CONFIG(n)
#endif /* CONFIG_UART_ASYNC_API */ #endif /* CONFIG_UART_ASYNC_API */
#if CONFIG_PINCTRL
#define PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n);
#define PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#else
#define PINCTRL_DEFINE(n)
#define PINCTRL_INIT(n)
#endif /* CONFIG_PINCTRL */
#define FLOW_CONTROL(n) \ #define FLOW_CONTROL(n) \
DT_INST_PROP(n, hw_flow_control) \ DT_INST_PROP(n, hw_flow_control) \
? UART_CFG_FLOW_CTRL_RTS_CTS \ ? UART_CFG_FLOW_CTRL_RTS_CTS \
@ -1211,7 +1195,7 @@ static const struct mcux_lpuart_config mcux_lpuart_##n##_config = { \
.parity = DT_INST_ENUM_IDX_OR(n, parity, UART_CFG_PARITY_NONE), \ .parity = DT_INST_ENUM_IDX_OR(n, parity, UART_CFG_PARITY_NONE), \
.rs485_de_active_low = DT_INST_PROP(n, nxp_rs485_de_active_low), \ .rs485_de_active_low = DT_INST_PROP(n, nxp_rs485_de_active_low), \
.loopback_en = DT_INST_PROP(n, nxp_loopback), \ .loopback_en = DT_INST_PROP(n, nxp_loopback), \
PINCTRL_INIT(n) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
MCUX_LPUART_IRQ_INIT(n) \ MCUX_LPUART_IRQ_INIT(n) \
RX_DMA_CONFIG(n) \ RX_DMA_CONFIG(n) \
TX_DMA_CONFIG(n) \ TX_DMA_CONFIG(n) \
@ -1221,7 +1205,7 @@ static const struct mcux_lpuart_config mcux_lpuart_##n##_config = { \
\ \
static struct mcux_lpuart_data mcux_lpuart_##n##_data; \ static struct mcux_lpuart_data mcux_lpuart_##n##_data; \
\ \
PINCTRL_DEFINE(n) \ PINCTRL_DT_INST_DEFINE(n); \
MCUX_LPUART_IRQ_DEFINE(n) \ MCUX_LPUART_IRQ_DEFINE(n) \
\ \
LPUART_MCUX_DECLARE_CFG(n) \ LPUART_MCUX_DECLARE_CFG(n) \

1
drivers/spi/Kconfig.mcux_flexcomm
View file

@ -6,6 +6,7 @@ config SPI_MCUX_FLEXCOMM
bool "MCUX FLEXCOMM SPI driver" bool "MCUX FLEXCOMM SPI driver"
default y default y
depends on DT_HAS_NXP_LPC_SPI_ENABLED depends on DT_HAS_NXP_LPC_SPI_ENABLED
select PINCTRL
help help
Enable support for mcux flexcomm spi driver. Enable support for mcux flexcomm spi driver.

1
drivers/spi/Kconfig.mcux_lpspi
View file

@ -8,6 +8,7 @@ config SPI_MCUX_LPSPI
default y default y
depends on DT_HAS_NXP_IMX_LPSPI_ENABLED depends on DT_HAS_NXP_IMX_LPSPI_ENABLED
depends on CLOCK_CONTROL depends on CLOCK_CONTROL
select PINCTRL
help help
Enable support for mcux spi driver. Enable support for mcux spi driver.

18
drivers/spi/spi_mcux_flexcomm.c
View file

@ -15,9 +15,7 @@
#ifdef CONFIG_SPI_MCUX_FLEXCOMM_DMA #ifdef CONFIG_SPI_MCUX_FLEXCOMM_DMA
#include <zephyr/drivers/dma.h> #include <zephyr/drivers/dma.h>
#endif #endif
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif
#include <zephyr/sys_clock.h> #include <zephyr/sys_clock.h>
#include <zephyr/irq.h> #include <zephyr/irq.h>
@ -38,9 +36,7 @@ struct spi_mcux_config {
uint32_t frame_delay; uint32_t frame_delay;
uint32_t transfer_delay; uint32_t transfer_delay;
uint32_t def_char; uint32_t def_char;
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif
}; };
#ifdef CONFIG_SPI_MCUX_FLEXCOMM_DMA #ifdef CONFIG_SPI_MCUX_FLEXCOMM_DMA
@ -737,12 +733,10 @@ static int spi_mcux_init(const struct device *dev)
data->dev = dev; data->dev = dev;
#ifdef CONFIG_PINCTRL
err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (err) { if (err) {
return err; return err;
} }
#endif
#ifdef CONFIG_SPI_MCUX_FLEXCOMM_DMA #ifdef CONFIG_SPI_MCUX_FLEXCOMM_DMA
if (!device_is_ready(data->dma_tx.dma_dev)) { if (!device_is_ready(data->dma_tx.dma_dev)) {
@ -789,14 +783,6 @@ static void spi_mcux_config_func_##id(const struct device *dev) \
irq_enable(DT_INST_IRQN(id)); \ irq_enable(DT_INST_IRQN(id)); \
} }
#ifdef CONFIG_PINCTRL
#define SPI_MCUX_FLEXCOMM_PINCTRL_DEFINE(id) PINCTRL_DT_INST_DEFINE(id);
#define SPI_MCUX_FLEXCOMM_PINCTRL_INIT(id) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(id),
#else
#define SPI_MCUX_FLEXCOMM_PINCTRL_DEFINE(id)
#define SPI_MCUX_FLEXCOMM_PINCTRL_INIT(id)
#endif
#ifndef CONFIG_SPI_MCUX_FLEXCOMM_DMA #ifndef CONFIG_SPI_MCUX_FLEXCOMM_DMA
#define SPI_DMA_CHANNELS(id) #define SPI_DMA_CHANNELS(id)
#else #else
@ -828,7 +814,7 @@ static void spi_mcux_config_func_##id(const struct device *dev) \
#define SPI_MCUX_FLEXCOMM_DEVICE(id) \ #define SPI_MCUX_FLEXCOMM_DEVICE(id) \
SPI_MCUX_FLEXCOMM_IRQ_HANDLER_DECL(id); \ SPI_MCUX_FLEXCOMM_IRQ_HANDLER_DECL(id); \
SPI_MCUX_FLEXCOMM_PINCTRL_DEFINE(id) \ PINCTRL_DT_INST_DEFINE(id); \
static const struct spi_mcux_config spi_mcux_config_##id = { \ static const struct spi_mcux_config spi_mcux_config_##id = { \
.base = \ .base = \
(SPI_Type *)DT_INST_REG_ADDR(id), \ (SPI_Type *)DT_INST_REG_ADDR(id), \
@ -841,7 +827,7 @@ static void spi_mcux_config_func_##id(const struct device *dev) \
.frame_delay = DT_INST_PROP_OR(id, frame_delay, 0), \ .frame_delay = DT_INST_PROP_OR(id, frame_delay, 0), \
.transfer_delay = DT_INST_PROP_OR(id, transfer_delay, 0), \ .transfer_delay = DT_INST_PROP_OR(id, transfer_delay, 0), \
.def_char = DT_INST_PROP_OR(id, def_char, 0), \ .def_char = DT_INST_PROP_OR(id, def_char, 0), \
SPI_MCUX_FLEXCOMM_PINCTRL_INIT(id) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(id), \
}; \ }; \
static struct spi_mcux_data spi_mcux_data_##id = { \ static struct spi_mcux_data spi_mcux_data_##id = { \
SPI_CONTEXT_INIT_LOCK(spi_mcux_data_##id, ctx), \ SPI_CONTEXT_INIT_LOCK(spi_mcux_data_##id, ctx), \

19
drivers/spi/spi_mcux_lpspi.c
View file

@ -15,9 +15,7 @@
#ifdef CONFIG_SPI_MCUX_LPSPI_DMA #ifdef CONFIG_SPI_MCUX_LPSPI_DMA
#include <zephyr/drivers/dma.h> #include <zephyr/drivers/dma.h>
#endif #endif
#ifdef CONFIG_PINCTRL
#include <zephyr/drivers/pinctrl.h> #include <zephyr/drivers/pinctrl.h>
#endif /* CONFIG_PINCTRL */
LOG_MODULE_REGISTER(spi_mcux_lpspi, CONFIG_SPI_LOG_LEVEL); LOG_MODULE_REGISTER(spi_mcux_lpspi, CONFIG_SPI_LOG_LEVEL);
@ -34,9 +32,7 @@ struct spi_mcux_config {
uint32_t pcs_sck_delay; uint32_t pcs_sck_delay;
uint32_t sck_pcs_delay; uint32_t sck_pcs_delay;
uint32_t transfer_delay; uint32_t transfer_delay;
#ifdef CONFIG_PINCTRL
const struct pinctrl_dev_config *pincfg; const struct pinctrl_dev_config *pincfg;
#endif /* CONFIG_PINCTRL */
}; };
#ifdef CONFIG_SPI_MCUX_LPSPI_DMA #ifdef CONFIG_SPI_MCUX_LPSPI_DMA
@ -568,12 +564,10 @@ static int spi_mcux_init(const struct device *dev)
} }
#endif /* CONFIG_SPI_MCUX_LPSPI_DMA */ #endif /* CONFIG_SPI_MCUX_LPSPI_DMA */
#ifdef CONFIG_PINCTRL
err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
if (err) { if (err) {
return err; return err;
} }
#endif /* CONFIG_PINCTRL */
spi_context_unlock_unconditionally(&data->ctx); spi_context_unlock_unconditionally(&data->ctx);
@ -620,17 +614,8 @@ static const struct spi_driver_api spi_mcux_driver_api = {
#define SPI_DMA_CHANNELS(n) #define SPI_DMA_CHANNELS(n)
#endif /* CONFIG_SPI_MCUX_LPSPI_DMA */ #endif /* CONFIG_SPI_MCUX_LPSPI_DMA */
#ifdef CONFIG_PINCTRL
#define SPI_MCUX_LPSPI_PINCTRL_DEFINE(n) PINCTRL_DT_INST_DEFINE(n);
#define SPI_MCUX_LPSPI_PINCTRL_INIT(n) .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),
#else
#define SPI_MCUX_LPSPI_PINCTRL_DEFINE(n)
#define SPI_MCUX_LPSPI_PINCTRL_INIT(n)
#endif /* CONFIG_PINCTRL */
#define SPI_MCUX_LPSPI_INIT(n) \ #define SPI_MCUX_LPSPI_INIT(n) \
SPI_MCUX_LPSPI_PINCTRL_DEFINE(n) \ PINCTRL_DT_INST_DEFINE(n); \
\ \
static void spi_mcux_config_func_##n(const struct device *dev); \ static void spi_mcux_config_func_##n(const struct device *dev); \
\ \
@ -649,7 +634,7 @@ static const struct spi_driver_api spi_mcux_driver_api = {
.transfer_delay = UTIL_AND( \ .transfer_delay = UTIL_AND( \
DT_INST_NODE_HAS_PROP(n, transfer_delay), \ DT_INST_NODE_HAS_PROP(n, transfer_delay), \
DT_INST_PROP(n, transfer_delay)), \ DT_INST_PROP(n, transfer_delay)), \
SPI_MCUX_LPSPI_PINCTRL_INIT(n) \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
}; \ }; \
\ \
static struct spi_mcux_data spi_mcux_data_##n = { \ static struct spi_mcux_data spi_mcux_data_##n = { \