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drivers: clock: stm32f7 needs power over-drive to reach 216Mhz

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Assuming we stay on default Power Scale 1,
overdrive is required when System Core Clock frequency is higher
than 180MHz.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This commit is contained in:
Alexandre Bourdiol 2020-09-01 10:29:36 +02:00 • committed by Kumar Gala
commit 980848af43
2 changed files with 15 additions and 0 deletions
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14
drivers/clock_control/clock_stm32_ll_common.c
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@ -327,6 +327,20 @@ static int stm32_clock_control_init(const struct device *dev)
stm32_clock_switch_to_hsi(LL_RCC_SYSCLK_DIV_1);
LL_RCC_PLL_Disable();
#ifdef CONFIG_SOC_SERIES_STM32F7X
/* Assuming we stay on Power Scale default value: Power Scale 1 */
if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC > 180000000) {
LL_PWR_EnableOverDriveMode();
while (LL_PWR_IsActiveFlag_OD() != 1) {
/* Wait for OverDrive mode ready */
}
LL_PWR_EnableOverDriveSwitching();
while (LL_PWR_IsActiveFlag_ODSW() != 1) {
/* Wait for OverDrive switch ready */
}
}
#endif
#ifdef CONFIG_CLOCK_STM32_PLL_Q_DIVISOR
MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ,
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR