boards: stm32f429i_disc1: add SPI5 support
Add support of RCC configuration. Add pinmux items Signed-off-by: Pavlo Hamov <pavlo_hamov@jabil.com>
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6 changed files with 34 additions and 0 deletions
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@ -24,4 +24,11 @@ config I2C_3
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endif # I2C
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if SPI
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config SPI_5
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default y
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endif # SPI
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endif # BOARD_STM32F429I_DISC1
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@ -95,6 +95,8 @@ The Zephyr stm32f429i_disc1 board configuration supports the following hardware
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-----------+------------+-------------------------------------+
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| SPI | on-chip | spi |
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+-----------+------------+-------------------------------------+
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Other hardware features are not yet supported on Zephyr porting.
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@ -126,6 +128,10 @@ Default Zephyr Peripheral Mapping:
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- I2C_2_SDA : PB11
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- I2C_3_SCL : PA8
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- I2C_3_SDA : PC9
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- SPI_5_CS : PF6
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- SPI_5_SCK : PF7
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- SPI_5_MISO : PF8
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- SPI_5_MOSI : PF9
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System Clock
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============
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@ -22,6 +22,14 @@ static const struct pin_config pinconf[] = {
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{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
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{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
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#endif /* CONFIG_UART_2 */
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#ifdef CONFIG_SPI_5
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#ifdef CONFIG_SPI_STM32_USE_HW_SS
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{STM32_PIN_PF6, STM32F4_PINMUX_FUNC_PF6_SPI5_MASTER_NSS},
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#endif /* CONFIG_SPI_STM32_USE_HW_SS */
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{STM32_PIN_PF7, STM32F4_PINMUX_FUNC_PF7_SPI5_MASTER_SCK},
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{STM32_PIN_PF8, STM32F4_PINMUX_FUNC_PF8_SPI5_MASTER_MISO},
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{STM32_PIN_PF9, STM32F4_PINMUX_FUNC_PF9_SPI5_MASTER_MOSI},
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#endif /* CONFIG_SPI_5 */
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#ifdef CONFIG_I2C_1
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{STM32_PIN_PB8, STM32F4_PINMUX_FUNC_PB8_I2C1_SCL},
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{STM32_PIN_PB9, STM32F4_PINMUX_FUNC_PB9_I2C1_SDA},
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@ -11,3 +11,4 @@ flash: 2048
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supported:
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- counter
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- i2c
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- spi
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@ -458,21 +458,30 @@
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(STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_NOPULL)
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#define STM32F4_PINMUX_FUNC_PF6_ADC3_IN4 \
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STM32_MODER_ANALOG_MODE
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#define STM32F4_PINMUX_FUNC_PF6_SPI5_MASTER_NSS \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_PULLUP)
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#define STM32F4_PINMUX_FUNC_PF7_UART7_TX \
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(STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_PULLUP)
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#define STM32F4_PINMUX_FUNC_PF7_ADC3_IN5 \
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STM32_MODER_ANALOG_MODE
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#define STM32F4_PINMUX_FUNC_PF7_SPI5_MASTER_SCK \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL | \
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STM32_OSPEEDR_VERY_HIGH_SPEED)
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#define STM32F4_PINMUX_FUNC_PF8_UART8_RX \
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(STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_NOPULL)
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#define STM32F4_PINMUX_FUNC_PF8_ADC3_IN6 \
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STM32_MODER_ANALOG_MODE
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#define STM32F4_PINMUX_FUNC_PF8_SPI5_MASTER_MISO \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
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#define STM32F4_PINMUX_FUNC_PF9_UART8_TX \
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(STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_PULLUP)
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#define STM32F4_PINMUX_FUNC_PF9_ADC3_IN7 \
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STM32_MODER_ANALOG_MODE
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#define STM32F4_PINMUX_FUNC_PF9_SPI5_MASTER_MOSI \
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(STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN)
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#define STM32F4_PINMUX_FUNC_PF10_ADC3_IN8 \
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STM32_MODER_ANALOG_MODE
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@ -53,6 +53,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40013400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00002000>;
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interrupts = <84 5>;
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status = "disabled";
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label = "SPI_4";
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@ -66,6 +67,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40015000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00100000>;
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interrupts = <85 5>;
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status = "disabled";
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label = "SPI_5";
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@ -79,6 +81,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40015400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00200000>;
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interrupts = <86 5>;
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status = "disabled";
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label = "SPI_6";
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