arm: fix assembler offset errors on Cortex-M0
In some kernel configurations, the offset can be greater than the maximum of 124 for ldr/str immediate offsets. Fixes: #9113 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
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@ -126,9 +126,23 @@ SECTION_FUNC(TEXT, __pendsv)
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str v3, [v4, #0]
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/* Restore previous interrupt disable state (irq_lock key) */
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#if (defined(CONFIG_CPU_CORTEX_M0PLUS) || defined(CONFIG_CPU_CORTEX_M0)) && \
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_thread_offset_to_basepri > 124
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/* Doing it this way since the offset to thread->arch.basepri can in
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* some configurations be larger than the maximum of 124 for ldr/str
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* immediate offsets.
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*/
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ldr r4, =_thread_offset_to_basepri
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adds r4, r2, r4
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ldr r0, [r4]
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movs.n r3, #0
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str r3, [r4]
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#else
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ldr r0, [r2, #_thread_offset_to_basepri]
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movs.n r3, #0
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str r3, [r2, #_thread_offset_to_basepri]
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#endif
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#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
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/* BASEPRI not available, previous interrupt disable state
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