diff --git a/boards/arm/arduino_zero/arduino_zero-pinctrl.dtsi b/boards/arm/arduino_zero/arduino_zero-pinctrl.dtsi
index 00920c015d1..52b04cd64a5 100644
--- a/boards/arm/arduino_zero/arduino_zero-pinctrl.dtsi
+++ b/boards/arm/arduino_zero/arduino_zero-pinctrl.dtsi
@@ -6,6 +6,12 @@
 #include <dt-bindings/pinctrl/samd21-da1gXabcd-pinctrl.h>
 
 &pinctrl {
+	dac_default: dac_default {
+		group1 {
+			pinmux = <PA2B_DAC_VOUT>;
+		};
+	};
+
 	pwm_default: pwm_default {
 		group1 {
 			pinmux = <PA17E_TCC2_WO1>;
diff --git a/boards/arm/arduino_zero/arduino_zero.dts b/boards/arm/arduino_zero/arduino_zero.dts
index 3894633fe01..aecc25c68ff 100644
--- a/boards/arm/arduino_zero/arduino_zero.dts
+++ b/boards/arm/arduino_zero/arduino_zero.dts
@@ -103,6 +103,9 @@
 
 &dac0 {
 	status = "okay";
+
+	pinctrl-0 = <&dac_default>;
+	pinctrl-names = "default";
 };
 
 &flash0 {
diff --git a/boards/arm/arduino_zero/pinmux.c b/boards/arm/arduino_zero/pinmux.c
index 9d40089fb80..0821f04074f 100644
--- a/boards/arm/arduino_zero/pinmux.c
+++ b/boards/arm/arduino_zero/pinmux.c
@@ -22,10 +22,6 @@ static int board_pinmux_init(const struct device *dev)
 		return -ENXIO;
 	}
 
-#if DT_NODE_HAS_STATUS(DT_NODELABEL(dac0), okay) && defined(CONFIG_DAC_SAM0)
-	/* DAC on PA02 */
-	pinmux_pin_set(muxa, 2, PINMUX_FUNC_B);
-#endif
 	return 0;
 }
 
diff --git a/drivers/dac/dac_sam0.c b/drivers/dac/dac_sam0.c
index c810811253a..2a94c53bd0d 100644
--- a/drivers/dac/dac_sam0.c
+++ b/drivers/dac/dac_sam0.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 
 #include <drivers/dac.h>
+#include <drivers/pinctrl.h>
 #include <soc.h>
 
 /*
@@ -23,6 +24,7 @@
 
 struct dac_sam0_cfg {
 	Dac *regs;
+	const struct pinctrl_dev_config *pcfg;
 	uint8_t pm_apbc_bit;
 	uint8_t gclk_clkctrl_id;
 	uint8_t refsel;
@@ -62,11 +64,17 @@ static int dac_sam0_init(const struct device *dev)
 {
 	const struct dac_sam0_cfg *const cfg = dev->config;
 	Dac *regs = cfg->regs;
+	int retval;
 
 	/* Enable the GCLK */
 	GCLK->CLKCTRL.reg = cfg->gclk_clkctrl_id | GCLK_CLKCTRL_GEN_GCLK0 |
 			    GCLK_CLKCTRL_CLKEN;
 
+	retval = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
+	if (retval < 0) {
+		return retval;
+	}
+
 	/* Enable the clock in PM */
 	PM->APBCMASK.reg |= 1 << cfg->pm_apbc_bit;
 
@@ -96,8 +104,10 @@ static const struct dac_driver_api api_sam0_driver_api = {
 		    (DT_INST_ENUM_IDX(n, reference)), (0))
 
 #define SAM0_DAC_INIT(n)						       \
+	PINCTRL_DT_INST_DEFINE(n);					       \
 	static const struct dac_sam0_cfg dac_sam0_cfg_##n = {		       \
 		.regs = (Dac *)DT_INST_REG_ADDR(n),			       \
+		.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),		       \
 		.pm_apbc_bit = DT_INST_CLOCKS_CELL_BY_NAME(n, pm, bit),	       \
 		.gclk_clkctrl_id =					       \
 			DT_INST_CLOCKS_CELL_BY_NAME(n, gclk, clkctrl_id),      \
diff --git a/dts/bindings/dac/atmel,sam0-dac.yaml b/dts/bindings/dac/atmel,sam0-dac.yaml
index 931f69803c5..498652a17c0 100644
--- a/dts/bindings/dac/atmel,sam0-dac.yaml
+++ b/dts/bindings/dac/atmel,sam0-dac.yaml
@@ -5,7 +5,9 @@ description: Atmel SAM0 family DAC
 
 compatible: "atmel,sam0-dac"
 
-include: dac-controller.yaml
+include:
+    - name: dac-controller.yaml
+    - name: pinctrl-device.yaml
 
 properties:
     reg: