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device: Fix structure attributes access

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Since struct devconfig was merged earlier into struct device, let's fix
accessing config_info, name, ... attributes everywhere via:

grep -rlZ 'dev->config->' | xargs -0 sed -i 's/dev->config->/dev->/g'

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2020-03-09 12:49:07 +01:00 • committed by Carles Cufí
commit 97326c0445
348 changed files with 1155 additions and 1174 deletions
Download patch file Download diff file Expand all files Collapse all files

2
boards/arm/thingy52_nrf52832/board.c
View file

@ -18,7 +18,7 @@ struct pwr_ctrl_cfg {
static int pwr_ctrl_init(struct device *dev)
{
const struct pwr_ctrl_cfg *cfg = dev->config->config_info;
const struct pwr_ctrl_cfg *cfg = dev->config_info;
struct device *gpio;
gpio = device_get_binding(cfg->port);

2
doc/guides/dts/howtos.rst
View file

@ -399,7 +399,7 @@ As shown above, the driver uses additional information from
:file:`devicetree.h` to create :ref:`struct device <device_struct>` instances
than just the node label. Devicetree property values used to configure the
device at boot time are stored in ROM in the value pointed to by a
``device->config->config_info`` field. This allows users to configure your
``device->config_info`` field. This allows users to configure your
driver using overlays.
The Zephyr convention is to name each ``struct device`` using its devicetree

2
doc/reference/drivers/index.rst
View file

@ -261,7 +261,7 @@ In the implementation of the common init function:
int my_driver_init(struct device *device)
{
const struct my_driver_config *config = device->config->config_info;
const struct my_driver_config *config = device->config_info;
/* Do other initialization stuff */
...

14
drivers/adc/adc_lmp90xxx.c
View file

@ -175,7 +175,7 @@ static inline u8_t lmp90xxx_inst2_sz(size_t len)
static int lmp90xxx_read_reg(struct device *dev, u8_t addr, u8_t *dptr,
size_t len)
{
const struct lmp90xxx_config *config = dev->config->config_info;
const struct lmp90xxx_config *config = dev->config_info;
struct lmp90xxx_data *data = dev->driver_data;
u8_t ura = LMP90XXX_URA(addr);
u8_t inst1_uab[2] = { LMP90XXX_INST1_WAB, ura };
@ -249,7 +249,7 @@ static int lmp90xxx_read_reg8(struct device *dev, u8_t addr, u8_t *val)
static int lmp90xxx_write_reg(struct device *dev, u8_t addr, u8_t *dptr,
size_t len)
{
const struct lmp90xxx_config *config = dev->config->config_info;
const struct lmp90xxx_config *config = dev->config_info;
struct lmp90xxx_data *data = dev->driver_data;
u8_t ura = LMP90XXX_URA(addr);
u8_t inst1_uab[2] = { LMP90XXX_INST1_WAB, ura };
@ -327,7 +327,7 @@ static int lmp90xxx_soft_reset(struct device *dev)
static inline bool lmp90xxx_has_channel(struct device *dev, u8_t channel)
{
const struct lmp90xxx_config *config = dev->config->config_info;
const struct lmp90xxx_config *config = dev->config_info;
if (channel >= config->channels) {
return false;
@ -338,7 +338,7 @@ static inline bool lmp90xxx_has_channel(struct device *dev, u8_t channel)
static inline bool lmp90xxx_has_input(struct device *dev, u8_t input)
{
const struct lmp90xxx_config *config = dev->config->config_info;
const struct lmp90xxx_config *config = dev->config_info;
if (input >= LMP90XXX_MAX_INPUTS) {
return false;
@ -496,7 +496,7 @@ static int lmp90xxx_validate_buffer_size(const struct adc_sequence *sequence)
static int lmp90xxx_adc_start_read(struct device *dev,
const struct adc_sequence *sequence)
{
const struct lmp90xxx_config *config = dev->config->config_info;
const struct lmp90xxx_config *config = dev->config_info;
struct lmp90xxx_data *data = dev->driver_data;
int err;
@ -569,7 +569,7 @@ static void adc_context_update_buffer_pointer(struct adc_context *ctx,
static int lmp90xxx_adc_read_channel(struct device *dev, u8_t channel,
s32_t *result)
{
const struct lmp90xxx_config *config = dev->config->config_info;
const struct lmp90xxx_config *config = dev->config_info;
struct lmp90xxx_data *data = dev->driver_data;
u8_t adc_done;
u8_t ch_scan;
@ -913,7 +913,7 @@ int lmp90xxx_gpio_port_toggle_bits(struct device *dev, gpio_port_pins_t pins)
static int lmp90xxx_init(struct device *dev)
{
const struct lmp90xxx_config *config = dev->config->config_info;
const struct lmp90xxx_config *config = dev->config_info;
struct lmp90xxx_data *data = dev->driver_data;
struct device *drdyb_dev;
int err;

10
drivers/adc/adc_mcp320x.c
View file

@ -51,7 +51,7 @@ struct mcp320x_data {
static int mcp320x_channel_setup(struct device *dev,
const struct adc_channel_cfg *channel_cfg)
{
const struct mcp320x_config *config = dev->config->config_info;
const struct mcp320x_config *config = dev->config_info;
struct mcp320x_data *data = dev->driver_data;
if (channel_cfg->gain != ADC_GAIN_1) {
@ -85,7 +85,7 @@ static int mcp320x_channel_setup(struct device *dev,
static int mcp320x_validate_buffer_size(struct device *dev,
const struct adc_sequence *sequence)
{
const struct mcp320x_config *config = dev->config->config_info;
const struct mcp320x_config *config = dev->config_info;
u8_t channels = 0;
size_t needed;
u32_t mask;
@ -111,7 +111,7 @@ static int mcp320x_validate_buffer_size(struct device *dev,
static int mcp320x_start_read(struct device *dev,
const struct adc_sequence *sequence)
{
const struct mcp320x_config *config = dev->config->config_info;
const struct mcp320x_config *config = dev->config_info;
struct mcp320x_data *data = dev->driver_data;
int err;
@ -180,7 +180,7 @@ static void adc_context_update_buffer_pointer(struct adc_context *ctx,
static int mcp320x_read_channel(struct device *dev, u8_t channel, u16_t *result)
{
const struct mcp320x_config *config = dev->config->config_info;
const struct mcp320x_config *config = dev->config_info;
struct mcp320x_data *data = dev->driver_data;
u8_t tx_bytes[2];
u8_t rx_bytes[2];
@ -272,7 +272,7 @@ static void mcp320x_acquisition_thread(struct device *dev)
static int mcp320x_init(struct device *dev)
{
const struct mcp320x_config *config = dev->config->config_info;
const struct mcp320x_config *config = dev->config_info;
struct mcp320x_data *data = dev->driver_data;
k_sem_init(&data->sem, 0, 1);

8
drivers/adc/adc_mcux_adc12.c
View file

@ -73,7 +73,7 @@ static int mcux_adc12_channel_setup(struct device *dev,
static int mcux_adc12_start_read(struct device *dev,
const struct adc_sequence *sequence)
{
const struct mcux_adc12_config *config = dev->config->config_info;
const struct mcux_adc12_config *config = dev->config_info;
struct mcux_adc12_data *data = dev->driver_data;
adc12_hardware_average_mode_t mode;
adc12_resolution_t resolution;
@ -152,7 +152,7 @@ static int mcux_adc12_read(struct device *dev,
static void mcux_adc12_start_channel(struct device *dev)
{
const struct mcux_adc12_config *config = dev->config->config_info;
const struct mcux_adc12_config *config = dev->config_info;
struct mcux_adc12_data *data = dev->driver_data;
adc12_channel_config_t channel_config;
@ -191,7 +191,7 @@ static void adc_context_update_buffer_pointer(struct adc_context *ctx,
static void mcux_adc12_isr(void *arg)
{
struct device *dev = (struct device *)arg;
const struct mcux_adc12_config *config = dev->config->config_info;
const struct mcux_adc12_config *config = dev->config_info;
struct mcux_adc12_data *data = dev->driver_data;
ADC_Type *base = config->base;
u32_t channel_group = 0U;
@ -213,7 +213,7 @@ static void mcux_adc12_isr(void *arg)
static int mcux_adc12_init(struct device *dev)
{
const struct mcux_adc12_config *config = dev->config->config_info;
const struct mcux_adc12_config *config = dev->config_info;
struct mcux_adc12_data *data = dev->driver_data;
ADC_Type *base = config->base;
adc12_config_t adc_config;

8
drivers/adc/adc_mcux_adc16.c
View file

@ -66,7 +66,7 @@ static int mcux_adc16_channel_setup(struct device *dev,
static int start_read(struct device *dev, const struct adc_sequence *sequence)
{
const struct mcux_adc16_config *config = dev->config->config_info;
const struct mcux_adc16_config *config = dev->config_info;
struct mcux_adc16_data *data = dev->driver_data;
adc16_hardware_average_mode_t mode;
adc16_resolution_t resolution;
@ -162,7 +162,7 @@ static int mcux_adc16_read_async(struct device *dev,
static void mcux_adc16_start_channel(struct device *dev)
{
const struct mcux_adc16_config *config = dev->config->config_info;
const struct mcux_adc16_config *config = dev->config_info;
struct mcux_adc16_data *data = dev->driver_data;
adc16_channel_config_t channel_config;
@ -205,7 +205,7 @@ static void adc_context_update_buffer_pointer(struct adc_context *ctx,
static void mcux_adc16_isr(void *arg)
{
struct device *dev = (struct device *)arg;
const struct mcux_adc16_config *config = dev->config->config_info;
const struct mcux_adc16_config *config = dev->config_info;
struct mcux_adc16_data *data = dev->driver_data;
ADC_Type *base = config->base;
u32_t channel_group = 0U;
@ -227,7 +227,7 @@ static void mcux_adc16_isr(void *arg)
static int mcux_adc16_init(struct device *dev)
{
const struct mcux_adc16_config *config = dev->config->config_info;
const struct mcux_adc16_config *config = dev->config_info;
struct mcux_adc16_data *data = dev->driver_data;
ADC_Type *base = config->base;
adc16_config_t adc_config;

2
drivers/adc/adc_nrfx_adc.c
View file

@ -257,7 +257,7 @@ static int init_adc(struct device *dev)
if (result != NRFX_SUCCESS) {
LOG_ERR("Failed to initialize device: %s",
dev->config->name);
dev->name);
return -EBUSY;
}

2
drivers/adc/adc_sam0.c
View file

@ -59,7 +59,7 @@ struct adc_sam0_cfg {
};
#define DEV_CFG(dev) \
((const struct adc_sam0_cfg *const)(dev)->config->config_info)
((const struct adc_sam0_cfg *const)(dev)->config_info)
#define DEV_DATA(dev) \
((struct adc_sam0_data *)(dev)->driver_data)

2
drivers/adc/adc_sam_afec.c
View file

@ -63,7 +63,7 @@ struct adc_sam_cfg {
};
#define DEV_CFG(dev) \
((const struct adc_sam_cfg *const)(dev)->config->config_info)
((const struct adc_sam_cfg *const)(dev)->config_info)
#define DEV_DATA(dev) \
((struct adc_sam_data *)(dev)->driver_data)

12
drivers/adc/adc_stm32.c
View file

@ -245,7 +245,7 @@ static int check_buffer_size(const struct adc_sequence *sequence,
static void adc_stm32_start_conversion(struct device *dev)
{
const struct adc_stm32_cfg *config = dev->config->config_info;
const struct adc_stm32_cfg *config = dev->config_info;
ADC_TypeDef *adc = (ADC_TypeDef *)config->base;
LOG_DBG("Starting conversion");
@ -265,7 +265,7 @@ static void adc_stm32_start_conversion(struct device *dev)
static int start_read(struct device *dev, const struct adc_sequence *sequence)
{
const struct adc_stm32_cfg *config = dev->config->config_info;
const struct adc_stm32_cfg *config = dev->config_info;
struct adc_stm32_data *data = dev->driver_data;
ADC_TypeDef *adc = (ADC_TypeDef *)config->base;
u8_t resolution;
@ -390,7 +390,7 @@ static void adc_stm32_isr(void *arg)
struct device *dev = (struct device *)arg;
struct adc_stm32_data *data = (struct adc_stm32_data *)dev->driver_data;
struct adc_stm32_cfg *config =
(struct adc_stm32_cfg *)dev->config->config_info;
(struct adc_stm32_cfg *)dev->config_info;
ADC_TypeDef *adc = config->base;
*data->buffer++ = LL_ADC_REG_ReadConversionData32(adc);
@ -450,7 +450,7 @@ static void adc_stm32_setup_speed(struct device *dev, u8_t id,
u8_t acq_time_index)
{
struct adc_stm32_cfg *config =
(struct adc_stm32_cfg *)dev->config->config_info;
(struct adc_stm32_cfg *)dev->config_info;
ADC_TypeDef *adc = config->base;
#if defined(CONFIG_SOC_SERIES_STM32F0X) || defined(CONFIG_SOC_SERIES_STM32L0X)
@ -523,7 +523,7 @@ static int adc_stm32_channel_setup(struct device *dev,
static void adc_stm32_calib(struct device *dev)
{
struct adc_stm32_cfg *config =
(struct adc_stm32_cfg *)dev->config->config_info;
(struct adc_stm32_cfg *)dev->config_info;
ADC_TypeDef *adc = config->base;
#if defined(CONFIG_SOC_SERIES_STM32F3X) || \
@ -545,7 +545,7 @@ static void adc_stm32_calib(struct device *dev)
static int adc_stm32_init(struct device *dev)
{
struct adc_stm32_data *data = dev->driver_data;
const struct adc_stm32_cfg *config = dev->config->config_info;
const struct adc_stm32_cfg *config = dev->config_info;
struct device *clk =
device_get_binding(STM32_CLOCK_CONTROL_NAME);
ADC_TypeDef *adc = (ADC_TypeDef *)config->base;

2
drivers/audio/intel_dmic.c
View file

@ -1310,7 +1310,7 @@ static int dmic_initialize_device(struct device *dev)
/* Set state, note there is no playback direction support */
dmic_private.state = DMIC_STATE_INITIALIZED;
LOG_DBG("Device %s Initialized", dev->config->name);
LOG_DBG("Device %s Initialized", dev->name);
return 0;
}

2
drivers/audio/mpxxdtyy.h
View file

@ -20,7 +20,7 @@ extern "C" {
#define MPXXDTYY_MAX_PDM_FREQ 3250000 /* 3.25MHz */
#define DEV_CFG(dev) \
((struct mpxxdtyy_config *const)(dev)->config->config_info)
((struct mpxxdtyy_config *const)(dev)->config_info)
#define DEV_DATA(dev) \
((struct mpxxdtyy_data *const)(dev)->driver_data)

2
drivers/audio/tlv320dac310x.c
View file

@ -51,7 +51,7 @@ static struct codec_driver_config codec_device_config = {
static struct codec_driver_data codec_device_data;
#define DEV_CFG(dev) \
((struct codec_driver_config *const)(dev)->config->config_info)
((struct codec_driver_config *const)(dev)->config_info)
#define DEV_DATA(dev) \
((struct codec_driver_data *const)(dev)->driver_data)

7
drivers/can/can_loopback.c
View file

@ -98,7 +98,7 @@ int can_loopback_send(struct device *dev, const struct zcan_frame *frame,
struct k_sem tx_sem;
LOG_DBG("Sending %d bytes on %s. Id: 0x%x, ID type: %s %s",
frame->dlc, dev->config->name,
frame->dlc, dev->name,
frame->id_type == CAN_STANDARD_IDENTIFIER ?
frame->std_id : frame->ext_id,
frame->id_type == CAN_STANDARD_IDENTIFIER ?
@ -267,7 +267,8 @@ static int can_loopback_init(struct device *dev)
return -1;
}
LOG_INF("Init of %s done", dev->config->name);
LOG_INF("Init of %s done", dev->name);
return 0;
}
@ -290,7 +291,7 @@ static int socket_can_init_1(struct device *dev)
struct socket_can_context *socket_context = dev->driver_data;
LOG_DBG("Init socket CAN device %p (%s) for dev %p (%s)",
dev, dev->config->name, can_dev, can_dev->config->name);
dev, dev->name, can_dev, can_dev->name);
socket_context->can_dev = can_dev;
socket_context->msgq = &socket_can_msgq;

2
drivers/can/can_loopback.h
View file

@ -12,7 +12,7 @@
#define DEV_DATA(dev) ((struct can_loopback_data *const)(dev)->driver_data)
#define DEV_CFG(dev) \
((const struct can_loopback_config *const)(dev)->config->config_info)
((const struct can_loopback_config *const)(dev)->config_info)
struct can_loopback_filter {
can_rx_callback_t rx_cb;

2
drivers/can/can_mcp2515.h
View file

@ -15,7 +15,7 @@
#define MCP2515_FRAME_LEN 13
#define DEV_CFG(dev) \
((const struct mcp2515_config *const)(dev)->config->config_info)
((const struct mcp2515_config *const)(dev)->config_info)
#define DEV_DATA(dev) ((struct mcp2515_data *const)(dev)->driver_data)
struct mcp2515_tx_cb {

22
drivers/can/can_mcux_flexcan.c
View file

@ -95,7 +95,7 @@ struct mcux_flexcan_data {
static int mcux_flexcan_configure(struct device *dev, enum can_mode mode,
u32_t bitrate)
{
const struct mcux_flexcan_config *config = dev->config->config_info;
const struct mcux_flexcan_config *config = dev->config_info;
flexcan_config_t flexcan_config;
struct device *clock_dev;
u32_t clock_freq;
@ -249,7 +249,7 @@ static int mcux_flexcan_send(struct device *dev, const struct zcan_frame *msg,
k_timeout_t timeout,
can_tx_callback_t callback_isr, void *callback_arg)
{
const struct mcux_flexcan_config *config = dev->config->config_info;
const struct mcux_flexcan_config *config = dev->config_info;
struct mcux_flexcan_data *data = dev->driver_data;
flexcan_mb_transfer_t xfer;
status_t status;
@ -299,7 +299,7 @@ static int mcux_flexcan_attach_isr(struct device *dev, can_rx_callback_t isr,
void *callback_arg,
const struct zcan_filter *filter)
{
const struct mcux_flexcan_config *config = dev->config->config_info;
const struct mcux_flexcan_config *config = dev->config_info;
struct mcux_flexcan_data *data = dev->driver_data;
flexcan_mb_transfer_t xfer;
status_t status;
@ -361,7 +361,7 @@ static void mcux_flexcan_register_state_change_isr(struct device *dev,
static enum can_state mcux_flexcan_get_state(struct device *dev,
struct can_bus_err_cnt *err_cnt)
{
const struct mcux_flexcan_config *config = dev->config->config_info;
const struct mcux_flexcan_config *config = dev->config_info;
u32_t status_flags;
if (err_cnt) {
@ -386,7 +386,7 @@ static enum can_state mcux_flexcan_get_state(struct device *dev,
#ifndef CONFIG_CAN_AUTO_BUS_OFF_RECOVERY
int mcux_flexcan_recover(struct device *dev, k_timeout_t timeout)
{
const struct mcux_flexcan_config *config = dev->config->config_info;
const struct mcux_flexcan_config *config = dev->config_info;
int ret = 0;
u64_t start_time;
@ -414,7 +414,7 @@ int mcux_flexcan_recover(struct device *dev, k_timeout_t timeout)
static void mcux_flexcan_detach(struct device *dev, int filter_id)
{
const struct mcux_flexcan_config *config = dev->config->config_info;
const struct mcux_flexcan_config *config = dev->config_info;
struct mcux_flexcan_data *data = dev->driver_data;
if (filter_id >= MCUX_FLEXCAN_MAX_RX) {
@ -443,7 +443,7 @@ static void mcux_flexcan_detach(struct device *dev, int filter_id)
static inline void mcux_flexcan_transfer_error_status(struct device *dev,
u32_t error)
{
const struct mcux_flexcan_config *config = dev->config->config_info;
const struct mcux_flexcan_config *config = dev->config_info;
struct mcux_flexcan_data *data = dev->driver_data;
can_tx_callback_t function;
int status = CAN_TX_OK;
@ -545,7 +545,7 @@ static inline void mcux_flexcan_transfer_tx_idle(struct device *dev,
static inline void mcux_flexcan_transfer_rx_idle(struct device *dev,
u32_t mb)
{
const struct mcux_flexcan_config *config = dev->config->config_info;
const struct mcux_flexcan_config *config = dev->config_info;
struct mcux_flexcan_data *data = dev->driver_data;
can_rx_callback_t function;
flexcan_mb_transfer_t xfer;
@ -606,7 +606,7 @@ static void mcux_flexcan_transfer_callback(CAN_Type *base,
static void mcux_flexcan_isr(void *arg)
{
struct device *dev = (struct device *)arg;
const struct mcux_flexcan_config *config = dev->config->config_info;
const struct mcux_flexcan_config *config = dev->config_info;
struct mcux_flexcan_data *data = dev->driver_data;
FLEXCAN_TransferHandleIRQ(config->base, &data->handle);
@ -614,7 +614,7 @@ static void mcux_flexcan_isr(void *arg)
static int mcux_flexcan_init(struct device *dev)
{
const struct mcux_flexcan_config *config = dev->config->config_info;
const struct mcux_flexcan_config *config = dev->config_info;
struct mcux_flexcan_data *data = dev->driver_data;
int err;
int i;
@ -733,7 +733,7 @@ static int socket_can_init_0(struct device *dev)
struct socket_can_context *socket_context = dev->driver_data;
LOG_DBG("Init socket CAN device %p (%s) for dev %p (%s)",
dev, dev->config->name, can_dev, can_dev->config->name);
dev, dev->name, can_dev, can_dev->name);
socket_context->can_dev = can_dev;
socket_context->msgq = &socket_can_msgq;

2
drivers/can/can_net.c
View file

@ -390,7 +390,7 @@ static int net_can_init(struct device *dev)
}
NET_DBG("Init net CAN device %p (%s) for dev %p (%s)",
dev, dev->config->name, can_dev, can_dev->config->name);
dev, dev->name, can_dev, can_dev->name);
ctx->can_dev = can_dev;

10
drivers/can/can_stm32.c
View file

@ -378,7 +378,7 @@ int can_stm32_runtime_configure(struct device *dev, enum can_mode mode,
goto done;
}
LOG_DBG("Runtime configure of %s done", dev->config->name);
LOG_DBG("Runtime configure of %s done", dev->name);
ret = 0;
done:
k_mutex_unlock(&data->inst_mutex);
@ -456,7 +456,7 @@ static int can_stm32_init(struct device *dev)
cfg->config_irq(can);
can->IER |= CAN_IER_TMEIE;
LOG_INF("Init of %s done", dev->config->name);
LOG_INF("Init of %s done", dev->name);
return 0;
}
@ -558,7 +558,7 @@ int can_stm32_send(struct device *dev, const struct zcan_frame *msg,
"Id: 0x%x, "
"ID type: %s, "
"Remote Frame: %s"
, msg->dlc, dev->config->name
, msg->dlc, dev->name
, msg->id_type == CAN_STANDARD_IDENTIFIER ?
msg->std_id : msg->ext_id
, msg->id_type == CAN_STANDARD_IDENTIFIER ?
@ -1112,7 +1112,7 @@ static int socket_can_init_1(struct device *dev)
struct socket_can_context *socket_context = dev->driver_data;
LOG_DBG("Init socket CAN device %p (%s) for dev %p (%s)",
dev, dev->config->name, can_dev, can_dev->config->name);
dev, dev->name, can_dev, can_dev->name);
socket_context->can_dev = can_dev;
socket_context->msgq = &socket_can_msgq;
@ -1196,7 +1196,7 @@ static int socket_can_init_2(struct device *dev)
struct socket_can_context *socket_context = dev->driver_data;
LOG_DBG("Init socket CAN device %p (%s) for dev %p (%s)",
dev, dev->config->name, can_dev, can_dev->config->name);
dev, dev->name, can_dev, can_dev->name);
socket_context->can_dev = can_dev;
socket_context->msgq = &socket_can_msgq;

2
drivers/can/can_stm32.h
View file

@ -12,7 +12,7 @@
#define DEV_DATA(dev) ((struct can_stm32_data *const)(dev)->driver_data)
#define DEV_CFG(dev) \
((const struct can_stm32_config *const)(dev)->config->config_info)
((const struct can_stm32_config *const)(dev)->config_info)
#define BIT_SEG_LENGTH(cfg) ((cfg)->prop_ts1 + (cfg)->ts2 + 1)

4
drivers/clock_control/beetle_clock_control.c
View file

@ -133,7 +133,7 @@ static int beetle_clock_control_get_subsys_rate(struct device *clock,
{
#ifdef CONFIG_CLOCK_CONTROL_BEETLE_ENABLE_PLL
const struct beetle_clock_control_cfg_t * const cfg =
clock->config->config_info;
clock->config_info;
u32_t nc_mainclk = beetle_round_freq(cfg->freq);
*rate = nc_mainclk;
@ -219,7 +219,7 @@ static int beetle_clock_control_init(struct device *dev)
{
#ifdef CONFIG_CLOCK_CONTROL_BEETLE_ENABLE_PLL
const struct beetle_clock_control_cfg_t * const cfg =
dev->config->config_info;
dev->config_info;
/*
* Enable PLL if Beetle is configured to run at a different

2
drivers/clock_control/clock_control_mcux_pcc.c
View file

@ -22,7 +22,7 @@ struct mcux_pcc_config {
u32_t base_address;
};
#define DEV_CFG(dev) ((struct mcux_pcc_config *)(dev->config->config_info))
#define DEV_CFG(dev) ((struct mcux_pcc_config *)(dev->config_info))
#define DEV_BASE(dev) (DEV_CFG(dev)->base_address)
#ifndef MAKE_PCC_REGADDR
#define MAKE_PCC_REGADDR(base, offset) ((base) + (offset))

2
drivers/clock_control/clock_control_rv32m1_pcc.c
View file

@ -18,7 +18,7 @@ struct rv32m1_pcc_config {
u32_t base_address;
};
#define DEV_CFG(dev) ((struct rv32m1_pcc_config *)(dev->config->config_info))
#define DEV_CFG(dev) ((struct rv32m1_pcc_config *)(dev->config_info))
#define DEV_BASE(dev) (DEV_CFG(dev)->base_address)
static inline clock_ip_name_t clock_ip(struct device *dev,

2
drivers/clock_control/nrf_power_clock.c
View file

@ -113,7 +113,7 @@ static const struct nrf_clock_control_sub_config *get_sub_config(
enum clock_control_nrf_type type)
{
const struct nrf_clock_control_config *config =
dev->config->config_info;
dev->config_info;
return &config->subsys[type];
}

8
drivers/console/ipm_console_receiver.c
View file

@ -28,7 +28,7 @@ static void ipm_console_thread(void *arg1, void *arg2, void *arg3)
d = (struct device *)arg1;
driver_data = d->driver_data;
config_info = d->config->config_info;
config_info = d->config_info;
ARG_UNUSED(arg2);
size32 = 0U;
pos = 0;
@ -54,11 +54,11 @@ static void ipm_console_thread(void *arg1, void *arg2, void *arg3)
config_info->line_buf[pos + 1] = '\0';
}
if (config_info->flags & IPM_CONSOLE_PRINTK) {
printk("%s: '%s'\n", d->config->name,
printk("%s: '%s'\n", d->name,
config_info->line_buf);
}
if (config_info->flags & IPM_CONSOLE_STDOUT) {
printf("%s: '%s'\n", d->config->name,
printf("%s: '%s'\n", d->name,
config_info->line_buf);
}
pos = 0;
@ -118,7 +118,7 @@ static void ipm_console_receive_callback(void *context, u32_t id,
int ipm_console_receiver_init(struct device *d)
{
const struct ipm_console_receiver_config_info *config_info =
d->config->config_info;
d->config_info;
struct ipm_console_receiver_runtime_data *driver_data = d->driver_data;
struct device *ipm;

2
drivers/console/ipm_console_sender.c
View file

@ -37,7 +37,7 @@ int ipm_console_sender_init(struct device *d)
{
const struct ipm_console_sender_config_info *config_info;
config_info = d->config->config_info;
config_info = d->config_info;
ipm_console_device = device_get_binding(config_info->bind_to);
if (!ipm_console_device) {

20
drivers/console/uart_mux.c
View file

@ -175,7 +175,7 @@ static void uart_mux_rx_work(struct k_work *work)
char tmp[sizeof("RECV muxed ") + 10];
snprintk(tmp, sizeof(tmp), "RECV muxed %s",
uart_mux->uart->config->name);
uart_mux->uart->name);
LOG_HEXDUMP_DBG(data, len, log_strdup(tmp));
}
@ -209,7 +209,7 @@ static void uart_mux_tx_work(struct k_work *work)
sizeof(CONFIG_UART_MUX_DEVICE_NAME)];
snprintk(tmp, sizeof(tmp), "SEND %s",
dev_data->dev->config->name);
dev_data->dev->name);
LOG_HEXDUMP_DBG(data, len, log_strdup(tmp));
}
@ -234,7 +234,7 @@ static int uart_mux_init(struct device *dev)
k_work_init(&dev_data->cb_work, uart_mux_cb_work);
LOG_DBG("Device %s dev %p dev_data %p cfg %p created",
dev->config->name, dev, dev_data, dev->config->config_info);
dev->name, dev, dev_data, dev->config_info);
return 0;
}
@ -289,7 +289,7 @@ static void dlci_created_cb(struct gsm_dlci *dlci, bool connected,
dev_data->status = UART_MUX_DISCONNECTED;
}
LOG_DBG("%s %s", dev_data->dev->config->name,
LOG_DBG("%s %s", dev_data->dev->name,
dev_data->status == UART_MUX_CONNECTED ? "connected" :
"disconnected");
@ -335,7 +335,7 @@ static int init_real_uart(struct device *mux, struct device *uart,
real_uart->mux = gsm_mux_create(mux);
LOG_DBG("Initializing UART %s and GSM mux %p",
real_uart->uart->config->name, real_uart->mux);
real_uart->uart->name, real_uart->mux);
if (!real_uart->mux) {
real_uart->uart = NULL;
@ -375,7 +375,7 @@ static int attach(struct device *mux_uart, struct device *uart,
}
LOG_DBG("Attach DLCI %d (%s) to %s", dlci_address,
mux_uart->config->name, uart->config->name);
mux_uart->name, uart->name);
SYS_SLIST_FOR_EACH_NODE_SAFE(&uart_mux_data_devlist, sn, sns) {
struct uart_mux_dev_data *dev_data =
@ -509,7 +509,7 @@ static int uart_mux_fifo_read(struct device *dev, u8_t *rx_data, const int size)
}
LOG_DBG("%s size %d rx_ringbuf space %u",
dev->config->name, size,
dev->name, size,
ring_buf_space_get(dev_data->rx_ringbuf));
len = ring_buf_get(dev_data->rx_ringbuf, rx_data, size);
@ -744,7 +744,7 @@ int uart_mux_send(struct device *uart, const u8_t *buf, size_t size)
char tmp[sizeof("SEND muxed ") + 10];
snprintk(tmp, sizeof(tmp), "SEND muxed %s",
dev_data->real_uart->uart->config->name);
dev_data->real_uart->uart->name);
LOG_HEXDUMP_DBG(buf, size, log_strdup(tmp));
}
@ -765,7 +765,7 @@ int uart_mux_recv(struct device *mux, struct gsm_dlci *dlci, u8_t *data,
struct uart_mux_dev_data *dev_data = DEV_DATA(mux);
size_t wrote = 0;
LOG_DBG("%s: dlci %p data %p len %zd", mux->config->name, dlci,
LOG_DBG("%s: dlci %p data %p len %zd", mux->name, dlci,
data, len);
if (IS_ENABLED(CONFIG_UART_MUX_VERBOSE_DEBUG)) {
@ -773,7 +773,7 @@ int uart_mux_recv(struct device *mux, struct gsm_dlci *dlci, u8_t *data,
sizeof(CONFIG_UART_MUX_DEVICE_NAME)];
snprintk(tmp, sizeof(tmp), "RECV %s",
dev_data->dev->config->name);
dev_data->dev->name);
LOG_HEXDUMP_DBG(data, len, log_strdup(tmp));
}

4
drivers/counter/counter_gecko_rtcc.c
View file

@ -39,9 +39,9 @@ struct counter_gecko_data {
void *top_user_data;
};
#define DEV_NAME(dev) ((dev)->config->name)
#define DEV_NAME(dev) ((dev)->name)
#define DEV_CFG(dev) \
((struct counter_gecko_config * const)(dev)->config->config_info)
((struct counter_gecko_config * const)(dev)->config_info)
#define DEV_DATA(dev) \
((struct counter_gecko_data *const)(dev)->driver_data)

2
drivers/counter/counter_imx_epit.c
View file

@ -25,7 +25,7 @@ struct imx_epit_data {
static inline const struct imx_epit_config *get_epit_config(struct device *dev)
{
return CONTAINER_OF(dev->config->config_info, struct imx_epit_config,
return CONTAINER_OF(dev->config_info, struct imx_epit_config,
info);
}

8
drivers/counter/counter_ll_stm32_rtc.c
View file

@ -54,7 +54,7 @@ struct rtc_stm32_data {
#define DEV_DATA(dev) ((struct rtc_stm32_data *)(dev)->driver_data)
#define DEV_CFG(dev) \
((const struct rtc_stm32_config * const)(dev)->config->config_info)
((const struct rtc_stm32_config * const)(dev)->config_info)
static void rtc_stm32_irq_config(struct device *dev);
@ -202,7 +202,7 @@ static u32_t rtc_stm32_get_pending_int(struct device *dev)
static u32_t rtc_stm32_get_top_value(struct device *dev)
{
const struct counter_config_info *info = dev->config->config_info;
const struct counter_config_info *info = dev->config_info;
return info->max_top_value;
}
@ -211,7 +211,7 @@ static u32_t rtc_stm32_get_top_value(struct device *dev)
static int rtc_stm32_set_top_value(struct device *dev,
const struct counter_top_cfg *cfg)
{
const struct counter_config_info *info = dev->config->config_info;
const struct counter_config_info *info = dev->config_info;
if ((cfg->ticks != info->max_top_value) ||
!(cfg->flags & COUNTER_TOP_CFG_DONT_RESET)) {
@ -226,7 +226,7 @@ static int rtc_stm32_set_top_value(struct device *dev,
static u32_t rtc_stm32_get_max_relative_alarm(struct device *dev)
{
const struct counter_config_info *info = dev->config->config_info;
const struct counter_config_info *info = dev->config_info;
return info->max_top_value;
}

4
drivers/counter/counter_mchp_xec.c
View file

@ -48,11 +48,11 @@ struct counter_xec_data {
#define COUNTER_XEC_REG_BASE(_dev) \
((BTMR_Type *) \
((const struct counter_xec_config * const) \
_dev->config->config_info)->base_address)
_dev->config_info)->base_address)
#define COUNTER_XEC_CONFIG(_dev) \
(((const struct counter_xec_config * const) \
_dev->config->config_info))
_dev->config_info))
#define COUNTER_XEC_DATA(_dev) \
((struct counter_xec_data *)dev->driver_data)

22
drivers/counter/counter_mcux_gpt.c
View file

@ -28,7 +28,7 @@ struct mcux_gpt_data {
static int mcux_gpt_start(struct device *dev)
{
const struct mcux_gpt_config *config = dev->config->config_info;
const struct mcux_gpt_config *config = dev->config_info;
GPT_StartTimer(config->base);
@ -37,7 +37,7 @@ static int mcux_gpt_start(struct device *dev)
static int mcux_gpt_stop(struct device *dev)
{
const struct mcux_gpt_config *config = dev->config->config_info;
const struct mcux_gpt_config *config = dev->config_info;
GPT_StopTimer(config->base);
@ -46,7 +46,7 @@ static int mcux_gpt_stop(struct device *dev)
static int mcux_gpt_get_value(struct device *dev, u32_t *ticks)
{
const struct mcux_gpt_config *config = dev->config->config_info;
const struct mcux_gpt_config *config = dev->config_info;
*ticks = GPT_GetCurrentTimerCount(config->base);
return 0;
@ -55,7 +55,7 @@ static int mcux_gpt_get_value(struct device *dev, u32_t *ticks)
static int mcux_gpt_set_alarm(struct device *dev, u8_t chan_id,
const struct counter_alarm_cfg *alarm_cfg)
{
const struct mcux_gpt_config *config = dev->config->config_info;
const struct mcux_gpt_config *config = dev->config_info;
struct mcux_gpt_data *data = dev->driver_data;
u32_t current = GPT_GetCurrentTimerCount(config->base);
@ -86,7 +86,7 @@ static int mcux_gpt_set_alarm(struct device *dev, u8_t chan_id,
static int mcux_gpt_cancel_alarm(struct device *dev, u8_t chan_id)
{
const struct mcux_gpt_config *config = dev->config->config_info;
const struct mcux_gpt_config *config = dev->config_info;
struct mcux_gpt_data *data = dev->driver_data;
if (chan_id != 0) {
@ -103,7 +103,7 @@ static int mcux_gpt_cancel_alarm(struct device *dev, u8_t chan_id)
void mcux_gpt_isr(void *p)
{
struct device *dev = p;
const struct mcux_gpt_config *config = dev->config->config_info;
const struct mcux_gpt_config *config = dev->config_info;
struct mcux_gpt_data *data = dev->driver_data;
u32_t current = GPT_GetCurrentTimerCount(config->base);
u32_t status;
@ -128,7 +128,7 @@ void mcux_gpt_isr(void *p)
static u32_t mcux_gpt_get_pending_int(struct device *dev)
{
const struct mcux_gpt_config *config = dev->config->config_info;
const struct mcux_gpt_config *config = dev->config_info;
return GPT_GetStatusFlags(config->base, kGPT_OutputCompare1Flag);
}
@ -136,7 +136,7 @@ static u32_t mcux_gpt_get_pending_int(struct device *dev)
static int mcux_gpt_set_top_value(struct device *dev,
const struct counter_top_cfg *cfg)
{
const struct mcux_gpt_config *config = dev->config->config_info;
const struct mcux_gpt_config *config = dev->config_info;
struct mcux_gpt_data *data = dev->driver_data;
if (cfg->ticks != config->info.max_top_value) {
@ -155,21 +155,21 @@ static int mcux_gpt_set_top_value(struct device *dev,
static u32_t mcux_gpt_get_top_value(struct device *dev)
{
const struct mcux_gpt_config *config = dev->config->config_info;
const struct mcux_gpt_config *config = dev->config_info;
return config->info.max_top_value;
}
static u32_t mcux_gpt_get_max_relative_alarm(struct device *dev)
{
const struct mcux_gpt_config *config = dev->config->config_info;
const struct mcux_gpt_config *config = dev->config_info;
return config->info.max_top_value;
}
static int mcux_gpt_init(struct device *dev)
{
const struct mcux_gpt_config *config = dev->config->config_info;
const struct mcux_gpt_config *config = dev->config_info;
gpt_config_t gptConfig;
u32_t clock_freq;

16
drivers/counter/counter_mcux_lptmr.c
View file

@ -28,7 +28,7 @@ struct mcux_lptmr_data {
static int mcux_lptmr_start(struct device *dev)
{
const struct mcux_lptmr_config *config = dev->config->config_info;
const struct mcux_lptmr_config *config = dev->config_info;
LPTMR_EnableInterrupts(config->base,
kLPTMR_TimerInterruptEnable);
@ -39,7 +39,7 @@ static int mcux_lptmr_start(struct device *dev)
static int mcux_lptmr_stop(struct device *dev)
{
const struct mcux_lptmr_config *config = dev->config->config_info;
const struct mcux_lptmr_config *config = dev->config_info;
LPTMR_DisableInterrupts(config->base,
kLPTMR_TimerInterruptEnable);
@ -50,7 +50,7 @@ static int mcux_lptmr_stop(struct device *dev)
static int mcux_lptmr_get_value(struct device *dev, u32_t *ticks)
{
const struct mcux_lptmr_config *config = dev->config->config_info;
const struct mcux_lptmr_config *config = dev->config_info;
*ticks = LPTMR_GetCurrentTimerCount(config->base);
@ -60,7 +60,7 @@ static int mcux_lptmr_get_value(struct device *dev, u32_t *ticks)
static int mcux_lptmr_set_top_value(struct device *dev,
const struct counter_top_cfg *cfg)
{
const struct mcux_lptmr_config *config = dev->config->config_info;
const struct mcux_lptmr_config *config = dev->config_info;
struct mcux_lptmr_data *data = dev->driver_data;
if (cfg->ticks == 0) {
@ -87,7 +87,7 @@ static int mcux_lptmr_set_top_value(struct device *dev,
static u32_t mcux_lptmr_get_pending_int(struct device *dev)
{
const struct mcux_lptmr_config *config = dev->config->config_info;
const struct mcux_lptmr_config *config = dev->config_info;
u32_t mask = LPTMR_CSR_TCF_MASK | LPTMR_CSR_TIE_MASK;
u32_t flags;
@ -98,7 +98,7 @@ static u32_t mcux_lptmr_get_pending_int(struct device *dev)
static u32_t mcux_lptmr_get_top_value(struct device *dev)
{
const struct mcux_lptmr_config *config = dev->config->config_info;
const struct mcux_lptmr_config *config = dev->config_info;
return (config->base->CMR & LPTMR_CMR_COMPARE_MASK) + 1U;
}
@ -114,7 +114,7 @@ static u32_t mcux_lptmr_get_max_relative_alarm(struct device *dev)
static void mcux_lptmr_isr(void *arg)
{
struct device *dev = arg;
const struct mcux_lptmr_config *config = dev->config->config_info;
const struct mcux_lptmr_config *config = dev->config_info;
struct mcux_lptmr_data *data = dev->driver_data;
u32_t flags;
@ -128,7 +128,7 @@ static void mcux_lptmr_isr(void *arg)
static int mcux_lptmr_init(struct device *dev)
{
const struct mcux_lptmr_config *config = dev->config->config_info;
const struct mcux_lptmr_config *config = dev->config_info;
lptmr_config_t lptmr_config;
LPTMR_GetDefaultConfig(&lptmr_config);

20
drivers/counter/counter_mcux_rtc.c
View file

@ -28,7 +28,7 @@ struct mcux_rtc_config {
static int mcux_rtc_start(struct device *dev)
{
const struct counter_config_info *info = dev->config->config_info;
const struct counter_config_info *info = dev->config_info;
const struct mcux_rtc_config *config =
CONTAINER_OF(info, struct mcux_rtc_config, info);
@ -43,7 +43,7 @@ static int mcux_rtc_start(struct device *dev)
static int mcux_rtc_stop(struct device *dev)
{
const struct counter_config_info *info = dev->config->config_info;
const struct counter_config_info *info = dev->config_info;
const struct mcux_rtc_config *config =
CONTAINER_OF(info, struct mcux_rtc_config, info);
@ -61,7 +61,7 @@ static int mcux_rtc_stop(struct device *dev)
static u32_t mcux_rtc_read(struct device *dev)
{
const struct counter_config_info *info = dev->config->config_info;
const struct counter_config_info *info = dev->config_info;
const struct mcux_rtc_config *config =
CONTAINER_OF(info, struct mcux_rtc_config, info);
@ -90,7 +90,7 @@ static int mcux_rtc_get_value(struct device *dev, u32_t *ticks)
static int mcux_rtc_set_alarm(struct device *dev, u8_t chan_id,
const struct counter_alarm_cfg *alarm_cfg)
{
const struct counter_config_info *info = dev->config->config_info;
const struct counter_config_info *info = dev->config_info;
const struct mcux_rtc_config *config =
CONTAINER_OF(info, struct mcux_rtc_config, info);
struct mcux_rtc_data *data = dev->driver_data;
@ -144,7 +144,7 @@ static int mcux_rtc_cancel_alarm(struct device *dev, u8_t chan_id)
static int mcux_rtc_set_top_value(struct device *dev,
const struct counter_top_cfg *cfg)
{
const struct counter_config_info *info = dev->config->config_info;
const struct counter_config_info *info = dev->config_info;
const struct mcux_rtc_config *config =
CONTAINER_OF(info, struct mcux_rtc_config, info);
struct mcux_rtc_data *data = dev->driver_data;
@ -168,7 +168,7 @@ static int mcux_rtc_set_top_value(struct device *dev,
static u32_t mcux_rtc_get_pending_int(struct device *dev)
{
const struct counter_config_info *info = dev->config->config_info;
const struct counter_config_info *info = dev->config_info;
const struct mcux_rtc_config *config =
CONTAINER_OF(info, struct mcux_rtc_config, info);
@ -177,14 +177,14 @@ static u32_t mcux_rtc_get_pending_int(struct device *dev)
static u32_t mcux_rtc_get_top_value(struct device *dev)
{
const struct counter_config_info *info = dev->config->config_info;
const struct counter_config_info *info = dev->config_info;
return info->max_top_value;
}
static u32_t mcux_rtc_get_max_relative_alarm(struct device *dev)
{
const struct counter_config_info *info = dev->config->config_info;
const struct counter_config_info *info = dev->config_info;
return info->max_top_value;
}
@ -192,7 +192,7 @@ static u32_t mcux_rtc_get_max_relative_alarm(struct device *dev)
static void mcux_rtc_isr(void *arg)
{
struct device *dev = arg;
const struct counter_config_info *info = dev->config->config_info;
const struct counter_config_info *info = dev->config_info;
const struct mcux_rtc_config *config =
CONTAINER_OF(info, struct mcux_rtc_config, info);
struct mcux_rtc_data *data = dev->driver_data;
@ -233,7 +233,7 @@ static void mcux_rtc_isr(void *arg)
static int mcux_rtc_init(struct device *dev)
{
const struct counter_config_info *info = dev->config->config_info;
const struct counter_config_info *info = dev->config_info;
const struct mcux_rtc_config *config =
CONTAINER_OF(info, struct mcux_rtc_config, info);
rtc_config_t rtc_config;

2
drivers/counter/counter_nrfx_rtc.c
View file

@ -74,7 +74,7 @@ static inline struct counter_nrfx_data *get_dev_data(struct device *dev)
static inline const struct counter_nrfx_config *get_nrfx_config(
struct device *dev)
{
return CONTAINER_OF(dev->config->config_info,
return CONTAINER_OF(dev->config_info,
struct counter_nrfx_config, info);
}

2
drivers/counter/counter_nrfx_timer.c
View file

@ -58,7 +58,7 @@ static inline struct counter_nrfx_data *get_dev_data(struct device *dev)
static inline const struct counter_nrfx_config *get_nrfx_config(
struct device *dev)
{
return CONTAINER_OF(dev->config->config_info,
return CONTAINER_OF(dev->config_info,
struct counter_nrfx_config, info);
}

2
drivers/counter/counter_sam0_tc32.c
View file

@ -42,7 +42,7 @@ struct counter_sam0_tc32_config {
};
#define DEV_CFG(dev) ((const struct counter_sam0_tc32_config *const) \
(dev)->config->config_info)
(dev)->config_info)
#define DEV_DATA(dev) ((struct counter_sam0_tc32_data *const) \
(dev)->driver_data)

24
drivers/counter/maxim_ds3231.c
View file

@ -149,7 +149,7 @@ static int sc_ctrl(struct device *dev,
u8_t clear)
{
struct ds3231_data *data = dev->driver_data;
const struct ds3231_config *cfg = dev->config->config_info;
const struct ds3231_config *cfg = dev->config_info;
struct register_map *rp = &data->registers;
u8_t ctrl = (rp->ctrl & ~clear) | set;
int rc = ctrl;
@ -201,7 +201,7 @@ static inline int rsc_stat(struct device *dev,
u8_t const ign = MAXIM_DS3231_REG_STAT_OSF | MAXIM_DS3231_ALARM1
| MAXIM_DS3231_ALARM2;
struct ds3231_data *data = dev->driver_data;
const struct ds3231_config *cfg = dev->config->config_info;
const struct ds3231_config *cfg = dev->config_info;
struct register_map *rp = &data->registers;
u8_t addr = offsetof(struct register_map, ctrl_stat);
int rc;
@ -248,7 +248,7 @@ int maxim_ds3231_stat_update(struct device *dev,
static void validate_isw_monitoring(struct device *dev)
{
struct ds3231_data *data = dev->driver_data;
const struct ds3231_config *cfg = dev->config->config_info;
const struct ds3231_config *cfg = dev->config_info;
const struct register_map *rp = &data->registers;
u8_t isw_mon_req = 0;
@ -449,7 +449,7 @@ static u32_t decode_rtc(struct ds3231_data *data)
static int update_registers(struct device *dev)
{
struct ds3231_data *data = dev->driver_data;
const struct ds3231_config *cfg = dev->config->config_info;
const struct ds3231_config *cfg = dev->config_info;
u32_t syncclock;
int rc;
u8_t addr = 0;
@ -472,7 +472,7 @@ int maxim_ds3231_get_alarm(struct device *dev,
struct maxim_ds3231_alarm *cp)
{
struct ds3231_data *data = dev->driver_data;
const struct ds3231_config *cfg = dev->config->config_info;
const struct ds3231_config *cfg = dev->config_info;
int rv = 0;
u8_t addr;
u8_t len;
@ -529,7 +529,7 @@ static int ds3231_counter_cancel_alarm(struct device *dev,
u8_t id)
{
struct ds3231_data *data = dev->driver_data;
const struct ds3231_config *cfg = dev->config->config_info;
const struct ds3231_config *cfg = dev->config_info;
int rv = 0;
if (id >= cfg->generic.channels) {
@ -557,7 +557,7 @@ static int set_alarm(struct device *dev,
const struct maxim_ds3231_alarm *cp)
{
struct ds3231_data *data = dev->driver_data;
const struct ds3231_config *cfg = dev->config->config_info;
const struct ds3231_config *cfg = dev->config_info;
u8_t addr;
u8_t len;
@ -672,7 +672,7 @@ static void alarm_worker(struct k_work *work)
struct ds3231_data *data = CONTAINER_OF(work, struct ds3231_data,
alarm_work);
struct device *ds3231 = data->ds3231;
const struct ds3231_config *cfg = ds3231->config->config_info;
const struct ds3231_config *cfg = ds3231->config_info;
k_sem_take(&data->lock, K_FOREVER);
@ -751,7 +751,7 @@ static int read_time(struct device *dev,
time_t *time)
{
struct ds3231_data *data = dev->driver_data;
const struct ds3231_config *cfg = dev->config->config_info;
const struct ds3231_config *cfg = dev->config_info;
u8_t addr = 0;
int rc = i2c_write_read(data->i2c, cfg->addr,
@ -886,7 +886,7 @@ static void sync_prep_write(struct device *dev)
static void sync_finish_write(struct device *dev)
{
struct ds3231_data *data = dev->driver_data;
const struct ds3231_config *cfg = dev->config->config_info;
const struct ds3231_config *cfg = dev->config_info;
time_t when = data->new_sp.rtc.tv_sec;
struct tm tm;
u8_t buf[8];
@ -1118,7 +1118,7 @@ out:
static int ds3231_init(struct device *dev)
{
struct ds3231_data *data = dev->driver_data;
const struct ds3231_config *cfg = dev->config->config_info;
const struct ds3231_config *cfg = dev->config_info;
struct device *i2c = device_get_binding(cfg->bus_name);
int rc;
@ -1215,7 +1215,7 @@ int ds3231_counter_set_alarm(struct device *dev,
{
struct ds3231_data *data = dev->driver_data;
const struct register_map *rp = &data->registers;
const struct ds3231_config *cfg = dev->config->config_info;
const struct ds3231_config *cfg = dev->config_info;
time_t when;
int rc = 0;

14
drivers/counter/timer_dtmr_cmsdk_apb.c
View file

@ -38,7 +38,7 @@ struct dtmr_cmsdk_apb_dev_data {
static int dtmr_cmsdk_apb_start(struct device *dev)
{
const struct dtmr_cmsdk_apb_cfg * const cfg =
dev->config->config_info;
dev->config_info;
struct dtmr_cmsdk_apb_dev_data *data = dev->driver_data;
/* Set the timer reload to count */
@ -53,7 +53,7 @@ static int dtmr_cmsdk_apb_start(struct device *dev)
static int dtmr_cmsdk_apb_stop(struct device *dev)
{
const struct dtmr_cmsdk_apb_cfg * const cfg =
dev->config->config_info;
dev->config_info;
/* Disable the dualtimer */
cfg->dtimer->timer1ctrl = 0x0;
@ -64,7 +64,7 @@ static int dtmr_cmsdk_apb_stop(struct device *dev)
static int dtmr_cmsdk_apb_get_value(struct device *dev, u32_t *ticks)
{
const struct dtmr_cmsdk_apb_cfg * const cfg =
dev->config->config_info;
dev->config_info;
struct dtmr_cmsdk_apb_dev_data *data = dev->driver_data;
*ticks = data->load - cfg->dtimer->timer1value;
@ -75,7 +75,7 @@ static int dtmr_cmsdk_apb_set_top_value(struct device *dev,
const struct counter_top_cfg *top_cfg)
{
const struct dtmr_cmsdk_apb_cfg * const cfg =
dev->config->config_info;
dev->config_info;
struct dtmr_cmsdk_apb_dev_data *data = dev->driver_data;
data->top_callback = top_cfg->callback;
@ -118,7 +118,7 @@ static u32_t dtmr_cmsdk_apb_get_top_value(struct device *dev)
static u32_t dtmr_cmsdk_apb_get_pending_int(struct device *dev)
{
const struct dtmr_cmsdk_apb_cfg * const cfg =
dev->config->config_info;
dev->config_info;
return cfg->dtimer->timer1ris;
}
@ -137,7 +137,7 @@ static void dtmr_cmsdk_apb_isr(void *arg)
struct device *dev = (struct device *)arg;
struct dtmr_cmsdk_apb_dev_data *data = dev->driver_data;
const struct dtmr_cmsdk_apb_cfg * const cfg =
dev->config->config_info;
dev->config_info;
cfg->dtimer->timer1intclr = DUALTIMER_INTCLR;
if (data->top_callback) {
@ -148,7 +148,7 @@ static void dtmr_cmsdk_apb_isr(void *arg)
static int dtmr_cmsdk_apb_init(struct device *dev)
{
const struct dtmr_cmsdk_apb_cfg * const cfg =
dev->config->config_info;
dev->config_info;
#ifdef CONFIG_CLOCK_CONTROL
/* Enable clock for subsystem */

14
drivers/counter/timer_tmr_cmsdk_apb.c
View file

@ -39,7 +39,7 @@ struct tmr_cmsdk_apb_dev_data {
static int tmr_cmsdk_apb_start(struct device *dev)
{
const struct tmr_cmsdk_apb_cfg * const cfg =
dev->config->config_info;
dev->config_info;
struct tmr_cmsdk_apb_dev_data *data = dev->driver_data;
/* Set the timer reload to count */
@ -53,7 +53,7 @@ static int tmr_cmsdk_apb_start(struct device *dev)
static int tmr_cmsdk_apb_stop(struct device *dev)
{
const struct tmr_cmsdk_apb_cfg * const cfg =
dev->config->config_info;
dev->config_info;
/* Disable the timer */
cfg->timer->ctrl = 0x0;
@ -63,7 +63,7 @@ static int tmr_cmsdk_apb_stop(struct device *dev)
static int tmr_cmsdk_apb_get_value(struct device *dev, u32_t *ticks)
{
const struct tmr_cmsdk_apb_cfg * const cfg =
dev->config->config_info;
dev->config_info;
struct tmr_cmsdk_apb_dev_data *data = dev->driver_data;
/* Get Counter Value */
@ -75,7 +75,7 @@ static int tmr_cmsdk_apb_set_top_value(struct device *dev,
const struct counter_top_cfg *top_cfg)
{
const struct tmr_cmsdk_apb_cfg * const cfg =
dev->config->config_info;
dev->config_info;
struct tmr_cmsdk_apb_dev_data *data = dev->driver_data;
/* Counter is always reset when top value is updated. */
@ -113,7 +113,7 @@ static u32_t tmr_cmsdk_apb_get_top_value(struct device *dev)
static u32_t tmr_cmsdk_apb_get_pending_int(struct device *dev)
{
const struct tmr_cmsdk_apb_cfg * const cfg =
dev->config->config_info;
dev->config_info;
return cfg->timer->intstatus;
}
@ -132,7 +132,7 @@ static void tmr_cmsdk_apb_isr(void *arg)
struct device *dev = (struct device *)arg;
struct tmr_cmsdk_apb_dev_data *data = dev->driver_data;
const struct tmr_cmsdk_apb_cfg * const cfg =
dev->config->config_info;
dev->config_info;
cfg->timer->intclear = TIMER_CTRL_INT_CLEAR;
if (data->top_callback) {
@ -143,7 +143,7 @@ static void tmr_cmsdk_apb_isr(void *arg)
static int tmr_cmsdk_apb_init(struct device *dev)
{
const struct tmr_cmsdk_apb_cfg * const cfg =
dev->config->config_info;
dev->config_info;
#ifdef CONFIG_CLOCK_CONTROL
/* Enable clock for subsystem */

6
drivers/crypto/crypto_ataes132a.c
View file

@ -44,7 +44,7 @@ static int ataes132a_send_command(struct device *dev, u8_t opcode,
{
int retry_count = 0;
struct ataes132a_device_data *data = dev->driver_data;
const struct ataes132a_device_config *cfg = dev->config->config_info;
const struct ataes132a_device_config *cfg = dev->config_info;
u8_t count;
u8_t status;
u8_t crc[2];
@ -167,7 +167,7 @@ static int ataes132a_send_command(struct device *dev, u8_t opcode,
int ataes132a_init(struct device *dev)
{
struct ataes132a_device_data *ataes132a = dev->driver_data;
const struct ataes132a_device_config *cfg = dev->config->config_info;
const struct ataes132a_device_config *cfg = dev->config_info;
u32_t i2c_cfg;
LOG_DBG("ATAES132A INIT");
@ -798,7 +798,7 @@ static int ataes132a_session_setup(struct device *dev, struct cipher_ctx *ctx,
{
u8_t key_id = *((u8_t *)ctx->key.handle);
struct ataes132a_device_data *data = dev->driver_data;
const struct ataes132a_device_config *cfg = dev->config->config_info;
const struct ataes132a_device_config *cfg = dev->config_info;
u8_t config;
if (ataes132a_state[key_id].in_use) {

2
drivers/crypto/crypto_stm32_priv.h
View file

@ -28,7 +28,7 @@ struct crypto_stm32_session {
};
#define CRYPTO_STM32_CFG(dev) \
((const struct crypto_stm32_config *const)(dev)->config->config_info)
((const struct crypto_stm32_config *const)(dev)->config_info)
#define CRYPTO_STM32_DATA(dev) \
((struct crypto_stm32_data *const)(dev)->driver_data)

4
drivers/dac/dac_mcux_dac.c
View file

@ -27,7 +27,7 @@ struct mcux_dac_data {
static int mcux_dac_channel_setup(struct device *dev,
const struct dac_channel_cfg *channel_cfg)
{
const struct mcux_dac_config *config = dev->config->config_info;
const struct mcux_dac_config *config = dev->config_info;
struct mcux_dac_data *data = dev->driver_data;
dac_config_t dac_config;
@ -54,7 +54,7 @@ static int mcux_dac_channel_setup(struct device *dev,
static int mcux_dac_write_value(struct device *dev, u8_t channel, u32_t value)
{
const struct mcux_dac_config *config = dev->config->config_info;
const struct mcux_dac_config *config = dev->config_info;
struct mcux_dac_data *data = dev->driver_data;
if (!data->configured) {

4
drivers/dac/dac_mcux_dac32.c
View file

@ -28,7 +28,7 @@ struct mcux_dac32_data {
static int mcux_dac32_channel_setup(struct device *dev,
const struct dac_channel_cfg *channel_cfg)
{
const struct mcux_dac32_config *config = dev->config->config_info;
const struct mcux_dac32_config *config = dev->config_info;
struct mcux_dac32_data *data = dev->driver_data;
dac32_config_t dac32_config;
@ -56,7 +56,7 @@ static int mcux_dac32_channel_setup(struct device *dev,
static int mcux_dac32_write_value(struct device *dev, u8_t channel, u32_t value)
{
const struct mcux_dac32_config *config = dev->config->config_info;
const struct mcux_dac32_config *config = dev->config_info;
struct mcux_dac32_data *data = dev->driver_data;
if (!data->configured) {

6
drivers/dac/dac_stm32.c
View file

@ -54,7 +54,7 @@ static int dac_stm32_write_value(struct device *dev,
u8_t channel, u32_t value)
{
struct dac_stm32_data *data = dev->driver_data;
const struct dac_stm32_cfg *cfg = dev->config->config_info;
const struct dac_stm32_cfg *cfg = dev->config_info;
if (channel - STM32_FIRST_CHANNEL >= data->channel_count ||
channel < STM32_FIRST_CHANNEL) {
@ -77,7 +77,7 @@ static int dac_stm32_channel_setup(struct device *dev,
const struct dac_channel_cfg *channel_cfg)
{
struct dac_stm32_data *data = dev->driver_data;
const struct dac_stm32_cfg *cfg = dev->config->config_info;
const struct dac_stm32_cfg *cfg = dev->config_info;
if ((channel_cfg->channel_id - STM32_FIRST_CHANNEL >=
data->channel_count) ||
@ -109,7 +109,7 @@ static int dac_stm32_channel_setup(struct device *dev,
static int dac_stm32_init(struct device *dev)
{
const struct dac_stm32_cfg *cfg = dev->config->config_info;
const struct dac_stm32_cfg *cfg = dev->config_info;
/* enable clock for subsystem */
struct device *clk =

10
drivers/display/display_mcux_elcdif.c
View file

@ -44,7 +44,7 @@ static int mcux_elcdif_write(const struct device *dev, const u16_t x,
const struct display_buffer_descriptor *desc,
const void *buf)
{
const struct mcux_elcdif_config *config = dev->config->config_info;
const struct mcux_elcdif_config *config = dev->config_info;
struct mcux_elcdif_data *data = dev->driver_data;
u8_t write_idx = data->write_idx;
@ -132,7 +132,7 @@ static int mcux_elcdif_set_pixel_format(const struct device *dev,
const enum display_pixel_format
pixel_format)
{
const struct mcux_elcdif_config *config = dev->config->config_info;
const struct mcux_elcdif_config *config = dev->config_info;
if (pixel_format == config->pixel_format) {
return 0;
@ -154,7 +154,7 @@ static int mcux_elcdif_set_orientation(const struct device *dev,
static void mcux_elcdif_get_capabilities(const struct device *dev,
struct display_capabilities *capabilities)
{
const struct mcux_elcdif_config *config = dev->config->config_info;
const struct mcux_elcdif_config *config = dev->config_info;
memset(capabilities, 0, sizeof(struct display_capabilities));
capabilities->x_resolution = config->rgb_mode.panelWidth;
@ -167,7 +167,7 @@ static void mcux_elcdif_get_capabilities(const struct device *dev,
static void mcux_elcdif_isr(void *arg)
{
struct device *dev = (struct device *)arg;
const struct mcux_elcdif_config *config = dev->config->config_info;
const struct mcux_elcdif_config *config = dev->config_info;
struct mcux_elcdif_data *data = dev->driver_data;
u32_t status;
@ -179,7 +179,7 @@ static void mcux_elcdif_isr(void *arg)
static int mcux_elcdif_init(struct device *dev)
{
const struct mcux_elcdif_config *config = dev->config->config_info;
const struct mcux_elcdif_config *config = dev->config_info;
struct mcux_elcdif_data *data = dev->driver_data;
int i;

12
drivers/display/grove_lcd_rgb.c
View file

@ -105,7 +105,7 @@ static inline void sleep(u32_t sleep_in_ms)
void glcd_print(struct device *port, char *data, u32_t size)
{
const struct glcd_driver * const rom = (struct glcd_driver *)
port->config->config_info;
port->config_info;
struct glcd_data *dev = port->driver_data;
u8_t buf[] = { GLCD_CMD_SET_CGRAM_ADDR, 0 };
int i;
@ -120,7 +120,7 @@ void glcd_print(struct device *port, char *data, u32_t size)
void glcd_cursor_pos_set(struct device *port, u8_t col, u8_t row)
{
const struct glcd_driver * const rom = (struct glcd_driver *)
port->config->config_info;
port->config_info;
struct glcd_data *dev = port->driver_data;
unsigned char data[2];
@ -141,7 +141,7 @@ void glcd_cursor_pos_set(struct device *port, u8_t col, u8_t row)
void glcd_clear(struct device *port)
{
const struct glcd_driver * const rom = (struct glcd_driver *)
port->config->config_info;
port->config_info;
struct glcd_data *dev = port->driver_data;
u8_t clear[] = { 0, GLCD_CMD_SCREEN_CLEAR };
@ -154,7 +154,7 @@ void glcd_clear(struct device *port)
void glcd_display_state_set(struct device *port, u8_t opt)
{
const struct glcd_driver * const rom = (struct glcd_driver *)
port->config->config_info;
port->config_info;
struct glcd_data *dev = port->driver_data;
u8_t data[] = { 0, 0 };
@ -178,7 +178,7 @@ u8_t glcd_display_state_get(struct device *port)
void glcd_input_state_set(struct device *port, u8_t opt)
{
const struct glcd_driver * const rom = port->config->config_info;
const struct glcd_driver * const rom = port->config_info;
struct glcd_data *dev = port->driver_data;
u8_t data[] = { 0, 0 };
@ -223,7 +223,7 @@ void glcd_color_set(struct device *port, u8_t r, u8_t g, u8_t b)
void glcd_function_set(struct device *port, u8_t opt)
{
const struct glcd_driver * const rom = port->config->config_info;
const struct glcd_driver * const rom = port->config_info;
struct glcd_data *dev = port->driver_data;
u8_t data[] = { 0, 0 };

4
drivers/dma/dma_dw.c
View file

@ -34,10 +34,10 @@ LOG_MODULE_REGISTER(dma_dw);
/* default initial setup register values */
#define DW_CFG_LOW_DEF 0x0
#define DEV_NAME(dev) ((dev)->config->name)
#define DEV_NAME(dev) ((dev)->name)
#define DEV_DATA(dev) ((struct dw_dma_dev_data *const)(dev)->driver_data)
#define DEV_CFG(dev) \
((const struct dw_dma_dev_cfg *const)(dev)->config->config_info)
((const struct dw_dma_dev_cfg *const)(dev)->config_info)
/* number of tries to wait for reset */
#define DW_DMA_CFG_TRIES 10000

4
drivers/dma/dma_nios2_msgdma.c
View file

@ -30,9 +30,9 @@ struct nios2_msgdma_dev_cfg {
int error_code);
};
#define DEV_NAME(dev) ((dev)->config->name)
#define DEV_NAME(dev) ((dev)->name)
#define DEV_CFG(dev) \
((struct nios2_msgdma_dev_cfg *)(dev)->config->config_info)
((struct nios2_msgdma_dev_cfg *)(dev)->config_info)
static void nios2_msgdma_isr(void *arg)
{

4
drivers/dma/dma_sam_xdmac.c
View file

@ -45,9 +45,9 @@ struct sam_xdmac_dev_data {
struct sam_xdmac_channel_cfg dma_channels[DMA_CHANNELS_NO];
};
#define DEV_NAME(dev) ((dev)->config->name)
#define DEV_NAME(dev) ((dev)->name)
#define DEV_CFG(dev) \
((const struct sam_xdmac_dev_cfg *const)(dev)->config->config_info)
((const struct sam_xdmac_dev_cfg *const)(dev)->config_info)
#define DEV_DATA(dev) \
((struct sam_xdmac_dev_data *const)(dev)->driver_data)

18
drivers/dma/dma_stm32.c
View file

@ -38,7 +38,7 @@ static u32_t table_p_size[] = {
static void dma_stm32_dump_stream_irq(struct device *dev, u32_t id)
{
const struct dma_stm32_config *config = dev->config->config_info;
const struct dma_stm32_config *config = dev->config_info;
DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);
stm32_dma_dump_stream_irq(dma, id);
@ -46,7 +46,7 @@ static void dma_stm32_dump_stream_irq(struct device *dev, u32_t id)
static void dma_stm32_clear_stream_irq(struct device *dev, u32_t id)
{
const struct dma_stm32_config *config = dev->config->config_info;
const struct dma_stm32_config *config = dev->config_info;
DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);
func_ll_clear_tc[id](dma);
@ -58,7 +58,7 @@ static void dma_stm32_irq_handler(void *arg)
{
struct device *dev = arg;
struct dma_stm32_data *data = dev->driver_data;
const struct dma_stm32_config *config = dev->config->config_info;
const struct dma_stm32_config *config = dev->config_info;
DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);
struct dma_stm32_stream *stream;
int id;
@ -243,7 +243,7 @@ static int dma_stm32_configure(struct device *dev, u32_t id,
struct dma_stm32_data *data = dev->driver_data;
struct dma_stm32_stream *stream = &data->streams[id - STREAM_OFFSET];
const struct dma_stm32_config *dev_config =
dev->config->config_info;
dev->config_info;
DMA_TypeDef *dma = (DMA_TypeDef *)dev_config->base;
LL_DMA_InitTypeDef DMA_InitStruct;
u32_t msize;
@ -275,7 +275,7 @@ static int dma_stm32_configure(struct device *dev, u32_t id,
if ((config->channel_direction == MEMORY_TO_MEMORY) &&
(!dev_config->support_m2m)) {
LOG_ERR("Memcopy not supported for device %s",
dev->config->name);
dev->name);
return -ENOTSUP;
}
#endif /* CONFIG_DMA_STM32_V1 */
@ -477,7 +477,7 @@ static int dma_stm32_reload(struct device *dev, u32_t id,
u32_t src, u32_t dst, size_t size)
#endif /* CONFIG_DMAMUX_STM32 */
{
const struct dma_stm32_config *config = dev->config->config_info;
const struct dma_stm32_config *config = dev->config_info;
DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);
struct dma_stm32_data *data = dev->driver_data;
struct dma_stm32_stream *stream = &data->streams[id - STREAM_OFFSET];
@ -524,7 +524,7 @@ int dma_stm32_start(struct device *dev, u32_t id)
static int dma_stm32_start(struct device *dev, u32_t id)
#endif /* CONFIG_DMAMUX_STM32 */
{
const struct dma_stm32_config *config = dev->config->config_info;
const struct dma_stm32_config *config = dev->config_info;
DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);
struct dma_stm32_data *data = dev->driver_data;
@ -552,7 +552,7 @@ static int dma_stm32_stop(struct device *dev, u32_t id)
struct dma_stm32_data *data = dev->driver_data;
struct dma_stm32_stream *stream = &data->streams[id - STREAM_OFFSET];
const struct dma_stm32_config *config =
dev->config->config_info;
dev->config_info;
DMA_TypeDef *dma = (DMA_TypeDef *)(config->base);
/* give channel from index 0 */
@ -583,7 +583,7 @@ struct k_mem_block block;
static int dma_stm32_init(struct device *dev)
{
struct dma_stm32_data *data = dev->driver_data;
const struct dma_stm32_config *config = dev->config->config_info;
const struct dma_stm32_config *config = dev->config_info;
struct device *clk =
device_get_binding(STM32_CLOCK_CONTROL_NAME);

10
drivers/dma/dmamux_stm32.c
View file

@ -31,7 +31,7 @@ int dmamux_stm32_configure(struct device *dev, u32_t id,
/* device is the dmamux, id is the dmamux channel from 0 */
struct dmamux_stm32_data *data = dev->driver_data;
const struct dmamux_stm32_config *dev_config =
dev->config->config_info;
dev->config_info;
/*
* request line ID for this mux channel is stored
@ -79,7 +79,7 @@ int dmamux_stm32_configure(struct device *dev, u32_t id,
int dmamux_stm32_start(struct device *dev, u32_t id)
{
const struct dmamux_stm32_config *dev_config =
dev->config->config_info;
dev->config_info;
struct dmamux_stm32_data *data = dev->driver_data;
/* check if this channel is valid */
@ -100,7 +100,7 @@ int dmamux_stm32_start(struct device *dev, u32_t id)
int dmamux_stm32_stop(struct device *dev, u32_t id)
{
const struct dmamux_stm32_config *dev_config =
dev->config->config_info;
dev->config_info;
struct dmamux_stm32_data *data = dev->driver_data;
/* check if this channel is valid */
@ -122,7 +122,7 @@ int dmamux_stm32_reload(struct device *dev, u32_t id,
u32_t src, u32_t dst, size_t size)
{
const struct dmamux_stm32_config *dev_config =
dev->config->config_info;
dev->config_info;
struct dmamux_stm32_data *data = dev->driver_data;
/* check if this channel is valid */
@ -145,7 +145,7 @@ static int dmamux_stm32_init(struct device *dev)
{
struct dmamux_stm32_data *data = dev->driver_data;
const struct dmamux_stm32_config *config =
dev->config->config_info;
dev->config_info;
struct device *clk =
device_get_binding(STM32_CLOCK_CONTROL_NAME);

24
drivers/eeprom/eeprom_at2x.c
View file

@ -64,7 +64,7 @@ struct eeprom_at2x_data {
static inline int eeprom_at2x_write_protect(struct device *dev)
{
const struct eeprom_at2x_config *config = dev->config->config_info;
const struct eeprom_at2x_config *config = dev->config_info;
struct eeprom_at2x_data *data = dev->driver_data;
if (!data->wp_gpio_dev) {
@ -76,7 +76,7 @@ static inline int eeprom_at2x_write_protect(struct device *dev)
static inline int eeprom_at2x_write_enable(struct device *dev)
{
const struct eeprom_at2x_config *config = dev->config->config_info;
const struct eeprom_at2x_config *config = dev->config_info;
struct eeprom_at2x_data *data = dev->driver_data;
if (!data->wp_gpio_dev) {
@ -89,7 +89,7 @@ static inline int eeprom_at2x_write_enable(struct device *dev)
static int eeprom_at2x_read(struct device *dev, off_t offset, void *buf,
size_t len)
{
const struct eeprom_at2x_config *config = dev->config->config_info;
const struct eeprom_at2x_config *config = dev->config_info;
struct eeprom_at2x_data *data = dev->driver_data;
int err;
@ -117,7 +117,7 @@ static int eeprom_at2x_read(struct device *dev, off_t offset, void *buf,
static size_t eeprom_at2x_limit_write_count(struct device *dev, off_t offset,
size_t len)
{
const struct eeprom_at2x_config *config = dev->config->config_info;
const struct eeprom_at2x_config *config = dev->config_info;
size_t count = len;
off_t page_boundary;
@ -138,7 +138,7 @@ static size_t eeprom_at2x_limit_write_count(struct device *dev, off_t offset,
static int eeprom_at2x_write(struct device *dev, off_t offset, const void *buf,
size_t len)
{
const struct eeprom_at2x_config *config = dev->config->config_info;
const struct eeprom_at2x_config *config = dev->config_info;
struct eeprom_at2x_data *data = dev->driver_data;
const u8_t *pbuf = buf;
int ret;
@ -192,7 +192,7 @@ static int eeprom_at2x_write(struct device *dev, off_t offset, const void *buf,
static size_t eeprom_at2x_size(struct device *dev)
{
const struct eeprom_at2x_config *config = dev->config->config_info;
const struct eeprom_at2x_config *config = dev->config_info;
return config->size;
}
@ -201,7 +201,7 @@ static size_t eeprom_at2x_size(struct device *dev)
static int eeprom_at24_read(struct device *dev, off_t offset, void *buf,
size_t len)
{
const struct eeprom_at2x_config *config = dev->config->config_info;
const struct eeprom_at2x_config *config = dev->config_info;
struct eeprom_at2x_data *data = dev->driver_data;
s64_t timeout;
u8_t addr[2];
@ -234,7 +234,7 @@ static int eeprom_at24_read(struct device *dev, off_t offset, void *buf,
static int eeprom_at24_write(struct device *dev, off_t offset,
const void *buf, size_t len)
{
const struct eeprom_at2x_config *config = dev->config->config_info;
const struct eeprom_at2x_config *config = dev->config_info;
struct eeprom_at2x_data *data = dev->driver_data;
int count = eeprom_at2x_limit_write_count(dev, offset, len);
u8_t block[config->addr_width / 8 + count];
@ -311,7 +311,7 @@ static int eeprom_at25_rdsr(struct device *dev, u8_t *status)
static int eeprom_at25_wait_for_idle(struct device *dev)
{
const struct eeprom_at2x_config *config = dev->config->config_info;
const struct eeprom_at2x_config *config = dev->config_info;
s64_t timeout;
u8_t status;
int err;
@ -336,7 +336,7 @@ static int eeprom_at25_wait_for_idle(struct device *dev)
static int eeprom_at25_read(struct device *dev, off_t offset, void *buf,
size_t len)
{
const struct eeprom_at2x_config *config = dev->config->config_info;
const struct eeprom_at2x_config *config = dev->config_info;
struct eeprom_at2x_data *data = dev->driver_data;
size_t cmd_len = 1 + config->addr_width / 8;
u8_t cmd[4] = { EEPROM_AT25_READ, 0, 0, 0 };
@ -418,7 +418,7 @@ static int eeprom_at25_wren(struct device *dev)
static int eeprom_at25_write(struct device *dev, off_t offset,
const void *buf, size_t len)
{
const struct eeprom_at2x_config *config = dev->config->config_info;
const struct eeprom_at2x_config *config = dev->config_info;
struct eeprom_at2x_data *data = dev->driver_data;
int count = eeprom_at2x_limit_write_count(dev, offset, len);
u8_t cmd[4] = { EEPROM_AT25_WRITE, 0, 0, 0 };
@ -478,7 +478,7 @@ static int eeprom_at25_write(struct device *dev, off_t offset,
static int eeprom_at2x_init(struct device *dev)
{
const struct eeprom_at2x_config *config = dev->config->config_info;
const struct eeprom_at2x_config *config = dev->config_info;
struct eeprom_at2x_data *data = dev->driver_data;
int err;

4
drivers/eeprom/eeprom_simulator.c
View file

@ -35,8 +35,8 @@ struct eeprom_sim_config {
bool readonly;
};
#define DEV_NAME(dev) ((dev)->config->name)
#define DEV_CONFIG(dev) ((dev)->config->config_info)
#define DEV_NAME(dev) ((dev)->name)
#define DEV_CONFIG(dev) ((dev)->config_info)
#define EEPROM(addr) (mock_eeprom + (addr))

6
drivers/eeprom/eeprom_stm32.c
View file

@ -23,7 +23,7 @@ struct eeprom_stm32_config {
static int eeprom_stm32_read(struct device *dev, off_t offset, void *buf,
size_t len)
{
const struct eeprom_stm32_config *config = dev->config->config_info;
const struct eeprom_stm32_config *config = dev->config_info;
u8_t *pbuf = buf;
if (!len) {
@ -53,7 +53,7 @@ static int eeprom_stm32_read(struct device *dev, off_t offset, void *buf,
static int eeprom_stm32_write(struct device *dev, off_t offset,
const void *buf, size_t len)
{
const struct eeprom_stm32_config *config = dev->config->config_info;
const struct eeprom_stm32_config *config = dev->config_info;
const u8_t *pbuf = buf;
HAL_StatusTypeDef ret = HAL_OK;
@ -100,7 +100,7 @@ static int eeprom_stm32_write(struct device *dev, off_t offset,
static size_t eeprom_stm32_size(struct device *dev)
{
const struct eeprom_stm32_config *config = dev->config->config_info;
const struct eeprom_stm32_config *config = dev->config_info;
return config->size;
}

2
drivers/entropy/entropy_mcux_rng.c
View file

@ -20,7 +20,7 @@ struct mcux_entropy_config {
static int entropy_mcux_rng_get_entropy(struct device *dev, u8_t *buffer,
u16_t length)
{
const struct mcux_entropy_config *config = dev->config->config_info;
const struct mcux_entropy_config *config = dev->config_info;
status_t status;
ARG_UNUSED(dev);

4
drivers/entropy/entropy_mcux_trng.c
View file

@ -20,7 +20,7 @@ struct mcux_entropy_config {
static int entropy_mcux_trng_get_entropy(struct device *dev, u8_t *buffer,
u16_t length)
{
const struct mcux_entropy_config *config = dev->config->config_info;
const struct mcux_entropy_config *config = dev->config_info;
status_t status;
ARG_UNUSED(dev);
@ -48,7 +48,7 @@ DEVICE_AND_API_INIT(entropy_mcux_trng, DT_INST_LABEL(0),
static int entropy_mcux_trng_init(struct device *dev)
{
const struct mcux_entropy_config *config = dev->config->config_info;
const struct mcux_entropy_config *config = dev->config_info;
trng_config_t conf;
status_t status;

4
drivers/entropy/entropy_rv32m1_trng.c
View file

@ -20,7 +20,7 @@ struct rv32m1_entropy_config {
static int entropy_rv32m1_trng_get_entropy(struct device *dev, u8_t *buffer,
u16_t length)
{
const struct rv32m1_entropy_config *config = dev->config->config_info;
const struct rv32m1_entropy_config *config = dev->config_info;
status_t status;
ARG_UNUSED(dev);
@ -48,7 +48,7 @@ DEVICE_AND_API_INIT(entropy_rv32m1_trng, DT_INST_LABEL(0),
static int entropy_rv32m1_trng_init(struct device *dev)
{
const struct rv32m1_entropy_config *config = dev->config->config_info;
const struct rv32m1_entropy_config *config = dev->config_info;
trng_config_t conf;
status_t status;

2
drivers/entropy/entropy_sam.c
View file

@ -18,7 +18,7 @@ struct trng_sam_dev_cfg {
};
#define DEV_CFG(dev) \
((const struct trng_sam_dev_cfg *const)(dev)->config->config_info)
((const struct trng_sam_dev_cfg *const)(dev)->config_info)
static inline bool _ready(Trng * const trng)
{

2
drivers/entropy/entropy_stm32.c
View file

@ -32,7 +32,7 @@ struct entropy_stm32_rng_dev_data {
((struct entropy_stm32_rng_dev_data *)(dev)->driver_data)
#define DEV_CFG(dev) \
((struct entropy_stm32_rng_dev_cfg *)(dev)->config->config_info)
((struct entropy_stm32_rng_dev_cfg *)(dev)->config_info)
static void entropy_stm32_rng_reset(RNG_TypeDef *rng)
{

18
drivers/espi/espi_mchp_xec.c
View file

@ -350,7 +350,7 @@ static int espi_xec_write_lpc_request(struct device *dev,
u32_t *data)
{
struct espi_xec_config *config =
(struct espi_xec_config *) (dev->config->config_info);
(struct espi_xec_config *) (dev->config_info);
volatile u32_t __attribute__((unused)) dummy;
@ -652,7 +652,7 @@ static void send_slave_bootdone(struct device *dev)
static void espi_init_oob(struct device *dev)
{
struct espi_xec_config *config =
(struct espi_xec_config *) (dev->config->config_info);
(struct espi_xec_config *) (dev->config_info);
/* Enable OOB Tx/Rx interrupts */
MCHP_GIRQ_ENSET(config->bus_girq_id) = (MCHP_ESPI_OOB_UP_GIRQ_VAL |
@ -676,7 +676,7 @@ static void espi_init_oob(struct device *dev)
static void espi_init_flash(struct device *dev)
{
struct espi_xec_config *config =
(struct espi_xec_config *)(dev->config->config_info);
(struct espi_xec_config *)(dev->config_info);
LOG_DBG("%s", __func__);
@ -692,7 +692,7 @@ static void espi_init_flash(struct device *dev)
static void espi_bus_init(struct device *dev)
{
const struct espi_xec_config *config = dev->config->config_info;
const struct espi_xec_config *config = dev->config_info;
/* Enable bus interrupts */
MCHP_GIRQ_ENSET(config->bus_girq_id) = MCHP_ESPI_ESPI_RST_GIRQ_VAL |
@ -819,7 +819,7 @@ static void espi_pc_isr(struct device *dev)
static void espi_vwire_chanel_isr(struct device *dev)
{
struct espi_xec_data *data = (struct espi_xec_data *)(dev->driver_data);
const struct espi_xec_config *config = dev->config->config_info;
const struct espi_xec_config *config = dev->config_info;
struct espi_event evt = { .evt_type = ESPI_BUS_EVENT_CHANNEL_READY,
.evt_details = 0,
.evt_data = 0 };
@ -1133,7 +1133,7 @@ static u8_t periph_isr_cnt = sizeof(peripherals_isr) / sizeof(struct espi_isr);
static void espi_xec_bus_isr(void *arg)
{
struct device *dev = (struct device *)arg;
const struct espi_xec_config *config = dev->config->config_info;
const struct espi_xec_config *config = dev->config_info;
u32_t girq_result;
girq_result = MCHP_GIRQ_RESULT(config->bus_girq_id);
@ -1154,7 +1154,7 @@ static void espi_xec_bus_isr(void *arg)
static void espi_xec_vw_isr(void *arg)
{
struct device *dev = (struct device *)arg;
const struct espi_xec_config *config = dev->config->config_info;
const struct espi_xec_config *config = dev->config_info;
u32_t girq_result;
girq_result = MCHP_GIRQ_RESULT(config->vw_girq_id);
@ -1175,7 +1175,7 @@ static void espi_xec_vw_isr(void *arg)
static void espi_xec_periph_isr(void *arg)
{
struct device *dev = (struct device *)arg;
const struct espi_xec_config *config = dev->config->config_info;
const struct espi_xec_config *config = dev->config_info;
u32_t girq_result;
girq_result = MCHP_GIRQ_RESULT(config->pc_girq_id);
@ -1225,7 +1225,7 @@ DEVICE_AND_API_INIT(espi_xec_0, DT_INST_LABEL(0),
static int espi_xec_init(struct device *dev)
{
const struct espi_xec_config *config = dev->config->config_info;
const struct espi_xec_config *config = dev->config_info;
struct espi_xec_data *data = (struct espi_xec_data *)(dev->driver_data);
data->plt_rst_asserted = 0;

8
drivers/ethernet/eth_enc28j60.c
View file

@ -349,7 +349,7 @@ static void eth_enc28j60_init_buffers(struct device *dev)
static void eth_enc28j60_init_mac(struct device *dev)
{
const struct eth_enc28j60_config *config = dev->config->config_info;
const struct eth_enc28j60_config *config = dev->config_info;
struct eth_enc28j60_runtime *context = dev->driver_data;
u8_t data_macon;
@ -399,7 +399,7 @@ static void eth_enc28j60_init_mac(struct device *dev)
static void eth_enc28j60_init_phy(struct device *dev)
{
const struct eth_enc28j60_config *config = dev->config->config_info;
const struct eth_enc28j60_config *config = dev->config_info;
if (config->full_duplex) {
eth_enc28j60_write_phy(dev, ENC28J60_PHY_PHCON1,
@ -506,7 +506,7 @@ static int eth_enc28j60_tx(struct device *dev, struct net_pkt *pkt)
static int eth_enc28j60_rx(struct device *dev, u16_t *vlan_tag)
{
const struct eth_enc28j60_config *config = dev->config->config_info;
const struct eth_enc28j60_config *config = dev->config_info;
struct eth_enc28j60_runtime *context = dev->driver_data;
u16_t lengthfr;
u8_t counter;
@ -717,7 +717,7 @@ static const struct ethernet_api api_funcs = {
static int eth_enc28j60_init(struct device *dev)
{
const struct eth_enc28j60_config *config = dev->config->config_info;
const struct eth_enc28j60_config *config = dev->config_info;
struct eth_enc28j60_runtime *context = dev->driver_data;
/* SPI config */

4
drivers/ethernet/eth_enc424j600.c
View file

@ -344,7 +344,7 @@ static int enc424j600_tx(struct device *dev, struct net_pkt *pkt)
static int enc424j600_rx(struct device *dev)
{
struct enc424j600_runtime *context = dev->driver_data;
const struct enc424j600_config *config = dev->config->config_info;
const struct enc424j600_config *config = dev->config_info;
u8_t info[ENC424J600_RSV_SIZE + ENC424J600_PTR_NXP_PKT_SIZE];
struct net_buf *pkt_buf = NULL;
struct net_pkt *pkt;
@ -596,7 +596,7 @@ static const struct ethernet_api api_funcs = {
static int enc424j600_init(struct device *dev)
{
const struct enc424j600_config *config = dev->config->config_info;
const struct enc424j600_config *config = dev->config_info;
struct enc424j600_runtime *context = dev->driver_data;
u8_t retries = ENC424J600_DEFAULT_NUMOF_RETRIES;
u16_t tmp;

4
drivers/ethernet/eth_gecko_priv.h
View file

@ -94,9 +94,9 @@ struct eth_gecko_dev_data {
bool link_up;
};
#define DEV_NAME(dev) ((dev)->config->name)
#define DEV_NAME(dev) ((dev)->name)
#define DEV_CFG(dev) \
((struct eth_gecko_dev_cfg *)(dev)->config->config_info)
((struct eth_gecko_dev_cfg *)(dev)->config_info)
#define DEV_DATA(dev) \
((struct eth_gecko_dev_data *)(dev)->driver_data)

2
drivers/ethernet/eth_liteeth.c
View file

@ -72,7 +72,7 @@ struct eth_liteeth_config {
static int eth_initialize(struct device *dev)
{
const struct eth_liteeth_config *config = dev->config->config_info;
const struct eth_liteeth_config *config = dev->config_info;
config->config_func();

2
drivers/ethernet/eth_sam_gmac_priv.h
View file

@ -281,7 +281,7 @@ struct eth_sam_dev_data {
};
#define DEV_CFG(dev) \
((const struct eth_sam_dev_cfg *const)(dev)->config->config_info)
((const struct eth_sam_dev_cfg *const)(dev)->config_info)
#define DEV_DATA(dev) \
((struct eth_sam_dev_data *const)(dev)->driver_data)

2
drivers/ethernet/eth_stellaris_priv.h
View file

@ -11,7 +11,7 @@
#define DEV_DATA(dev) \
((struct eth_stellaris_runtime *)(dev)->driver_data)
#define DEV_CFG(dev) \
((struct eth_stellaris_config *const)(dev)->config->config_info)
((struct eth_stellaris_config *const)(dev)->config_info)
/*
* Register mapping
*/

2
drivers/ethernet/eth_stm32_hal_priv.h
View file

@ -45,7 +45,7 @@ struct eth_stm32_hal_dev_data {
};
#define DEV_CFG(dev) \
((struct eth_stm32_hal_dev_cfg *)(dev)->config->config_info)
((struct eth_stm32_hal_dev_cfg *)(dev)->config_info)
#define DEV_DATA(dev) \
((struct eth_stm32_hal_dev_data *)(dev)->driver_data)

2
drivers/flash/flash_gecko.c
View file

@ -24,7 +24,7 @@ struct flash_gecko_data {
struct k_sem mutex;
};
#define DEV_NAME(dev) ((dev)->config->name)
#define DEV_NAME(dev) ((dev)->name)
#define DEV_DATA(dev) \
((struct flash_gecko_data *const)(dev)->driver_data)

2
drivers/flash/flash_sam.c
View file

@ -47,7 +47,7 @@ struct flash_sam_dev_data {
};
#define DEV_CFG(dev) \
((const struct flash_sam_dev_cfg *const)(dev)->config->config_info)
((const struct flash_sam_dev_cfg *const)(dev)->config_info)
#define DEV_DATA(dev) \
((struct flash_sam_dev_data *const)(dev)->driver_data)

4
drivers/flash/flash_shell.c
View file

@ -231,9 +231,9 @@ static void device_name_get(size_t idx, struct shell_static_entry *entry)
for (dev = __device_start; dev != __device_end; dev++) {
if ((dev->driver_api != NULL) &&
strcmp(dev->config->name, "") && (dev->config->name != NULL)) {
strcmp(dev->name, "") && (dev->name != NULL)) {
if (idx == device_idx) {
entry->syntax = dev->config->name;
entry->syntax = dev->name;
break;
}
device_idx++;

10
drivers/flash/nrf_qspi_nor.c
View file

@ -320,7 +320,7 @@ static int qspi_erase(struct device *dev, u32_t addr, u32_t size)
}
int rv = -EIO;
const struct qspi_nor_config *params = dev->config->config_info;
const struct qspi_nor_config *params = dev->config_info;
while (size) {
nrfx_err_t res = !NRFX_SUCCESS;
@ -504,7 +504,7 @@ static int qspi_nor_read(struct device *dev, off_t addr, void *dest,
return -EINVAL;
}
const struct qspi_nor_config *params = dev->config->config_info;
const struct qspi_nor_config *params = dev->config_info;
/* should be between 0 and flash size */
if (addr >= params->size ||
@ -543,7 +543,7 @@ static int qspi_nor_write(struct device *dev, off_t addr, const void *src,
}
struct qspi_nor_data *const driver_data = dev->driver_data;
const struct qspi_nor_config *params = dev->config->config_info;
const struct qspi_nor_config *params = dev->config_info;
if (driver_data->write_protection) {
return -EACCES;
@ -572,7 +572,7 @@ static int qspi_nor_write(struct device *dev, off_t addr, const void *src,
static int qspi_nor_erase(struct device *dev, off_t addr, size_t size)
{
struct qspi_nor_data *const driver_data = dev->driver_data;
const struct qspi_nor_config *params = dev->config->config_info;
const struct qspi_nor_config *params = dev->config_info;
if (driver_data->write_protection) {
return -EACCES;
@ -622,7 +622,7 @@ static int qspi_nor_write_protection_set(struct device *dev,
*/
static int qspi_nor_configure(struct device *dev)
{
const struct qspi_nor_config *params = dev->config->config_info;
const struct qspi_nor_config *params = dev->config_info;
int ret = qspi_nrfx_configure(dev);

2
drivers/flash/spi_flash_at45.c
View file

@ -83,7 +83,7 @@ static struct spi_flash_at45_data *get_dev_data(struct device *dev)
static const struct spi_flash_at45_config *get_dev_config(struct device *dev)
{
return dev->config->config_info;
return dev->config_info;
}
static void acquire(struct device *dev)

8
drivers/flash/spi_nor.c
View file

@ -316,7 +316,7 @@ static int spi_nor_wait_until_ready(struct device *dev)
static int spi_nor_read(struct device *dev, off_t addr, void *dest,
size_t size)
{
const struct spi_nor_config *params = dev->config->config_info;
const struct spi_nor_config *params = dev->config_info;
int ret;
/* should be between 0 and flash size */
@ -337,7 +337,7 @@ static int spi_nor_read(struct device *dev, off_t addr, void *dest,
static int spi_nor_write(struct device *dev, off_t addr, const void *src,
size_t size)
{
const struct spi_nor_config *params = dev->config->config_info;
const struct spi_nor_config *params = dev->config_info;
int ret = 0;
/* should be between 0 and flash size */
@ -382,7 +382,7 @@ out:
static int spi_nor_erase(struct device *dev, off_t addr, size_t size)
{
const struct spi_nor_config *params = dev->config->config_info;
const struct spi_nor_config *params = dev->config_info;
int ret = 0;
/* should be between 0 and flash size */
@ -471,7 +471,7 @@ static int spi_nor_write_protection_set(struct device *dev, bool write_protect)
static int spi_nor_configure(struct device *dev)
{
struct spi_nor_data *data = dev->driver_data;
const struct spi_nor_config *params = dev->config->config_info;
const struct spi_nor_config *params = dev->config_info;
data->spi = device_get_binding(DT_INST_BUS_LABEL(0));
if (!data->spi) {

2
drivers/gpio/gpio_cc32xx.c
View file

@ -62,7 +62,7 @@ struct gpio_cc32xx_data {
};
#define DEV_CFG(dev) \
((const struct gpio_cc32xx_config *)(dev)->config->config_info)
((const struct gpio_cc32xx_config *)(dev)->config_info)
#define DEV_DATA(dev) \
((struct gpio_cc32xx_data *)(dev)->driver_data)

22
drivers/gpio/gpio_cmsdk_ahb.c
View file

@ -46,7 +46,7 @@ struct gpio_cmsdk_ahb_dev_data {
static int gpio_cmsdk_ahb_port_get_raw(struct device *dev, u32_t *value)
{
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config_info;
*value = cfg->port->data;
@ -56,7 +56,7 @@ static int gpio_cmsdk_ahb_port_get_raw(struct device *dev, u32_t *value)
static int gpio_cmsdk_ahb_port_set_masked_raw(struct device *dev, u32_t mask,
u32_t value)
{
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config_info;
cfg->port->dataout = (cfg->port->dataout & ~mask) | (mask & value);
@ -65,7 +65,7 @@ static int gpio_cmsdk_ahb_port_set_masked_raw(struct device *dev, u32_t mask,
static int gpio_cmsdk_ahb_port_set_bits_raw(struct device *dev, u32_t mask)
{
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config_info;
cfg->port->dataout |= mask;
@ -74,7 +74,7 @@ static int gpio_cmsdk_ahb_port_set_bits_raw(struct device *dev, u32_t mask)
static int gpio_cmsdk_ahb_port_clear_bits_raw(struct device *dev, u32_t mask)
{
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config_info;
cfg->port->dataout &= ~mask;
@ -83,7 +83,7 @@ static int gpio_cmsdk_ahb_port_clear_bits_raw(struct device *dev, u32_t mask)
static int gpio_cmsdk_ahb_port_toggle_bits(struct device *dev, u32_t mask)
{
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config_info;
cfg->port->dataout ^= mask;
@ -92,7 +92,7 @@ static int gpio_cmsdk_ahb_port_toggle_bits(struct device *dev, u32_t mask)
static int cmsdk_ahb_gpio_config(struct device *dev, u32_t mask, gpio_flags_t flags)
{
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config_info;
if (((flags & GPIO_INPUT) == 0) && ((flags & GPIO_OUTPUT) == 0)) {
return -ENOTSUP;
@ -148,7 +148,7 @@ static int gpio_cmsdk_ahb_pin_interrupt_configure(struct device *dev,
gpio_pin_t pin, enum gpio_int_mode mode,
enum gpio_int_trig trig)
{
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config_info;
if (trig == GPIO_INT_TRIG_BOTH) {
return -ENOTSUP;
@ -187,7 +187,7 @@ static int gpio_cmsdk_ahb_pin_interrupt_configure(struct device *dev,
static void gpio_cmsdk_ahb_isr(void *arg)
{
struct device *dev = (struct device *)arg;
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config_info;
struct gpio_cmsdk_ahb_dev_data *data = dev->driver_data;
u32_t int_stat;
@ -212,7 +212,7 @@ static int gpio_cmsdk_ahb_manage_callback(struct device *dev,
static int gpio_cmsdk_ahb_enable_callback(struct device *dev,
gpio_pin_t pin)
{
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config_info;
cfg->port->intenset |= BIT(pin);
@ -222,7 +222,7 @@ static int gpio_cmsdk_ahb_enable_callback(struct device *dev,
static int gpio_cmsdk_ahb_disable_callback(struct device *dev,
gpio_pin_t pin)
{
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config_info;
cfg->port->intenclr |= BIT(pin);
@ -250,7 +250,7 @@ static const struct gpio_driver_api gpio_cmsdk_ahb_drv_api_funcs = {
*/
static int gpio_cmsdk_ahb_init(struct device *dev)
{
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config_info;
#ifdef CONFIG_CLOCK_CONTROL
/* Enable clock for subsystem */

20
drivers/gpio/gpio_dw.c
View file

@ -99,7 +99,7 @@ static inline void gpio_dw_clock_config(struct device *port)
static inline void gpio_dw_clock_on(struct device *port)
{
const struct gpio_dw_config *config = port->config->config_info;
const struct gpio_dw_config *config = port->config_info;
struct gpio_dw_runtime *context = port->driver_data;
clock_control_on(context->clock, config->clock_data);
@ -107,7 +107,7 @@ static inline void gpio_dw_clock_on(struct device *port)
static inline void gpio_dw_clock_off(struct device *port)
{
const struct gpio_dw_config *config = port->config->config_info;
const struct gpio_dw_config *config = port->config_info;
struct gpio_dw_runtime *context = port->driver_data;
clock_control_off(context->clock, config->clock_data);
@ -211,7 +211,7 @@ static int gpio_dw_pin_interrupt_configure(struct device *port,
enum gpio_int_trig trig)
{
struct gpio_dw_runtime *context = port->driver_data;
const struct gpio_dw_config *config = port->config->config_info;
const struct gpio_dw_config *config = port->config_info;
u32_t base_addr = dw_base_to_block_base(context->base_addr);
u32_t port_base_addr = context->base_addr;
u32_t dir_port = dw_get_dir_port(port_base_addr);
@ -275,7 +275,7 @@ static inline void dw_pin_config(struct device *port,
u32_t pin, int flags)
{
struct gpio_dw_runtime *context = port->driver_data;
const struct gpio_dw_config *config = port->config->config_info;
const struct gpio_dw_config *config = port->config_info;
u32_t base_addr = dw_base_to_block_base(context->base_addr);
u32_t port_base_addr = context->base_addr;
u32_t dir_port = dw_get_dir_port(port_base_addr);
@ -307,7 +307,7 @@ static inline int gpio_dw_config(struct device *port,
gpio_pin_t pin,
gpio_flags_t flags)
{
const struct gpio_dw_config *config = port->config->config_info;
const struct gpio_dw_config *config = port->config_info;
u32_t io_flags;
/* Check for invalid pin number */
@ -555,7 +555,7 @@ static const struct gpio_driver_api api_funcs = {
static int gpio_dw_initialize(struct device *port)
{
struct gpio_dw_runtime *context = port->driver_data;
const struct gpio_dw_config *config = port->config->config_info;
const struct gpio_dw_config *config = port->config_info;
u32_t base_addr;
if (dw_interrupt_support(config)) {
@ -626,7 +626,7 @@ DEVICE_AND_API_INIT(gpio_dw_0, DT_INST_LABEL(0),
static void gpio_config_0_irq(struct device *port)
{
#if (DT_INST_IRQN(0) > 0)
const struct gpio_dw_config *config = port->config->config_info;
const struct gpio_dw_config *config = port->config_info;
#ifdef CONFIG_GPIO_DW_0_IRQ_DIRECT
IRQ_CONNECT(DT_INST_IRQN(0),
@ -696,7 +696,7 @@ DEVICE_AND_API_INIT(gpio_dw_1, DT_INST_LABEL(1),
static void gpio_config_1_irq(struct device *port)
{
#if (DT_INST_IRQN(1) > 0)
const struct gpio_dw_config *config = port->config->config_info;
const struct gpio_dw_config *config = port->config_info;
#ifdef CONFIG_GPIO_DW_1_IRQ_DIRECT
IRQ_CONNECT(DT_INST_IRQN(1),
@ -764,7 +764,7 @@ DEVICE_AND_API_INIT(gpio_dw_2, DT_INST_LABEL(2),
static void gpio_config_2_irq(struct device *port)
{
#if (DT_INST_IRQN(2) > 0)
const struct gpio_dw_config *config = port->config->config_info;
const struct gpio_dw_config *config = port->config_info;
#ifdef CONFIG_GPIO_DW_2_IRQ_DIRECT
IRQ_CONNECT(DT_INST_IRQN(2),
@ -832,7 +832,7 @@ DEVICE_AND_API_INIT(gpio_dw_3, DT_INST_LABEL(3),
static void gpio_config_3_irq(struct device *port)
{
#if (DT_INST_IRQN(3) > 0)
const struct gpio_dw_config *config = port->config->config_info;
const struct gpio_dw_config *config = port->config_info;
#ifdef CONFIG_GPIO_DW_3_IRQ_DIRECT
IRQ_CONNECT(DT_INST_IRQN(3),

14
drivers/gpio/gpio_gecko.c
View file

@ -76,7 +76,7 @@ static int gpio_gecko_configure(struct device *dev,
gpio_pin_t pin,
gpio_flags_t flags)
{
const struct gpio_gecko_config *config = dev->config->config_info;
const struct gpio_gecko_config *config = dev->config_info;
GPIO_Port_TypeDef gpio_index = config->gpio_index;
GPIO_Mode_TypeDef mode;
unsigned int out = 0U;
@ -127,7 +127,7 @@ static int gpio_gecko_configure(struct device *dev,
static int gpio_gecko_port_get_raw(struct device *dev, u32_t *value)
{
const struct gpio_gecko_config *config = dev->config->config_info;
const struct gpio_gecko_config *config = dev->config_info;
GPIO_P_TypeDef *gpio_base = config->gpio_base;
*value = gpio_base->DIN;
@ -138,7 +138,7 @@ static int gpio_gecko_port_get_raw(struct device *dev, u32_t *value)
static int gpio_gecko_port_set_masked_raw(struct device *dev, u32_t mask,
u32_t value)
{
const struct gpio_gecko_config *config = dev->config->config_info;
const struct gpio_gecko_config *config = dev->config_info;
GPIO_P_TypeDef *gpio_base = config->gpio_base;
gpio_base->DOUT = (gpio_base->DOUT & ~mask) | (mask & value);
@ -148,7 +148,7 @@ static int gpio_gecko_port_set_masked_raw(struct device *dev, u32_t mask,
static int gpio_gecko_port_set_bits_raw(struct device *dev, u32_t mask)
{
const struct gpio_gecko_config *config = dev->config->config_info;
const struct gpio_gecko_config *config = dev->config_info;
GPIO_P_TypeDef *gpio_base = config->gpio_base;
#if defined(_GPIO_P_DOUTSET_MASK)
@ -162,7 +162,7 @@ static int gpio_gecko_port_set_bits_raw(struct device *dev, u32_t mask)
static int gpio_gecko_port_clear_bits_raw(struct device *dev, u32_t mask)
{
const struct gpio_gecko_config *config = dev->config->config_info;
const struct gpio_gecko_config *config = dev->config_info;
GPIO_P_TypeDef *gpio_base = config->gpio_base;
#if defined(_GPIO_P_DOUTCLR_MASK)
@ -176,7 +176,7 @@ static int gpio_gecko_port_clear_bits_raw(struct device *dev, u32_t mask)
static int gpio_gecko_port_toggle_bits(struct device *dev, u32_t mask)
{
const struct gpio_gecko_config *config = dev->config->config_info;
const struct gpio_gecko_config *config = dev->config_info;
GPIO_P_TypeDef *gpio_base = config->gpio_base;
gpio_base->DOUTTGL = mask;
@ -188,7 +188,7 @@ static int gpio_gecko_pin_interrupt_configure(struct device *dev,
gpio_pin_t pin, enum gpio_int_mode mode,
enum gpio_int_trig trig)
{
const struct gpio_gecko_config *config = dev->config->config_info;
const struct gpio_gecko_config *config = dev->config_info;
struct gpio_gecko_data *data = dev->driver_data;
/* Interrupt on static level is not supported by the hardware */

2
drivers/gpio/gpio_ht16k33.c
View file

@ -161,7 +161,7 @@ static u32_t gpio_ht16k33_get_pending_int(struct device *dev)
static int gpio_ht16k33_init(struct device *dev)
{
const struct gpio_ht16k33_cfg *config = dev->config->config_info;
const struct gpio_ht16k33_cfg *config = dev->config_info;
struct gpio_ht16k33_data *data = dev->driver_data;
if (config->keyscan_idx >= HT16K33_KEYSCAN_ROWS) {

20
drivers/gpio/gpio_imx.c
View file

@ -33,7 +33,7 @@ struct imx_gpio_data {
static int imx_gpio_configure(struct device *port, gpio_pin_t pin,
gpio_flags_t flags)
{
const struct imx_gpio_config *config = port->config->config_info;
const struct imx_gpio_config *config = port->config_info;
GPIO_Type *base = config->base;
if (((flags & GPIO_INPUT) != 0U) && ((flags & GPIO_OUTPUT) != 0U)) {
@ -70,7 +70,7 @@ static int imx_gpio_configure(struct device *port, gpio_pin_t pin,
static int imx_gpio_port_get_raw(struct device *port, u32_t *value)
{
const struct imx_gpio_config *config = port->config->config_info;
const struct imx_gpio_config *config = port->config_info;
GPIO_Type *base = config->base;
*value = GPIO_ReadPortInput(base);
@ -82,7 +82,7 @@ static int imx_gpio_port_set_masked_raw(struct device *port,
gpio_port_pins_t mask,
gpio_port_value_t value)
{
const struct imx_gpio_config *config = port->config->config_info;
const struct imx_gpio_config *config = port->config_info;
GPIO_Type *base = config->base;
GPIO_WritePortOutput(base,
@ -94,7 +94,7 @@ static int imx_gpio_port_set_masked_raw(struct device *port,
static int imx_gpio_port_set_bits_raw(struct device *port,
gpio_port_pins_t pins)
{
const struct imx_gpio_config *config = port->config->config_info;
const struct imx_gpio_config *config = port->config_info;
GPIO_Type *base = config->base;
GPIO_WritePortOutput(base, GPIO_ReadPortInput(base) | pins);
@ -105,7 +105,7 @@ static int imx_gpio_port_set_bits_raw(struct device *port,
static int imx_gpio_port_clear_bits_raw(struct device *port,
gpio_port_pins_t pins)
{
const struct imx_gpio_config *config = port->config->config_info;
const struct imx_gpio_config *config = port->config_info;
GPIO_Type *base = config->base;
GPIO_WritePortOutput(base, GPIO_ReadPortInput(base) & ~pins);
@ -115,7 +115,7 @@ static int imx_gpio_port_clear_bits_raw(struct device *port,
static int imx_gpio_port_toggle_bits(struct device *port, gpio_port_pins_t pins)
{
const struct imx_gpio_config *config = port->config->config_info;
const struct imx_gpio_config *config = port->config_info;
GPIO_Type *base = config->base;
GPIO_WritePortOutput(base, GPIO_ReadPortInput(base) ^ pins);
@ -128,7 +128,7 @@ static int imx_gpio_pin_interrupt_configure(struct device *port,
enum gpio_int_mode mode,
enum gpio_int_trig trig)
{
const struct imx_gpio_config *config = port->config->config_info;
const struct imx_gpio_config *config = port->config_info;
struct imx_gpio_data *data = port->driver_data;
GPIO_Type *base = config->base;
volatile u32_t *icr_reg;
@ -190,7 +190,7 @@ static int imx_gpio_manage_callback(struct device *port,
static int imx_gpio_enable_callback(struct device *port,
gpio_pin_t pin)
{
const struct imx_gpio_config *config = port->config->config_info;
const struct imx_gpio_config *config = port->config_info;
struct imx_gpio_data *data = port->driver_data;
data->pin_callback_enables |= BIT(pin);
@ -202,7 +202,7 @@ static int imx_gpio_enable_callback(struct device *port,
static int imx_gpio_disable_callback(struct device *port,
gpio_pin_t pin)
{
const struct imx_gpio_config *config = port->config->config_info;
const struct imx_gpio_config *config = port->config_info;
struct imx_gpio_data *data = port->driver_data;
GPIO_SetPinIntMode(config->base, pin, false);
@ -214,7 +214,7 @@ static int imx_gpio_disable_callback(struct device *port,
static void imx_gpio_port_isr(void *arg)
{
struct device *port = (struct device *)arg;
const struct imx_gpio_config *config = port->config->config_info;
const struct imx_gpio_config *config = port->config_info;
struct imx_gpio_data *data = port->driver_data;
u32_t enabled_int;

18
drivers/gpio/gpio_intel_apl.c
View file

@ -132,7 +132,7 @@ struct gpio_intel_apl_data {
*/
static bool check_perm(struct device *dev, u32_t raw_pin)
{
const struct gpio_intel_apl_config *cfg = dev->config->config_info;
const struct gpio_intel_apl_config *cfg = dev->config_info;
struct gpio_intel_apl_data *data = dev->driver_data;
u32_t offset, val;
@ -183,7 +183,7 @@ static int gpio_intel_apl_isr(struct device *dev)
for (isr_dev = 0; isr_dev < nr_isr_devs; ++isr_dev) {
dev = isr_devs[isr_dev];
cfg = dev->config->config_info;
cfg = dev->config_info;
data = dev->driver_data;
reg = cfg->reg_base + REG_GPI_INT_STS_BASE
@ -210,7 +210,7 @@ static int gpio_intel_apl_isr(struct device *dev)
static int gpio_intel_apl_config(struct device *dev,
gpio_pin_t pin, gpio_flags_t flags)
{
const struct gpio_intel_apl_config *cfg = dev->config->config_info;
const struct gpio_intel_apl_config *cfg = dev->config_info;
struct gpio_intel_apl_data *data = dev->driver_data;
u32_t raw_pin, reg, cfg0, cfg1;
@ -285,7 +285,7 @@ static int gpio_intel_apl_pin_interrupt_configure(struct device *dev,
gpio_pin_t pin, enum gpio_int_mode mode,
enum gpio_int_trig trig)
{
const struct gpio_intel_apl_config *cfg = dev->config->config_info;
const struct gpio_intel_apl_config *cfg = dev->config_info;
struct gpio_intel_apl_data *data = dev->driver_data;
u32_t raw_pin, cfg0, cfg1;
u32_t reg, reg_en, reg_sts;
@ -373,7 +373,7 @@ static int gpio_intel_apl_manage_callback(struct device *dev,
static int gpio_intel_apl_enable_callback(struct device *dev,
gpio_pin_t pin)
{
const struct gpio_intel_apl_config *cfg = dev->config->config_info;
const struct gpio_intel_apl_config *cfg = dev->config_info;
u32_t raw_pin, reg;
pin = k_array_index_sanitize(pin, cfg->num_pins + 1);
@ -398,7 +398,7 @@ static int gpio_intel_apl_enable_callback(struct device *dev,
static int gpio_intel_apl_disable_callback(struct device *dev,
gpio_pin_t pin)
{
const struct gpio_intel_apl_config *cfg = dev->config->config_info;
const struct gpio_intel_apl_config *cfg = dev->config_info;
u32_t raw_pin, reg;
pin = k_array_index_sanitize(pin, cfg->num_pins + 1);
@ -419,7 +419,7 @@ static int gpio_intel_apl_disable_callback(struct device *dev,
static int port_get_raw(struct device *dev, u32_t mask, u32_t *value,
bool read_tx)
{
const struct gpio_intel_apl_config *cfg = dev->config->config_info;
const struct gpio_intel_apl_config *cfg = dev->config_info;
struct gpio_intel_apl_data *data = dev->driver_data;
u32_t pin, raw_pin, reg_addr, reg_val, cmp;
@ -458,7 +458,7 @@ static int port_get_raw(struct device *dev, u32_t mask, u32_t *value,
static int port_set_raw(struct device *dev, u32_t mask, u32_t value)
{
const struct gpio_intel_apl_config *cfg = dev->config->config_info;
const struct gpio_intel_apl_config *cfg = dev->config_info;
struct gpio_intel_apl_data *data = dev->driver_data;
u32_t pin, raw_pin, reg_addr, reg_val;
@ -549,7 +549,7 @@ static const struct gpio_driver_api gpio_intel_apl_api = {
int gpio_intel_apl_init(struct device *dev)
{
const struct gpio_intel_apl_config *cfg = dev->config->config_info;
const struct gpio_intel_apl_config *cfg = dev->config_info;
struct gpio_intel_apl_data *data = dev->driver_data;
data->pad_base = sys_read32(cfg->reg_base + REG_PAD_BASE_ADDR);

2
drivers/gpio/gpio_litex.c
View file

@ -43,7 +43,7 @@ struct gpio_litex_data {
/* Helper macros for GPIO */
#define DEV_GPIO_CFG(dev) \
((const struct gpio_litex_cfg *)(dev)->config->config_info)
((const struct gpio_litex_cfg *)(dev)->config_info)
/* Helper functions for bit / port access */

2
drivers/gpio/gpio_lmp90xxx.c
View file

@ -138,7 +138,7 @@ static int gpio_lmp90xxx_pin_interrupt_configure(struct device *dev,
static int gpio_lmp90xxx_init(struct device *dev)
{
const struct gpio_lmp90xxx_config *config = dev->config->config_info;
const struct gpio_lmp90xxx_config *config = dev->config_info;
struct gpio_lmp90xxx_data *data = dev->driver_data;
data->parent = device_get_binding(config->parent_dev_name);

28
drivers/gpio/gpio_mchp_xec.c
View file

@ -49,7 +49,7 @@ struct gpio_xec_config {
static int gpio_xec_configure(struct device *dev,
gpio_pin_t pin, gpio_flags_t flags)
{
const struct gpio_xec_config *config = dev->config->config_info;
const struct gpio_xec_config *config = dev->config_info;
__IO u32_t *current_pcr1;
u32_t pcr1 = 0U;
u32_t mask = 0U;
@ -132,7 +132,7 @@ static int gpio_xec_pin_interrupt_configure(struct device *dev,
gpio_pin_t pin, enum gpio_int_mode mode,
enum gpio_int_trig trig)
{
const struct gpio_xec_config *config = dev->config->config_info;
const struct gpio_xec_config *config = dev->config_info;
struct gpio_xec_data *drv_data = dev->driver_data;
__IO u32_t *current_pcr1;
u32_t pcr1 = 0U;
@ -213,7 +213,7 @@ static int gpio_xec_pin_interrupt_configure(struct device *dev,
static int gpio_xec_port_set_masked_raw(struct device *dev, u32_t mask,
u32_t value)
{
const struct gpio_xec_config *config = dev->config->config_info;
const struct gpio_xec_config *config = dev->config_info;
/* GPIO output registers are used for writing */
__IO u32_t *gpio_base = GPIO_OUT_BASE(config);
@ -225,7 +225,7 @@ static int gpio_xec_port_set_masked_raw(struct device *dev, u32_t mask,
static int gpio_xec_port_set_bits_raw(struct device *dev, u32_t mask)
{
const struct gpio_xec_config *config = dev->config->config_info;
const struct gpio_xec_config *config = dev->config_info;
/* GPIO output registers are used for writing */
__IO u32_t *gpio_base = GPIO_OUT_BASE(config);
@ -237,7 +237,7 @@ static int gpio_xec_port_set_bits_raw(struct device *dev, u32_t mask)
static int gpio_xec_port_clear_bits_raw(struct device *dev, u32_t mask)
{
const struct gpio_xec_config *config = dev->config->config_info;
const struct gpio_xec_config *config = dev->config_info;
/* GPIO output registers are used for writing */
__IO u32_t *gpio_base = GPIO_OUT_BASE(config);
@ -249,7 +249,7 @@ static int gpio_xec_port_clear_bits_raw(struct device *dev, u32_t mask)
static int gpio_xec_port_toggle_bits(struct device *dev, u32_t mask)
{
const struct gpio_xec_config *config = dev->config->config_info;
const struct gpio_xec_config *config = dev->config_info;
/* GPIO output registers are used for writing */
__IO u32_t *gpio_base = GPIO_OUT_BASE(config);
@ -261,7 +261,7 @@ static int gpio_xec_port_toggle_bits(struct device *dev, u32_t mask)
static int gpio_xec_port_get_raw(struct device *dev, u32_t *value)
{
const struct gpio_xec_config *config = dev->config->config_info;
const struct gpio_xec_config *config = dev->config_info;
/* GPIO input registers are used for reading */
__IO u32_t *gpio_base = GPIO_IN_BASE(config);
@ -304,7 +304,7 @@ static int gpio_xec_disable_callback(struct device *dev,
static void gpio_gpio_xec_port_isr(void *arg)
{
struct device *dev = (struct device *)arg;
const struct gpio_xec_config *config = dev->config->config_info;
const struct gpio_xec_config *config = dev->config_info;
struct gpio_xec_data *data = dev->driver_data;
u32_t girq_result;
u32_t enabled_int;
@ -364,7 +364,7 @@ DEVICE_AND_API_INIT(gpio_xec_port000_036,
static int gpio_xec_port000_036_init(struct device *dev)
{
#if DT_IRQ_HAS_CELL(DT_NODELABEL(gpio_000_036), irq)
const struct gpio_xec_config *config = dev->config->config_info;
const struct gpio_xec_config *config = dev->config_info;
/* Turn on the block enable in the EC aggregator */
MCHP_GIRQ_BLK_SETEN(config->girq_id);
@ -409,7 +409,7 @@ DEVICE_AND_API_INIT(gpio_xec_port040_076,
static int gpio_xec_port040_076_init(struct device *dev)
{
#if DT_IRQ_HAS_CELL(DT_NODELABEL(gpio_040_076), irq)
const struct gpio_xec_config *config = dev->config->config_info;
const struct gpio_xec_config *config = dev->config_info;
/* Turn on the block enable in the EC aggregator */
MCHP_GIRQ_BLK_SETEN(config->girq_id);
@ -454,7 +454,7 @@ DEVICE_AND_API_INIT(gpio_xec_port100_136,
static int gpio_xec_port100_136_init(struct device *dev)
{
#if DT_IRQ_HAS_CELL(DT_NODELABEL(gpio_100_136), irq)
const struct gpio_xec_config *config = dev->config->config_info;
const struct gpio_xec_config *config = dev->config_info;
/* Turn on the block enable in the EC aggregator */
MCHP_GIRQ_BLK_SETEN(config->girq_id);
@ -499,7 +499,7 @@ DEVICE_AND_API_INIT(gpio_xec_port140_176,
static int gpio_xec_port140_176_init(struct device *dev)
{
#if DT_IRQ_HAS_CELL(DT_NODELABEL(gpio_140_176), irq)
const struct gpio_xec_config *config = dev->config->config_info;
const struct gpio_xec_config *config = dev->config_info;
/* Turn on the block enable in the EC aggregator */
MCHP_GIRQ_BLK_SETEN(config->girq_id);
@ -544,7 +544,7 @@ DEVICE_AND_API_INIT(gpio_xec_port200_236,
static int gpio_xec_port200_236_init(struct device *dev)
{
#if DT_IRQ_HAS_CELL(DT_NODELABEL(gpio_200_236), irq)
const struct gpio_xec_config *config = dev->config->config_info;
const struct gpio_xec_config *config = dev->config_info;
/* Turn on the block enable in the EC aggregator */
MCHP_GIRQ_BLK_SETEN(config->girq_id);
@ -589,7 +589,7 @@ DEVICE_AND_API_INIT(gpio_xec_port240_276,
static int gpio_xec_port240_276_init(struct device *dev)
{
#if DT_IRQ_HAS_CELL(DT_NODELABEL(gpio_240_276), irq)
const struct gpio_xec_config *config = dev->config->config_info;
const struct gpio_xec_config *config = dev->config_info;
/* Turn on the block enable in the EC aggregator */
MCHP_GIRQ_BLK_SETEN(config->girq_id);

2
drivers/gpio/gpio_mcp23s17.c
View file

@ -360,7 +360,7 @@ static const struct gpio_driver_api api_table = {
static int mcp23s17_init(struct device *dev)
{
const struct mcp23s17_config *const config =
dev->config->config_info;
dev->config_info;
struct mcp23s17_drv_data *const drv_data =
(struct mcp23s17_drv_data *const)dev->driver_data;

16
drivers/gpio/gpio_mcux.c
View file

@ -36,7 +36,7 @@ struct gpio_mcux_data {
static int gpio_mcux_configure(struct device *dev,
gpio_pin_t pin, gpio_flags_t flags)
{
const struct gpio_mcux_config *config = dev->config->config_info;
const struct gpio_mcux_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
PORT_Type *port_base = config->port_base;
u32_t mask = 0U;
@ -102,7 +102,7 @@ static int gpio_mcux_configure(struct device *dev,
static int gpio_mcux_port_get_raw(struct device *dev, u32_t *value)
{
const struct gpio_mcux_config *config = dev->config->config_info;
const struct gpio_mcux_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
*value = gpio_base->PDIR;
@ -113,7 +113,7 @@ static int gpio_mcux_port_get_raw(struct device *dev, u32_t *value)
static int gpio_mcux_port_set_masked_raw(struct device *dev, u32_t mask,
u32_t value)
{
const struct gpio_mcux_config *config = dev->config->config_info;
const struct gpio_mcux_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
gpio_base->PDOR = (gpio_base->PDOR & ~mask) | (mask & value);
@ -123,7 +123,7 @@ static int gpio_mcux_port_set_masked_raw(struct device *dev, u32_t mask,
static int gpio_mcux_port_set_bits_raw(struct device *dev, u32_t mask)
{
const struct gpio_mcux_config *config = dev->config->config_info;
const struct gpio_mcux_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
gpio_base->PSOR = mask;
@ -133,7 +133,7 @@ static int gpio_mcux_port_set_bits_raw(struct device *dev, u32_t mask)
static int gpio_mcux_port_clear_bits_raw(struct device *dev, u32_t mask)
{
const struct gpio_mcux_config *config = dev->config->config_info;
const struct gpio_mcux_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
gpio_base->PCOR = mask;
@ -143,7 +143,7 @@ static int gpio_mcux_port_clear_bits_raw(struct device *dev, u32_t mask)
static int gpio_mcux_port_toggle_bits(struct device *dev, u32_t mask)
{
const struct gpio_mcux_config *config = dev->config->config_info;
const struct gpio_mcux_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
gpio_base->PTOR = mask;
@ -188,7 +188,7 @@ static int gpio_mcux_pin_interrupt_configure(struct device *dev,
gpio_pin_t pin, enum gpio_int_mode mode,
enum gpio_int_trig trig)
{
const struct gpio_mcux_config *config = dev->config->config_info;
const struct gpio_mcux_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
PORT_Type *port_base = config->port_base;
struct gpio_mcux_data *data = dev->driver_data;
@ -250,7 +250,7 @@ static int gpio_mcux_disable_callback(struct device *dev,
static void gpio_mcux_port_isr(void *arg)
{
struct device *dev = (struct device *)arg;
const struct gpio_mcux_config *config = dev->config->config_info;
const struct gpio_mcux_config *config = dev->config_info;
struct gpio_mcux_data *data = dev->driver_data;
u32_t enabled_int, int_status;

16
drivers/gpio/gpio_mcux_igpio.c
View file

@ -33,7 +33,7 @@ struct mcux_igpio_data {
static int mcux_igpio_configure(struct device *dev,
gpio_pin_t pin, gpio_flags_t flags)
{
const struct mcux_igpio_config *config = dev->config->config_info;
const struct mcux_igpio_config *config = dev->config_info;
GPIO_Type *base = config->base;
if (((flags & GPIO_INPUT) != 0) && ((flags & GPIO_OUTPUT) != 0)) {
@ -63,7 +63,7 @@ static int mcux_igpio_configure(struct device *dev,
static int mcux_igpio_port_get_raw(struct device *dev, u32_t *value)
{
const struct mcux_igpio_config *config = dev->config->config_info;
const struct mcux_igpio_config *config = dev->config_info;
GPIO_Type *base = config->base;
*value = base->DR;
@ -74,7 +74,7 @@ static int mcux_igpio_port_get_raw(struct device *dev, u32_t *value)
static int mcux_igpio_port_set_masked_raw(struct device *dev, u32_t mask,
u32_t value)
{
const struct mcux_igpio_config *config = dev->config->config_info;
const struct mcux_igpio_config *config = dev->config_info;
GPIO_Type *base = config->base;
base->DR = (base->DR & ~mask) | (mask & value);
@ -84,7 +84,7 @@ static int mcux_igpio_port_set_masked_raw(struct device *dev, u32_t mask,
static int mcux_igpio_port_set_bits_raw(struct device *dev, u32_t mask)
{
const struct mcux_igpio_config *config = dev->config->config_info;
const struct mcux_igpio_config *config = dev->config_info;
GPIO_Type *base = config->base;
base->DR_SET = mask;
@ -94,7 +94,7 @@ static int mcux_igpio_port_set_bits_raw(struct device *dev, u32_t mask)
static int mcux_igpio_port_clear_bits_raw(struct device *dev, u32_t mask)
{
const struct mcux_igpio_config *config = dev->config->config_info;
const struct mcux_igpio_config *config = dev->config_info;
GPIO_Type *base = config->base;
base->DR_CLEAR = mask;
@ -104,7 +104,7 @@ static int mcux_igpio_port_clear_bits_raw(struct device *dev, u32_t mask)
static int mcux_igpio_port_toggle_bits(struct device *dev, u32_t mask)
{
const struct mcux_igpio_config *config = dev->config->config_info;
const struct mcux_igpio_config *config = dev->config_info;
GPIO_Type *base = config->base;
base->DR_TOGGLE = mask;
@ -116,7 +116,7 @@ static int mcux_igpio_pin_interrupt_configure(struct device *dev,
gpio_pin_t pin, enum gpio_int_mode mode,
enum gpio_int_trig trig)
{
const struct mcux_igpio_config *config = dev->config->config_info;
const struct mcux_igpio_config *config = dev->config_info;
struct mcux_igpio_data *data = dev->driver_data;
GPIO_Type *base = config->base;
unsigned int key;
@ -199,7 +199,7 @@ static int mcux_igpio_disable_callback(struct device *dev,
static void mcux_igpio_port_isr(void *arg)
{
struct device *dev = (struct device *)arg;
const struct mcux_igpio_config *config = dev->config->config_info;
const struct mcux_igpio_config *config = dev->config_info;
struct mcux_igpio_data *data = dev->driver_data;
GPIO_Type *base = config->base;
u32_t enabled_int, int_flags;

18
drivers/gpio/gpio_mcux_lpc.c
View file

@ -61,7 +61,7 @@ struct gpio_mcux_lpc_data {
static int gpio_mcux_lpc_configure(struct device *dev, gpio_pin_t pin,
gpio_flags_t flags)
{
const struct gpio_mcux_lpc_config *config = dev->config->config_info;
const struct gpio_mcux_lpc_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
u32_t port = config->port_no;
@ -102,7 +102,7 @@ static int gpio_mcux_lpc_configure(struct device *dev, gpio_pin_t pin,
static int gpio_mcux_lpc_port_get_raw(struct device *dev, u32_t *value)
{
const struct gpio_mcux_lpc_config *config = dev->config->config_info;
const struct gpio_mcux_lpc_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
*value = gpio_base->PIN[config->port_no];
@ -113,7 +113,7 @@ static int gpio_mcux_lpc_port_get_raw(struct device *dev, u32_t *value)
static int gpio_mcux_lpc_port_set_masked_raw(struct device *dev, u32_t mask,
u32_t value)
{
const struct gpio_mcux_lpc_config *config = dev->config->config_info;
const struct gpio_mcux_lpc_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
u32_t port = config->port_no;
@ -128,7 +128,7 @@ static int gpio_mcux_lpc_port_set_masked_raw(struct device *dev, u32_t mask,
static int gpio_mcux_lpc_port_set_bits_raw(struct device *dev, u32_t mask)
{
const struct gpio_mcux_lpc_config *config = dev->config->config_info;
const struct gpio_mcux_lpc_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
gpio_base->SET[config->port_no] = mask;
@ -138,7 +138,7 @@ static int gpio_mcux_lpc_port_set_bits_raw(struct device *dev, u32_t mask)
static int gpio_mcux_lpc_port_clear_bits_raw(struct device *dev, u32_t mask)
{
const struct gpio_mcux_lpc_config *config = dev->config->config_info;
const struct gpio_mcux_lpc_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
gpio_base->CLR[config->port_no] = mask;
@ -148,7 +148,7 @@ static int gpio_mcux_lpc_port_clear_bits_raw(struct device *dev, u32_t mask)
static int gpio_mcux_lpc_port_toggle_bits(struct device *dev, u32_t mask)
{
const struct gpio_mcux_lpc_config *config = dev->config->config_info;
const struct gpio_mcux_lpc_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
gpio_base->NOT[config->port_no] = mask;
@ -159,7 +159,7 @@ static int gpio_mcux_lpc_port_toggle_bits(struct device *dev, u32_t mask)
static void gpio_mcux_lpc_port_isr(void *arg)
{
struct device *dev = (struct device *)arg;
const struct gpio_mcux_lpc_config *config = dev->config->config_info;
const struct gpio_mcux_lpc_config *config = dev->config_info;
struct gpio_mcux_lpc_data *data = dev->driver_data;
u32_t enabled_int;
u32_t int_flags;
@ -232,7 +232,7 @@ static int gpio_mcux_lpc_pin_interrupt_configure(struct device *dev,
gpio_pin_t pin, enum gpio_int_mode mode,
enum gpio_int_trig trig)
{
const struct gpio_mcux_lpc_config *config = dev->config->config_info;
const struct gpio_mcux_lpc_config *config = dev->config_info;
struct gpio_mcux_lpc_data *data = dev->driver_data;
pint_pin_enable_t interruptMode = kPINT_PinIntEnableNone;
GPIO_Type *gpio_base = config->gpio_base;
@ -322,7 +322,7 @@ static int gpio_mcux_lpc_disable_cb(struct device *port,
static int gpio_mcux_lpc_init(struct device *dev)
{
const struct gpio_mcux_lpc_config *config = dev->config->config_info;
const struct gpio_mcux_lpc_config *config = dev->config_info;
struct gpio_mcux_lpc_data *data = dev->driver_data;
int i;

2
drivers/gpio/gpio_mmio32.c
View file

@ -166,7 +166,7 @@ static const struct gpio_driver_api gpio_mmio32_api = {
int gpio_mmio32_init(struct device *dev)
{
struct gpio_mmio32_context *context = dev->driver_data;
const struct gpio_mmio32_config *config = dev->config->config_info;
const struct gpio_mmio32_config *config = dev->config_info;
context->config = config;
dev->driver_api = &gpio_mmio32_api;

2
drivers/gpio/gpio_nrfx.c
View file

@ -44,7 +44,7 @@ static inline struct gpio_nrfx_data *get_port_data(struct device *port)
static inline const struct gpio_nrfx_cfg *get_port_cfg(struct device *port)
{
return port->config->config_info;
return port->config_info;
}
static int gpiote_channel_alloc(u32_t abs_pin, nrf_gpiote_polarity_t polarity)

10
drivers/gpio/gpio_pca95xx.c
View file

@ -100,7 +100,7 @@ struct gpio_pca95xx_drv_data {
static int read_port_regs(struct device *dev, u8_t reg, u16_t *buf)
{
const struct gpio_pca95xx_config * const config =
dev->config->config_info;
dev->config_info;
struct gpio_pca95xx_drv_data * const drv_data =
(struct gpio_pca95xx_drv_data * const)dev->driver_data;
struct device * const i2c_master = drv_data->i2c_master;
@ -140,7 +140,7 @@ static int write_port_regs(struct device *dev, u8_t reg,
u16_t *cache, u16_t value)
{
const struct gpio_pca95xx_config * const config =
dev->config->config_info;
dev->config_info;
struct gpio_pca95xx_drv_data * const drv_data =
(struct gpio_pca95xx_drv_data * const)dev->driver_data;
struct device * const i2c_master = drv_data->i2c_master;
@ -253,7 +253,7 @@ static int setup_pin_dir(struct device *dev, u32_t pin, int flags)
static int setup_pin_pullupdown(struct device *dev, u32_t pin, int flags)
{
const struct gpio_pca95xx_config * const config =
dev->config->config_info;
dev->config_info;
struct gpio_pca95xx_drv_data * const drv_data =
(struct gpio_pca95xx_drv_data * const)dev->driver_data;
u16_t reg_pud;
@ -317,7 +317,7 @@ static int gpio_pca95xx_config(struct device *dev,
#if (CONFIG_GPIO_LOG_LEVEL >= LOG_LEVEL_DEBUG)
const struct gpio_pca95xx_config * const config =
dev->config->config_info;
dev->config_info;
u16_t i2c_addr = config->i2c_slave_addr;
#endif
@ -471,7 +471,7 @@ static const struct gpio_driver_api gpio_pca95xx_drv_api_funcs = {
static int gpio_pca95xx_init(struct device *dev)
{
const struct gpio_pca95xx_config * const config =
dev->config->config_info;
dev->config_info;
struct gpio_pca95xx_drv_data * const drv_data =
(struct gpio_pca95xx_drv_data * const)dev->driver_data;
struct device *i2c_master;

18
drivers/gpio/gpio_rv32m1.c
View file

@ -74,7 +74,7 @@ static u32_t get_port_pcr_irqc_value_from_flags(struct device *dev,
static int gpio_rv32m1_configure(struct device *dev,
gpio_pin_t pin, gpio_flags_t flags)
{
const struct gpio_rv32m1_config *config = dev->config->config_info;
const struct gpio_rv32m1_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
PORT_Type *port_base = config->port_base;
struct gpio_rv32m1_data *data = dev->driver_data;
@ -158,7 +158,7 @@ static int gpio_rv32m1_configure(struct device *dev,
}
static int gpio_rv32m1_port_get_raw(struct device *dev, u32_t *value)
{
const struct gpio_rv32m1_config *config = dev->config->config_info;
const struct gpio_rv32m1_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
*value = gpio_base->PDIR;
@ -169,7 +169,7 @@ static int gpio_rv32m1_port_get_raw(struct device *dev, u32_t *value)
static int gpio_rv32m1_port_set_masked_raw(struct device *dev, u32_t mask,
u32_t value)
{
const struct gpio_rv32m1_config *config = dev->config->config_info;
const struct gpio_rv32m1_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
gpio_base->PDOR = (gpio_base->PDOR & ~mask) | (mask & value);
@ -179,7 +179,7 @@ static int gpio_rv32m1_port_set_masked_raw(struct device *dev, u32_t mask,
static int gpio_rv32m1_port_set_bits_raw(struct device *dev, u32_t mask)
{
const struct gpio_rv32m1_config *config = dev->config->config_info;
const struct gpio_rv32m1_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
gpio_base->PSOR = mask;
@ -189,7 +189,7 @@ static int gpio_rv32m1_port_set_bits_raw(struct device *dev, u32_t mask)
static int gpio_rv32m1_port_clear_bits_raw(struct device *dev, u32_t mask)
{
const struct gpio_rv32m1_config *config = dev->config->config_info;
const struct gpio_rv32m1_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
gpio_base->PCOR = mask;
@ -199,7 +199,7 @@ static int gpio_rv32m1_port_clear_bits_raw(struct device *dev, u32_t mask)
static int gpio_rv32m1_port_toggle_bits(struct device *dev, u32_t mask)
{
const struct gpio_rv32m1_config *config = dev->config->config_info;
const struct gpio_rv32m1_config *config = dev->config_info;
GPIO_Type *gpio_base = config->gpio_base;
gpio_base->PTOR = mask;
@ -211,7 +211,7 @@ static int gpio_rv32m1_pin_interrupt_configure(struct device *dev,
gpio_pin_t pin, enum gpio_int_mode mode,
enum gpio_int_trig trig)
{
const struct gpio_rv32m1_config *config = dev->config->config_info;
const struct gpio_rv32m1_config *config = dev->config_info;
PORT_Type *port_base = config->port_base;
struct gpio_rv32m1_data *data = dev->driver_data;
@ -269,7 +269,7 @@ static int gpio_rv32m1_disable_callback(struct device *dev,
static void gpio_rv32m1_port_isr(void *arg)
{
struct device *dev = (struct device *)arg;
const struct gpio_rv32m1_config *config = dev->config->config_info;
const struct gpio_rv32m1_config *config = dev->config_info;
struct gpio_rv32m1_data *data = dev->driver_data;
u32_t enabled_int, int_status;
@ -285,7 +285,7 @@ static void gpio_rv32m1_port_isr(void *arg)
static int gpio_rv32m1_init(struct device *dev)
{
const struct gpio_rv32m1_config *config = dev->config->config_info;
const struct gpio_rv32m1_config *config = dev->config_info;
struct device *clk;
int ret;

2
drivers/gpio/gpio_sam.c
View file

@ -32,7 +32,7 @@ struct gpio_sam_runtime {
};
#define DEV_CFG(dev) \
((const struct gpio_sam_config * const)(dev)->config->config_info)
((const struct gpio_sam_config * const)(dev)->config_info)
#define DEV_DATA(dev) \
((struct gpio_sam_runtime * const)(dev)->driver_data)

2
drivers/gpio/gpio_sam0.c
View file

@ -38,7 +38,7 @@ struct gpio_sam0_data {
};
#define DEV_CFG(dev) \
((const struct gpio_sam0_config *const)(dev)->config->config_info)
((const struct gpio_sam0_config *const)(dev)->config_info)
#define DEV_DATA(dev) \
((struct gpio_sam0_data *const)(dev)->driver_data)

2
drivers/gpio/gpio_sifive.c
View file

@ -60,7 +60,7 @@ struct gpio_sifive_data {
/* Helper Macros for GPIO */
#define DEV_GPIO_CFG(dev) \
((const struct gpio_sifive_config * const)(dev)->config->config_info)
((const struct gpio_sifive_config * const)(dev)->config_info)
#define DEV_GPIO(dev) \
((volatile struct gpio_sifive_t *)(DEV_GPIO_CFG(dev))->gpio_base_addr)
#define DEV_GPIO_DATA(dev) \

2
drivers/gpio/gpio_stellaris.c
View file

@ -31,7 +31,7 @@ struct gpio_stellaris_runtime {
#define DEV_CFG(dev) \
((const struct gpio_stellaris_config *const) \
(dev)->config->config_info)
(dev)->config_info)
#define DEV_DATA(dev) \
((struct gpio_stellaris_runtime *const) \

16
drivers/gpio/gpio_stm32.c
View file

@ -311,7 +311,7 @@ static int gpio_stm32_enable_int(int port, int pin)
static int gpio_stm32_port_get_raw(struct device *dev, u32_t *value)
{
const struct gpio_stm32_config *cfg = dev->config->config_info;
const struct gpio_stm32_config *cfg = dev->config_info;
GPIO_TypeDef *gpio = (GPIO_TypeDef *)cfg->base;
*value = LL_GPIO_ReadInputPort(gpio);
@ -323,7 +323,7 @@ static int gpio_stm32_port_set_masked_raw(struct device *dev,
gpio_port_pins_t mask,
gpio_port_value_t value)
{
const struct gpio_stm32_config *cfg = dev->config->config_info;
const struct gpio_stm32_config *cfg = dev->config_info;
GPIO_TypeDef *gpio = (GPIO_TypeDef *)cfg->base;
u32_t port_value;
@ -336,7 +336,7 @@ static int gpio_stm32_port_set_masked_raw(struct device *dev,
static int gpio_stm32_port_set_bits_raw(struct device *dev,
gpio_port_pins_t pins)
{
const struct gpio_stm32_config *cfg = dev->config->config_info;
const struct gpio_stm32_config *cfg = dev->config_info;
GPIO_TypeDef *gpio = (GPIO_TypeDef *)cfg->base;
/*
@ -351,7 +351,7 @@ static int gpio_stm32_port_set_bits_raw(struct device *dev,
static int gpio_stm32_port_clear_bits_raw(struct device *dev,
gpio_port_pins_t pins)
{
const struct gpio_stm32_config *cfg = dev->config->config_info;
const struct gpio_stm32_config *cfg = dev->config_info;
GPIO_TypeDef *gpio = (GPIO_TypeDef *)cfg->base;
#ifdef CONFIG_SOC_SERIES_STM32F1X
@ -371,7 +371,7 @@ static int gpio_stm32_port_clear_bits_raw(struct device *dev,
static int gpio_stm32_port_toggle_bits(struct device *dev,
gpio_port_pins_t pins)
{
const struct gpio_stm32_config *cfg = dev->config->config_info;
const struct gpio_stm32_config *cfg = dev->config_info;
GPIO_TypeDef *gpio = (GPIO_TypeDef *)cfg->base;
/*
@ -389,7 +389,7 @@ static int gpio_stm32_port_toggle_bits(struct device *dev,
static int gpio_stm32_config(struct device *dev,
gpio_pin_t pin, gpio_flags_t flags)
{
const struct gpio_stm32_config *cfg = dev->config->config_info;
const struct gpio_stm32_config *cfg = dev->config_info;
int err = 0;
int pincfg;
@ -428,7 +428,7 @@ static int gpio_stm32_pin_interrupt_configure(struct device *dev,
gpio_pin_t pin, enum gpio_int_mode mode,
enum gpio_int_trig trig)
{
const struct gpio_stm32_config *cfg = dev->config->config_info;
const struct gpio_stm32_config *cfg = dev->config_info;
struct gpio_stm32_data *data = dev->driver_data;
int edge = 0;
int err = 0;
@ -543,7 +543,7 @@ static const struct gpio_driver_api gpio_stm32_driver = {
*/
static int gpio_stm32_init(struct device *device)
{
const struct gpio_stm32_config *cfg = device->config->config_info;
const struct gpio_stm32_config *cfg = device->config_info;
/* enable clock for subsystem */
struct device *clk =

20
drivers/gpio/gpio_sx1509b.c
View file

@ -179,7 +179,7 @@ static inline int i2c_reg_write_byte_be(struct device *dev, u16_t dev_addr,
static int sx1509b_handle_interrupt(void *arg)
{
struct device *dev = (struct device *) arg;
const struct sx1509b_config *cfg = dev->config->config_info;
const struct sx1509b_config *cfg = dev->config_info;
struct sx1509b_drv_data *drv_data = dev->driver_data;
int ret = 0;
u16_t int_source;
@ -235,7 +235,7 @@ static int sx1509b_config(struct device *dev,
gpio_pin_t pin,
gpio_flags_t flags)
{
const struct sx1509b_config *cfg = dev->config->config_info;
const struct sx1509b_config *cfg = dev->config_info;
struct sx1509b_drv_data *drv_data = dev->driver_data;
struct sx1509b_pin_state *pins = &drv_data->pin_state;
struct {
@ -373,7 +373,7 @@ out:
static int port_get(struct device *dev,
gpio_port_value_t *value)
{
const struct sx1509b_config *cfg = dev->config->config_info;
const struct sx1509b_config *cfg = dev->config_info;
struct sx1509b_drv_data *drv_data = dev->driver_data;
u16_t pin_data;
int rc = 0;
@ -412,7 +412,7 @@ static int port_write(struct device *dev,
return -EWOULDBLOCK;
}
const struct sx1509b_config *cfg = dev->config->config_info;
const struct sx1509b_config *cfg = dev->config_info;
struct sx1509b_drv_data *drv_data = dev->driver_data;
u16_t *outp = &drv_data->pin_state.data;
@ -476,7 +476,7 @@ static int pin_interrupt_configure(struct device *dev,
return -ENOTSUP;
}
const struct sx1509b_config *cfg = dev->config->config_info;
const struct sx1509b_config *cfg = dev->config_info;
struct sx1509b_drv_data *drv_data = dev->driver_data;
struct sx1509b_irq_state *irq = &drv_data->irq_state;
struct {
@ -537,13 +537,13 @@ static int pin_interrupt_configure(struct device *dev,
*/
static int sx1509b_init(struct device *dev)
{
const struct sx1509b_config *cfg = dev->config->config_info;
const struct sx1509b_config *cfg = dev->config_info;
struct sx1509b_drv_data *drv_data = dev->driver_data;
int rc;
drv_data->i2c_master = device_get_binding(cfg->i2c_master_dev_name);
if (!drv_data->i2c_master) {
LOG_ERR("%s: no bus %s", dev->config->name,
LOG_ERR("%s: no bus %s", dev->name,
cfg->i2c_master_dev_name);
rc = -EINVAL;
goto out;
@ -577,7 +577,7 @@ static int sx1509b_init(struct device *dev)
rc = i2c_reg_write_byte(drv_data->i2c_master, cfg->i2c_slave_addr,
SX1509B_REG_RESET, SX1509B_REG_RESET_MAGIC0);
if (rc != 0) {
LOG_ERR("%s: reset m0 failed: %d\n", dev->config->name, rc);
LOG_ERR("%s: reset m0 failed: %d\n", dev->name, rc);
goto out;
}
rc = i2c_reg_write_byte(drv_data->i2c_master, cfg->i2c_slave_addr,
@ -621,9 +621,9 @@ static int sx1509b_init(struct device *dev)
out:
if (rc != 0) {
LOG_ERR("%s init failed: %d", dev->config->name, rc);
LOG_ERR("%s init failed: %d", dev->name, rc);
} else {
LOG_INF("%s init ok", dev->config->name);
LOG_INF("%s init ok", dev->name);
}
k_sem_give(&drv_data->lock);
return rc;

2
drivers/i2c/i2c_cc13xx_cc26xx.c
View file

@ -52,7 +52,7 @@ static inline struct i2c_cc13xx_cc26xx_data *get_dev_data(struct device *dev)
static inline const struct i2c_cc13xx_cc26xx_config *
get_dev_config(struct device *dev)
{
return dev->config->config_info;
return dev->config_info;
}
static int i2c_cc13xx_cc26xx_transmit(struct device *dev, const u8_t *buf,

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