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soc: ti_k3: Add TI J721E SoC R5

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Add initial SoC support for the TI J721E SoC series Cortex-R5 core.

TRM for J721e https://www.ti.com/lit/zip/spruil1
File: spruil1c.pdf

Signed-off-by: Prashanth S <slpp95prashanth@yahoo.com>
Signed-off-by: Andrew Davis <afd@ti.com>
This commit is contained in:
Prashanth S 2023-05-31 11:53:22 +05:30 • committed by Alberto Escolar
commit 963db42af7
10 changed files with 212 additions and 0 deletions
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85
dts/arm/ti/j721e_main_r5.dtsi Normal file
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@ -0,0 +1,85 @@
/* Copyright (C) 2023 BeagleBoard.org Foundation
* Copyright (C) 2023 S Prashanth
* Copyright (c) 2024 Texas Instruments Incorporated
* Andrew Davis <afd@ti.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <mem.h>
#include <freq.h>
#include <arm/armv7-r.dtsi>
#include <zephyr/dt-bindings/interrupt-controller/ti-vim.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-r5";
reg = <0>;
};
};
atcm: memory@0 {
device_type = "memory";
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x00000000 DT_SIZE_K(32)>;
zephyr,memory-region = "ATCM";
};
btcm: memory@41010000 {
device_type = "memory";
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x41010000 DT_SIZE_K(32)>;
zephyr,memory-region = "BTCM";
};
vim: interrupt-controller@ff80000 {
#address-cells = <1>;
compatible = "ti,vim";
reg = <0x0ff80000 0x2800>;
interrupt-controller;
#interrupt-cells = <4>; /* {IRQ/FIQ, IRQ_NUM, IRQ_TYPE, IRQ_PRIO} */
status = "okay";
};
pinctrl: pinctrl@11c000 {
compatible = "ti,k3-pinctrl";
reg = <0x0011c000 0x2b4>;
status = "okay";
};
uart1: uart@2810000 {
compatible = "ns16550";
reg = <0x02810000 0x100>;
clock-frequency = <48000000>;
interrupts = <0 159 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
interrupt-parent = <&vim>;
reg-shift = <2>;
status = "disabled";
};
uart2: uart@2820000 {
compatible = "ns16550";
reg = <0x02820000 0x100>;
clock-frequency = <48000000>;
interrupts = <0 160 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
interrupt-parent = <&vim>;
reg-shift = <2>;
status = "disabled";
};
systick_timer: timer@24c0000 {
compatible = "ti,am654-timer";
reg = <0x24c0000 0x70>;
interrupts = <0 168 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
interrupt-parent = <&vim>;
status = "disabled";
};
};

5
include/zephyr/dt-bindings/pinctrl/ti-k3-pinctrl.h
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@ -39,6 +39,11 @@
#define MUX_MODE_7 7
#define MUX_MODE_8 8
#define MUX_MODE_9 9
#define MUX_MODE_10 10
#define MUX_MODE_11 11
#define MUX_MODE_12 12
#define MUX_MODE_13 13
#define MUX_MODE_14 14
#define K3_PINMUX(offset, value, mux_mode) (((offset) & 0x1fff)) ((value) | (mux_mode))

11
soc/ti/k3/am6x/CMakeLists.txt
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@ -18,4 +18,15 @@ elseif(CONFIG_SOC_SERIES_AM6X_M4)
endif()
set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/m4/linker.ld CACHE INTERNAL "")
elseif(CONFIG_SOC_SERIES_AM6X_R5)
zephyr_sources(r5/soc.c)
zephyr_include_directories(r5)
if(CONFIG_OPENAMP_RSC_TABLE)
zephyr_linker_section(NAME .resource_table GROUP ROM_REGION NOINPUT)
zephyr_linker_section_configure(SECTION .resource_table KEEP INPUT ".resource_table*")
endif()
set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/r5/linker.ld CACHE INTERNAL "")
endif()

11
soc/ti/k3/am6x/Kconfig
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@ -19,7 +19,18 @@ config SOC_SERIES_AM6X_M4
select MM_TI_RAT
select SOC_EARLY_INIT_HOOK
config SOC_SERIES_AM6X_R5
select ARM
select CPU_CORTEX_R5
select CPU_HAS_ARM_MPU
select ARM_CUSTOM_INTERRUPT_CONTROLLER
select VIM
select TI_DM_TIMER
select OPENAMP_RSC_TABLE
select UART_NS16550_ACCESS_WORD_ONLY if UART_NS16550
config SOC_PART_NUMBER
default "AM6234" if SOC_AM6234_A53
default "AM6234" if SOC_AM6234_M4
default "AM6442" if SOC_AM6442_M4
default "J721e" if SOC_J721E_MAIN_R5F0_0

8
soc/ti/k3/am6x/Kconfig.defconfig
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@ -3,6 +3,9 @@
if SOC_SERIES_AM6X
config KERNEL_ENTRY
default "_vector_table"
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_FLASH := zephyr,flash
@ -16,11 +19,13 @@ config NUM_IRQS
int
default 64 if SOC_SERIES_AM6X_M4
default 280 if SOC_SERIES_AM6X_A53
default 512 if SOC_SERIES_AM6X_R5
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 400000000 if SOC_SERIES_AM6X_M4
default 200000000 if SOC_SERIES_AM6X_A53
default 19200000 if SOC_SERIES_AM6X_R5
config PINCTRL
default y
@ -32,6 +37,7 @@ config UART_NS16550
config UART_NS16550_TI_K3
default y if SOC_SERIES_AM6X_M4
default y if SOC_SERIES_AM6X_R5
choice UART_NS16550_VARIANT
default UART_NS16550_VARIANT_NS16750
@ -41,8 +47,10 @@ endif # SERIAL
config BUILD_OUTPUT_BIN
default n if SOC_SERIES_AM6X_M4
default n if SOC_SERIES_AM6X_R5
config BUILD_NO_GAP_FILL
default y if SOC_SERIES_AM6X_M4
default y if SOC_SERIES_AM6X_R5
endif # SOC_SERIES_AM6X

11
soc/ti/k3/am6x/Kconfig.soc
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@ -17,6 +17,12 @@ config SOC_SERIES_AM6X_M4
help
Enable support for AM62X M4 Series.
config SOC_SERIES_AM6X_R5
bool
select SOC_SERIES_AM6X
help
Enable support for AM6X R5 Series.
config SOC_AM6234_A53
bool
select SOC_SERIES_AM6X_A53
@ -29,9 +35,14 @@ config SOC_AM6442_M4
bool
select SOC_SERIES_AM6X_M4
config SOC_J721E_MAIN_R5F0_0
bool
select SOC_SERIES_AM6X_R5
config SOC_SERIES
default "am6x" if SOC_SERIES_AM6X
config SOC
default "am6234" if SOC_AM6234_M4 || SOC_AM6234_A53
default "am6442" if SOC_AM6442_M4
default "j721e" if SOC_J721E_MAIN_R5F0_0

17
soc/ti/k3/am6x/r5/linker.ld Normal file
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@ -0,0 +1,17 @@
/* Copyright (C) 2023 BeagleBoard.org Foundation
* Copyright (C) 2023 S Prashanth
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/arch/arm/cortex_a_r/scripts/linker.ld>
SECTIONS
{
#ifdef CONFIG_OPENAMP_RSC_TABLE
SECTION_PROLOGUE(.resource_table,, SUBALIGN(4))
{
KEEP(*(.resource_table*))
} GROUP_LINK_IN(RSC_TABLE)
#endif
}

49
soc/ti/k3/am6x/r5/soc.c Normal file
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@ -0,0 +1,49 @@
/* Copyright (C) 2023 BeagleBoard.org Foundation
* Copyright (C) 2023 S Prashanth
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include <zephyr/fatal.h>
#include "soc.h"
unsigned int z_soc_irq_get_active(void)
{
return z_vim_irq_get_active();
}
void z_soc_irq_eoi(unsigned int irq)
{
z_vim_irq_eoi(irq);
}
void z_soc_irq_init(void)
{
z_vim_irq_init();
}
void z_soc_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
{
/* Configure interrupt type and priority */
z_vim_irq_priority_set(irq, prio, flags);
}
void z_soc_irq_enable(unsigned int irq)
{
/* Enable interrupt */
z_vim_irq_enable(irq);
}
void z_soc_irq_disable(unsigned int irq)
{
/* Disable interrupt */
z_vim_irq_disable(irq);
}
int z_soc_irq_is_enabled(unsigned int irq)
{
/* Check if interrupt is enabled */
return z_vim_irq_is_enabled(irq);
}

12
soc/ti/k3/am6x/r5/soc.h Normal file
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@ -0,0 +1,12 @@
/* Copyright (C) 2023 BeagleBoard.org Foundation
* Copyright (C) 2023 S Prashanth
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _TI_K3_J721E_R5_SOC_H_
#define _TI_K3_J721E_R5_SOC_H_
#include <zephyr/drivers/interrupt_controller/intc_vim.h>
#endif /* _TI_K3_J721E_R5_SOC_H_ */

3
soc/ti/k3/soc.yml
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@ -10,3 +10,6 @@ family:
- name: am6442
cpuclusters:
- name: m4
- name: j721e
cpuclusters:
- name: main_r5f0_0