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include: Use macro BIT for shift operations

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Use a macro BIT when dealing with bit shift operations.

MISRA-C rule 10.1

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This commit is contained in:
Flavio Ceolin 2019-03-08 12:35:46 -08:00 • committed by Anas Nashif
commit 95eb2b4fed
12 changed files with 38 additions and 38 deletions
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2
include/arch/arm/cortex_m/irq.h
View file

@ -54,7 +54,7 @@ extern void z_irq_priority_set(unsigned int irq, unsigned int prio,
* priority level (discarding what was supplied in the interrupt's priority
* argument), and will run even if irq_lock() is active. Be careful!
*/
#define IRQ_ZERO_LATENCY (1 << 0)
#define IRQ_ZERO_LATENCY BIT(0)
#endif

6
include/arch/arm/cortex_m/sys_io.h
View file

@ -54,21 +54,21 @@ static inline void sys_set_bit(mem_addr_t addr, unsigned int bit)
{
u32_t temp = *(volatile u32_t *)addr;
*(volatile u32_t *)addr = temp | (1 << bit);
*(volatile u32_t *)addr = temp | BIT(bit);
}
static inline void sys_clear_bit(mem_addr_t addr, unsigned int bit)
{
u32_t temp = *(volatile u32_t *)addr;
*(volatile u32_t *)addr = temp & ~(1 << bit);
*(volatile u32_t *)addr = temp & ~BIT(bit);
}
static inline int sys_test_bit(mem_addr_t addr, unsigned int bit)
{
u32_t temp = *(volatile u32_t *)addr;
return temp & (1 << bit);
return temp & BIT(bit);
}
static ALWAYS_INLINE

4
include/drivers/console/ipm_console.h
View file

@ -17,8 +17,8 @@
extern "C" {
#endif
#define IPM_CONSOLE_STDOUT (1 << 0)
#define IPM_CONSOLE_PRINTK (1 << 1)
#define IPM_CONSOLE_STDOUT (BIT(0))
#define IPM_CONSOLE_PRINTK (BIT(1))
/*
* Good way to determine these numbers other than trial-and-error?

6
include/drivers/pci/pci_mgr.h
View file

@ -1515,9 +1515,9 @@ extern int pci_config_ext_cap_ptr_find(
#define PCI_MSIX_FLAGS 2
#define PCI_MSIX_FLAGS_QSIZE 0x7FF
#define PCI_MSIX_FLAGS_ENABLE (1 << 15)
#define PCI_MSIX_FLAGS_MASKALL (1 << 14)
#define PCI_MSIX_FLAGS_BIRMASK (7 << 0)
#define PCI_MSIX_FLAGS_ENABLE BIT(15)
#define PCI_MSIX_FLAGS_MASKALL BIT(14)
#define PCI_MSIX_FLAGS_BIRMASK BIT(0)
#define PCI_MSIX_TABLE_OFFSET 0x4
/* Macros to support Intel VT-d code */

16
include/i2c.h
View file

@ -53,17 +53,17 @@ extern "C" {
>> I2C_SPEED_SHIFT)
/** Use 10-bit addressing. DEPRECATED - Use I2C_MSG_ADDR_10_BITS instead. */
#define I2C_ADDR_10_BITS (1 << 0)
#define I2C_ADDR_10_BITS BIT(0)
/** Controller to act as Master. */
#define I2C_MODE_MASTER (1 << 4)
#define I2C_MODE_MASTER BIT(4)
/*
* The following #defines are used to configure the I2C slave device
*/
/** Slave device responds to 10-bit addressing. */
#define I2C_SLAVE_FLAGS_ADDR_10_BITS (1 << 0)
#define I2C_SLAVE_FLAGS_ADDR_10_BITS BIT(0)
/*
* I2C_MSG_* are I2C Message flags.
@ -73,14 +73,14 @@ extern "C" {
#define I2C_MSG_WRITE (0 << 0)
/** Read message from I2C bus. */
#define I2C_MSG_READ (1 << 0)
#define I2C_MSG_READ BIT(0)
/** @cond INTERNAL_HIDDEN */
#define I2C_MSG_RW_MASK (1 << 0)
#define I2C_MSG_RW_MASK BIT(0)
/** @endcond */
/** Send STOP after this message. */
#define I2C_MSG_STOP (1 << 1)
#define I2C_MSG_STOP BIT(1)
/** RESTART I2C transaction for this message.
*
@ -89,12 +89,12 @@ extern "C" {
* that follows a write, or vice-versa. Some drivers will merge
* adjacent fragments into a single transaction using this flag; some
* will not. */
#define I2C_MSG_RESTART (1 << 2)
#define I2C_MSG_RESTART BIT(2)
/** Use 10-bit addressing for this message.
*
* @note Not all SoC I2C implementations support this feature. */
#define I2C_MSG_ADDR_10_BITS (1 << 3)
#define I2C_MSG_ADDR_10_BITS BIT(3)
/**
* @brief One I2C Message.

16
include/i2s.h
View file

@ -145,7 +145,7 @@ typedef u8_t i2s_fmt_t;
/** Send MSB first */
#define I2S_FMT_DATA_ORDER_MSB (0 << 3)
/** Send LSB first */
#define I2S_FMT_DATA_ORDER_LSB (1 << 3)
#define I2S_FMT_DATA_ORDER_LSB BIT(3)
/** Invert bit ordering, send LSB first */
#define I2S_FMT_DATA_ORDER_INV I2S_FMT_DATA_ORDER_LSB
@ -155,9 +155,9 @@ typedef u8_t i2s_fmt_t;
#define I2S_FMT_CLK_FORMAT_MASK (0x3 << I2S_FMT_CLK_FORMAT_SHIFT)
/** Invert bit clock */
#define I2S_FMT_BIT_CLK_INV (1 << 4)
#define I2S_FMT_BIT_CLK_INV BIT(4)
/** Invert frame clock */
#define I2S_FMT_FRAME_CLK_INV (1 << 5)
#define I2S_FMT_FRAME_CLK_INV BIT(5)
/** NF represents "Normal Frame" whereas IF represents "Inverted Frame"
* NB represents "Normal Bit Clk" whereas IB represents "Inverted Bit clk"
@ -172,22 +172,22 @@ typedef u8_t i2s_opt_t;
/** Run bit clock continuously */
#define I2S_OPT_BIT_CLK_CONT (0 << 0)
/** Run bit clock when sending data only */
#define I2S_OPT_BIT_CLK_GATED (1 << 0)
#define I2S_OPT_BIT_CLK_GATED BIT(0)
/** I2S driver is bit clock master */
#define I2S_OPT_BIT_CLK_MASTER (0 << 1)
/** I2S driver is bit clock slave */
#define I2S_OPT_BIT_CLK_SLAVE (1 << 1)
#define I2S_OPT_BIT_CLK_SLAVE BIT(1)
/** I2S driver is frame clock master */
#define I2S_OPT_FRAME_CLK_MASTER (0 << 2)
/** I2S driver is frame clock slave */
#define I2S_OPT_FRAME_CLK_SLAVE (1 << 2)
#define I2S_OPT_FRAME_CLK_SLAVE BIT(2)
/** @brief Loop back mode.
*
* In loop back mode RX input will be connected internally to TX output.
* This is used primarily for testing.
*/
#define I2S_OPT_LOOPBACK (1 << 7)
#define I2S_OPT_LOOPBACK BIT(7)
/** @brief Ping pong mode
*
@ -197,7 +197,7 @@ typedef u8_t i2s_opt_t;
* So, in this mode, 2 sets of buffers fixed in size are used. Static Arrays
* are used to achieve this and hence they are never freed.
*/
#define I2S_OPT_PINGPONG (1 << 6)
#define I2S_OPT_PINGPONG BIT(6)
/**
* @brief I2C Direction

4
include/logging/log_core.h
View file

@ -219,7 +219,7 @@ extern "C" {
.source_id = _id \
}; \
\
if ((1 << _level) & LOG_FUNCTION_PREFIX_MASK) { \
if (BIT(_level) & LOG_FUNCTION_PREFIX_MASK) { \
__LOG_INTERNAL(src_level, \
Z_LOG_STR(__VA_ARGS__)); \
} else { \
@ -300,7 +300,7 @@ extern "C" {
#define LOG_FILTERS_NUM_OF_SLOTS (32 / LOG_FILTER_SLOT_SIZE)
/** @brief Slot mask. */
#define LOG_FILTER_SLOT_MASK ((1 << LOG_FILTER_SLOT_SIZE) - 1)
#define LOG_FILTER_SLOT_MASK (BIT(LOG_FILTER_SLOT_SIZE) - 1)
/** @brief Bit offset of a slot.
*

2
include/logging/log_msg.h
View file

@ -68,7 +68,7 @@ extern "C" {
#define LOG_MSG_HEXDUMP_LENGTH_BITS 14
/** @brief Maximum length of log hexdump message. */
#define LOG_MSG_HEXDUMP_MAX_LENGTH ((1 << LOG_MSG_HEXDUMP_LENGTH_BITS) - 1)
#define LOG_MSG_HEXDUMP_MAX_LENGTH (BIT(LOG_MSG_HEXDUMP_LENGTH_BITS) - 1)
/** @brief Part of log message header identifying source and level. */
struct log_msg_ids {

4
include/posix/pthread.h
View file

@ -54,8 +54,8 @@ struct posix_thread {
/* Pthread cancellation */
#define _PTHREAD_CANCEL_POS 0
#define PTHREAD_CANCEL_ENABLE (0 << _PTHREAD_CANCEL_POS)
#define PTHREAD_CANCEL_DISABLE (1 << _PTHREAD_CANCEL_POS)
#define PTHREAD_CANCEL_ENABLE (0U << _PTHREAD_CANCEL_POS)
#define PTHREAD_CANCEL_DISABLE BIT(_PTHREAD_CANCEL_POS)
/* Passed to pthread_once */
#define PTHREAD_ONCE_INIT 1

6
include/ring_buffer.h
View file

@ -71,10 +71,10 @@ struct ring_buf {
* @param pow Ring buffer size exponent.
*/
#define RING_BUF_ITEM_DECLARE_POW2(name, pow) \
static u32_t _ring_buffer_data_##name[1 << (pow)]; \
static u32_t _ring_buffer_data_##name[BIT(pow)]; \
struct ring_buf name = { \
.size = (1 << (pow)), \
.mask = (1 << (pow)) - 1, \
.size = (BIT(pow)), \
.mask = (BIT(pow)) - 1, \
.buf = { .buf32 = _ring_buffer_data_##name } \
}

2
include/sw_isr_table.h
View file

@ -56,7 +56,7 @@ struct _isr_list {
};
/** This interrupt gets put directly in the vector table */
#define ISR_FLAG_DIRECT (1 << 0)
#define ISR_FLAG_DIRECT BIT(0)
#define _MK_ISR_NAME(x, y) __isr_ ## x ## _irq_ ## y

8
include/uart.h
View file

@ -31,10 +31,10 @@ extern "C" {
/** @brief Line control signals. */
enum uart_line_ctrl {
UART_LINE_CTRL_RTS = (1 << 1),
UART_LINE_CTRL_DTR = (1 << 2),
UART_LINE_CTRL_DCD = (1 << 3),
UART_LINE_CTRL_DSR = (1 << 4),
UART_LINE_CTRL_RTS = BIT(1),
UART_LINE_CTRL_DTR = BIT(2),
UART_LINE_CTRL_DCD = BIT(3),
UART_LINE_CTRL_DSR = BIT(4),
};
/**