From 95b638fcd2c1eee7b6f546e706fef52a29499ef8 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Fri, 19 Jul 2024 16:34:51 +0900
Subject: [PATCH] dts: arm: nxp_imx95_m7: add NETC node and IRQSTEER node

Added NETC device tree node, and IRQSTEER node.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
 dts/arm/nxp/nxp_imx95_m7.dtsi | 58 +++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/dts/arm/nxp/nxp_imx95_m7.dtsi b/dts/arm/nxp/nxp_imx95_m7.dtsi
index 14c8d5574fa..9437c579d85 100644
--- a/dts/arm/nxp/nxp_imx95_m7.dtsi
+++ b/dts/arm/nxp/nxp_imx95_m7.dtsi
@@ -473,6 +473,64 @@
 			#mbox-cells = <1>;
 			status = "disabled";
 		};
+
+		irqsteer: interrupt-controller@44680000 {
+			compatible = "nxp,irqsteer-intc";
+			reg = <0x44680000 DT_SIZE_K(64)>;
+
+			#size-cells = <0>;
+			#address-cells = <1>;
+
+			irqsteer_master0: interrupt-controller@0 {
+				compatible = "nxp,irqsteer-master";
+				reg = <0>;
+				interrupt-controller;
+				#interrupt-cells = <1>;
+				interrupts-extended = <&nvic 224 0>;
+			};
+		};
+
+		netc: ethernet@4ca00000 {
+			reg = <0x4ca00000 0x1000000>;
+			interrupt-parent = <&irqsteer_master0>;
+			interrupts = <13 0 0>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			emdio: mdio@4cce0000 {
+				compatible = "nxp,imx-netc-emdio";
+				reg = <0x4cce0000 0x1c44>;
+				clocks = <&scmi_clk IMX95_CLK_ENET>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			enetc_psi0: ethernet@4cc00000 {
+				compatible = "nxp,imx-netc-psi";
+				reg = <0x4cc00000 0x10000>;
+				mac-index = <0>;
+				si-index = <0>;
+				status = "disabled";
+			};
+
+			enetc_psi1: ethernet@4cc40000 {
+				compatible = "nxp,imx-netc-psi";
+				reg = <0x4cc40000 0x10000>;
+				mac-index = <1>;
+				si-index = <1>;
+				status = "disabled";
+			};
+
+			enetc_psi2: ethernet@4cc80000 {
+				compatible = "nxp,imx-netc-psi";
+				reg = <0x4cc80000 0x10000>;
+				mac-index = <2>;
+				si-index = <2>;
+				status = "disabled";
+			};
+		};
 	};
 };