boards: sam_e70_xplained: Enable userspace

Enabled userspace support for Atmel SAMe70.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>

arch/arm/core/cortex_m/mpu/Kconfig

@@ -24,7 +24,7 @@ config MPU_STACK_GUARD
 config ARM_MPU
 	bool "ARM MPU Support"
 	depends on CPU_HAS_MPU
-	depends on SOC_FAMILY_ARM || SOC_FAMILY_STM32 || SOC_FAMILY_NRF || SOC_FAMILY_IMX
+	depends on SOC_FAMILY_ARM || SOC_FAMILY_STM32 || SOC_FAMILY_NRF || SOC_FAMILY_IMX || SOC_FAMILY_SAM
 	select ARM_CORE_MPU
 	select ARCH_HAS_EXECUTABLE_PAGE_BIT
 	select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT

arch/arm/soc/atmel_sam/common/CMakeLists.txt

@@ -3,3 +3,8 @@ zephyr_sources(
   soc_pmc.c
   soc_gpio.c
   )
+
+zephyr_sources_ifdef(
+  CONFIG_ARM_MPU
+  arm_mpu_regions.c
+  )

arch/arm/soc/atmel_sam/common/arm_mpu_mem_cfg.h

@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2017 Linaro Limited.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _ARM_MPU_MEM_CFG_H_
+#define _ARM_MPU_MEM_CFG_H_
+
+#include <soc.h>
+#include <arch/arm/cortex_m/mpu/arm_mpu.h>
+
+/* Flash Region Definitions */
+#if CONFIG_FLASH_SIZE == 64
+#define REGION_FLASH_SIZE REGION_64K
+#elif CONFIG_FLASH_SIZE == 128
+#define REGION_FLASH_SIZE REGION_128K
+#elif CONFIG_FLASH_SIZE == 256
+#define REGION_FLASH_SIZE REGION_256K
+#elif CONFIG_FLASH_SIZE == 512
+#define REGION_FLASH_SIZE REGION_512K
+#elif CONFIG_FLASH_SIZE == 1024
+#define REGION_FLASH_SIZE REGION_1M
+#elif CONFIG_FLASH_SIZE == 1536
+#define REGION_FLASH_SIZE REGION_2M	/* last 512kB are not mapped */
+#elif CONFIG_FLASH_SIZE == 2048
+#define REGION_FLASH_SIZE REGION_2M
+#else
+#error "Unsupported configuration"
+#endif
+
+/* SRAM Region Definitions */
+#if CONFIG_SRAM_SIZE == 12
+#define REGION_SRAM_0_SIZE REGION_8K
+#define REGION_SRAM_1_START 0x2000
+#define REGION_SRAM_1_SIZE REGION_4K
+#elif CONFIG_SRAM_SIZE == 20
+#define REGION_SRAM_0_SIZE REGION_16K
+#define REGION_SRAM_1_START 0x4000
+#define REGION_SRAM_1_SIZE REGION_4K
+#elif CONFIG_SRAM_SIZE == 32
+#define REGION_SRAM_0_SIZE REGION_16K
+#define REGION_SRAM_1_START 0x4000
+#define REGION_SRAM_1_SIZE REGION_16K
+#elif CONFIG_SRAM_SIZE == 40
+#define REGION_SRAM_0_SIZE REGION_32K
+#define REGION_SRAM_1_START 0x8000
+#define REGION_SRAM_1_SIZE REGION_8K
+#elif CONFIG_SRAM_SIZE == 64
+#define REGION_SRAM_0_SIZE REGION_32K
+#define REGION_SRAM_1_START 0x8000
+#define REGION_SRAM_1_SIZE REGION_32K
+#elif CONFIG_SRAM_SIZE == 96
+#define REGION_SRAM_0_SIZE REGION_64K
+#define REGION_SRAM_1_START 0x10000
+#define REGION_SRAM_1_SIZE REGION_32K
+#elif CONFIG_SRAM_SIZE == 128
+#define REGION_SRAM_0_SIZE REGION_64K
+#define REGION_SRAM_1_START 0x10000
+#define REGION_SRAM_1_SIZE REGION_64K
+#elif CONFIG_SRAM_SIZE == 192
+#define REGION_SRAM_0_SIZE REGION_128K
+#define REGION_SRAM_1_START 0x20000
+#define REGION_SRAM_1_SIZE REGION_64K
+#elif CONFIG_SRAM_SIZE == 256
+#define REGION_SRAM_0_SIZE REGION_128K
+#define REGION_SRAM_1_START 0x20000
+#define REGION_SRAM_1_SIZE REGION_128K
+#elif CONFIG_SRAM_SIZE == 320
+#define REGION_SRAM_0_SIZE REGION_256K
+#define REGION_SRAM_1_START 0x40000
+#define REGION_SRAM_1_SIZE REGION_64K
+#elif CONFIG_SRAM_SIZE == 384
+#define REGION_SRAM_0_SIZE REGION_256K
+#define REGION_SRAM_1_START 0x40000
+#define REGION_SRAM_1_SIZE REGION_128K
+#else
+#error "Unsupported configuration"
+#endif
+
+#define PERIPHERAL_BASE           0x40000000U /* Peripheral base address */
+
+#endif /* _ARM_MPU_MEM_CFG_H_ */

arch/arm/soc/atmel_sam/common/arm_mpu_regions.c

@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2017 Intel Corporation.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <soc.h>
+#include <arch/arm/cortex_m/mpu/arm_mpu.h>
+
+#include "arm_mpu_mem_cfg.h"
+
+static struct arm_mpu_region mpu_regions[] = {
+	/* Region 0 */
+	MPU_REGION_ENTRY("FLASH_0",
+			 CONFIG_FLASH_BASE_ADDRESS,
+			 REGION_FLASH_ATTR(REGION_FLASH_SIZE))
+
+};
+
+struct arm_mpu_config mpu_config = {
+	.num_regions = ARRAY_SIZE(mpu_regions),
+	.mpu_regions = mpu_regions,
+};

arch/arm/soc/atmel_sam/same70/Kconfig.series

@@ -13,6 +13,8 @@ config SOC_SERIES_SAME70
 	select ASF
 	select XIP
 	select SYS_POWER_LOW_POWER_STATE_SUPPORTED
+	select CPU_HAS_MPU
+	select ARM_MPU
 	help
 	  Enable support for Atmel SAM E70 ARM Cortex-M7 Microcontrollers.
 	  Part No.: SAME70J19, SAME70J20, SAME70J21, SAME70N19, SAME70N20,