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drivers: gpio_sam: fix gpio_sam_write ACCESS_BY_PORT mode

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The 'value' param in ACCESS_BY_PORT mode means the state of a port,
one bit represented one pin in param 'value'.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
This commit is contained in:
qianfan Zhao 2018-09-29 11:25:22 +08:00 • committed by Anas Nashif
commit 94fa5ca91b
1 changed files with 5 additions and 9 deletions
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14
drivers/gpio/gpio_sam.c
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@ -28,7 +28,7 @@ struct gpio_sam_runtime {
#define DEV_CFG(dev) \
((const struct gpio_sam_config *const)(dev)->config->config_info)
static int gpio_sam_config_pin(Pio *const pio, u32_t mask, int flags)
static int gpio_sam_config_pin(Pio * const pio, u32_t mask, int flags)
{
/* Setup the pin direcion. */
if ((flags & GPIO_DIR_MASK) == GPIO_DIR_OUT) {
@ -111,7 +111,7 @@ static int gpio_sam_config(struct device *dev, int access_op, u32_t pin,
int flags)
{
const struct gpio_sam_config * const cfg = DEV_CFG(dev);
Pio *const pio = cfg->regs;
Pio * const pio = cfg->regs;
int i, result;
switch (access_op) {
@ -151,13 +151,9 @@ static int gpio_sam_write(struct device *dev, int access_op, u32_t pin,
}
break;
case GPIO_ACCESS_BY_PORT:
if (value) {
/* Set all pins. */
pio->PIO_SODR = 0xffffffff;
} else {
/* Clear all pins. */
pio->PIO_CODR = 0xffffffff;
}
pio->PIO_OWER = pio->PIO_OSR; /* Write those out pin only */
pio->PIO_ODSR = value;
pio->PIO_OWDR = 0xffffffff; /* Disable write ODSR */
break;
default:
return -ENOTSUP;