drivers: pwm: nrf_sw: use Nordic HAL to configure GPIO
Use Nordic HAL to configure GPIO output. This adds support for P1 GPIOs, when pin numbers above 31 are used. Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
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1 changed files with 5 additions and 4 deletions
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@ -7,6 +7,7 @@
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#define DT_DRV_COMPAT nordic_nrf_sw_pwm
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#define DT_DRV_COMPAT nordic_nrf_sw_pwm
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#include <soc.h>
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#include <soc.h>
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#include <hal/nrf_gpio.h>
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#include <drivers/pwm.h>
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#include <drivers/pwm.h>
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#include <nrf_peripherals.h>
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#include <nrf_peripherals.h>
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@ -137,20 +138,20 @@ static int pwm_nrf5_sw_pin_set(const struct device *dev, uint32_t pwm,
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NRF_PPI->CHENCLR = BIT(ppi_index) | BIT(ppi_index + 1);
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NRF_PPI->CHENCLR = BIT(ppi_index) | BIT(ppi_index + 1);
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/* configure GPIO pin as output */
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/* configure GPIO pin as output */
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NRF_GPIO->DIRSET = BIT(pwm);
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nrf_gpio_cfg_output(pwm);
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if (pulse_cycles == 0U) {
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if (pulse_cycles == 0U) {
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/* 0% duty cycle, keep pin low */
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/* 0% duty cycle, keep pin low */
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NRF_GPIO->OUTCLR = BIT(pwm);
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nrf_gpio_pin_clear(pwm);
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goto pin_set_pwm_off;
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goto pin_set_pwm_off;
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} else if (pulse_cycles == period_cycles) {
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} else if (pulse_cycles == period_cycles) {
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/* 100% duty cycle, keep pin high */
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/* 100% duty cycle, keep pin high */
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NRF_GPIO->OUTSET = BIT(pwm);
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nrf_gpio_pin_set(pwm);
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goto pin_set_pwm_off;
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goto pin_set_pwm_off;
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} else {
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} else {
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/* x% duty cycle, start PWM with pin low */
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/* x% duty cycle, start PWM with pin low */
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NRF_GPIO->OUTCLR = BIT(pwm);
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nrf_gpio_pin_clear(pwm);
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}
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}
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/* TODO: if the assigned NRF_TIMER supports higher bit resolution,
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/* TODO: if the assigned NRF_TIMER supports higher bit resolution,
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