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soc: esp32: ESP WiFi heap

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Provide symbols for the creation of dynamic memory pool.
Fix static allocation size check.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
This commit is contained in:
Marek Matej 2024-09-02 14:43:19 +02:00 • committed by Henrik Brix Andersen
commit 94731488e7
3 changed files with 41 additions and 45 deletions
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41
soc/espressif/esp32/default.ld
View file

@ -24,7 +24,7 @@ user_iram_end = SRAM1_DRAM_IRAM_CALC(SRAM1_DRAM_USER_START);
user_iram_seg_org = (SRAM0_IRAM_START + SRAM0_CACHE_SIZE);
user_iram_seg_len = user_iram_end - user_iram_seg_org;
user_dram_seg_org = SRAM2_DRAM_USER_START;
user_dram_seg_len = SRAM2_USER_SIZE;
user_dram_seg_len = SRAM2_DRAM_USER_SIZE;
user_dram_2_seg_org = SRAM1_DRAM_USER_START;
user_dram_2_seg_len = SRAM1_USER_SIZE;
@ -116,11 +116,7 @@ _rom_store_table = 0;
PROVIDE(_memmap_vecbase_reset = 0x40000450);
PROVIDE(_memmap_reset_vector = 0x40000400);
#ifdef CONFIG_BT
_heap_sentry = SRAM1_DRAM_USER_START;
#else
_heap_sentry = DRAM1_BT_SHM_BUFFERS_START; /* was 0x3ffe3f20; */
#endif
_heap_sentry = SRAM2_DRAM_END;
SECTIONS
{
@ -357,12 +353,6 @@ SECTIONS
*libzephyr.a:periph_ctrl.*(.literal .text .literal.* .text.*)
*(.literal.sar_periph_ctrl_power_enable .text.sar_periph_ctrl_power_enable)
/* TODO: optimize SRAM usage
*libzephyr.a:periph_ctrl.*(.literal.periph_module_reset .text.periph_module_reset)
*libzephyr.a:periph_ctrl.*(.literal.wifi_module_disable .text.wifi_module_disable)
*libzephyr.a:periph_ctrl.*(.literal.wifi_module_enable .text.wifi_module_enable)
*libzephyr.a:rtc_wdt.*(.literal .literal.* .text .text.*)
*/
*libzephyr.a:esp_system_chip.*(.literal.esp_system_abort .text.esp_system_abort)
*libzephyr.a:spi_hal_iram.*(.literal .literal.* .text .text.*)
*libzephyr.a:spi_slave_hal_iram.*(.literal .literal.* .text .text.*)
@ -453,7 +443,7 @@ SECTIONS
*libzephyr.a:mpu_hal.*(.literal .text .literal.* .text.*)
*libzephyr.a:cpu_region_protect.*(.literal .text .literal.* .text.*)
/* to overcome the bug in esptool making Simple boot compatible image */
/* NOTE: to overcome the bug in esptool making Simple boot compatible image */
. += 16;
. = ALIGN(16);
} GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
@ -488,6 +478,12 @@ SECTIONS
_iram_end = ABSOLUTE(.);
} GROUP_LINK_IN(IRAM_REGION)
/* This symbol is here to check SRAM1 usage in case it is used for data too */
_iram_end_at_dram_addr = SRAM1_IRAM_DRAM_CALC(_iram_end);
_unallocated_iram_memory_size = ORIGIN(iram0_0_seg) + LENGTH(iram0_0_seg) - _iram_end;
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)), "IRAM code does not fit.")
/* --- IRAM END --- */
/* --- DRAM BEGIN --- */
@ -707,9 +703,6 @@ SECTIONS
_bss_end = ABSOLUTE(.);
} GROUP_LINK_IN(RAMABLE_REGION)
ASSERT(((__bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
"DRAM segment data does not fit.")
.dram0.noinit (NOLOAD) :
{
. = ALIGN (8);
@ -718,15 +711,12 @@ SECTIONS
. = ALIGN (8);
} GROUP_LINK_IN(RAMABLE_REGION_1)
.dram0.end (NOLOAD) :
{
. = ALIGN(4);
_end = ABSOLUTE(.);
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
/* Provide total SRAM usage, including IRAM and DRAM */
_image_ram_start = _dram_data_start;
#include <zephyr/linker/ram-end.ld>
_image_ram_size += _iram_end - _iram_start;
/* TODO: Provide total SRAM usage, including IRAM and DRAM */
/* _image_ram_start = _iram_start - IRAM_DRAM_OFFSET; */
/* #include <zephyr/linker/ram-end.ld> */
ASSERT(((_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM data does not fit.")
/* --- DRAM END --- */
@ -934,9 +924,6 @@ SECTIONS
/* --- XTENSA GLUE AND DEBUG END --- */
ASSERT(((_iram_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
"IRAM0 segment data does not fit.")
#ifdef CONFIG_ESP_SPIRAM
ASSERT(((_ext_ram_data_end - _ext_ram_data_start) <= CONFIG_ESP_SPIRAM_SIZE),
"External SPIRAM overflowed.")

12
soc/espressif/esp32/default_appcpu.ld
View file

@ -51,6 +51,8 @@ _rom_store_table = 0;
PROVIDE(_memmap_vecbase_reset = 0x40000450);
PROVIDE(_memmap_reset_vector = 0x40000400);
_heap_sentry = 0x3ffe3f20;
SECTIONS
{
#include <zephyr/linker/rel-sections.ld>
@ -285,9 +287,10 @@ SECTIONS
.dram0.end :
{
. = ALIGN(4);
#include <snippets-rwdata.ld>
. = ALIGN(4);
_end = ABSOLUTE(.);
__data_end = ABSOLUTE(.);
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_DATA_REGION)
@ -322,9 +325,13 @@ SECTIONS
*(COMMON)
. = ALIGN (8);
__bss_end = ABSOLUTE(.);
_end = ABSOLUTE(.);
} GROUP_LINK_IN(RAMABLE_REGION)
/* Provide total SRAM usage, including IRAM and DRAM */
_image_ram_start = __rodata_region_start;
#include <zephyr/linker/ram-end.ld>
_image_ram_size += _iram_end - _iram_start;
ASSERT(((__bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
"DRAM segment data does not fit.")
@ -357,7 +364,6 @@ SECTIONS
_flash_cache_start = ABSOLUTE(0);
} GROUP_DATA_LINK_IN(FLASH_CODE_REGION, ROMABLE_REGION)
_heap_sentry = 0x3ffe3f20;
#include <zephyr/linker/debug-sections.ld>

33
soc/espressif/esp32/memory.h
View file

@ -4,25 +4,27 @@
*/
#pragma once
/* SRAM0 (64k+128k) instruction cache+memory */
/* SRAM0 (192kB) instruction cache+memory */
#define SRAM0_IRAM_START 0x40070000
#define SRAM0_CACHE_SIZE 0x10000
#define SRAM0_SIZE 0x30000
/* SRAM1 (128k) instruction/data memory */
/* SRAM1 (128kB) instruction/data memory */
#define SRAM1_IRAM_START 0x400a0000
#define SRAM1_DRAM_START 0x3ffe0000
#define SRAM1_SIZE 0x20000
#define SRAM1_DRAM_END (SRAM1_DRAM_START + SRAM1_SIZE)
#define SRAM1_DRAM_PROAPP_PRIV_SIZE 0x8000
#define SRAM1_DRAM_USER_START 0x3ffe5400
#define SRAM1_DRAM_USER_START 0x3ffe8000
#define SRAM1_USER_SIZE (0x40000000 - SRAM1_DRAM_USER_START)
/* SRAM2 (200k) data memory */
#define SRAM2_DRAM_START 0x3ffae000
#define SRAM2_SIZE 0x32000
#define SRAM2_DRAM_SHM_PRIV_SIZE 0x2000
#define SRAM2_DRAM_USER_START 0x3ffb0000
#define SRAM2_USER_SIZE (SRAM1_DRAM_START - SRAM2_DRAM_USER_START)
/* SRAM2 (200kB) data memory */
#define SRAM2_DRAM_START 0x3ffae000
#define SRAM2_DRAM_SIZE 0x32000
#define SRAM2_DRAM_SHM_SIZE 0x2000
#define SRAM2_DRAM_END (SRAM2_DRAM_START + SRAM2_DRAM_SIZE)
#define SRAM2_DRAM_USER_START (SRAM2_DRAM_START + SRAM2_DRAM_SHM_SIZE)
#define SRAM2_DRAM_USER_SIZE (SRAM2_DRAM_END - SRAM2_DRAM_USER_START)
/** Simplified memory map for the bootloader.
* Make sure the bootloader can load into main memory without overwriting itself.
@ -41,19 +43,20 @@
#define DRAM1_BT_SHM_BUFFERS_START 0x3ffe4350
#define DRAM1_BT_SHM_BUFFERS_END 0x3ffe5230
/* Conversion beween IRAM and DRAM in SRAM1 memory */
#define SRAM1_IRAM_DRAM_CALC(addr_iram) \
(SRAM1_SIZE - ((addr_iram) - SRAM1_IRAM_START) + SRAM1_DRAM_START)
/* Convert IRAM address to its DRAM counterpart in SRAM1 memory */
#define SRAM1_IRAM_DRAM_CALC(addr_iram) ((addr_iram > SRAM1_IRAM_START) ? \
(SRAM1_SIZE - (addr_iram - SRAM1_IRAM_START) + SRAM1_DRAM_START) : (SRAM1_DRAM_END))
/* Convert DRAM address to its IRAM counterpart in SRAM1 memory */
#define SRAM1_DRAM_IRAM_CALC(addr_dram) \
(SRAM1_SIZE - ((addr_dram) - SRAM1_DRAM_START) + SRAM1_IRAM_START)
(SRAM1_SIZE - (addr_dram - SRAM1_DRAM_START) + SRAM1_IRAM_START)
/* For safety margin between bootloader data section and startup stacks */
/* Set bootloader segments size */
#define BOOTLOADER_DRAM_SEG_LEN 0x7a00
#define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x4000
#define BOOTLOADER_IRAM_SEG_LEN 0xa000
/* Start of the lower region is determined by region size and the end of the higher region */
#define BOOTLOADER_DRAM_SEG_START 0x3fff0000
#define BOOTLOADER_DRAM_SEG_START 0x3ffe8000
#define BOOTLOADER_DRAM_SEG_END (BOOTLOADER_DRAM_SEG_START + BOOTLOADER_DRAM_SEG_LEN)
#define BOOTLOADER_IRAM_LOADER_SEG_START 0x40078000
#define BOOTLOADER_IRAM_SEG_START 0x400a0000