From 941ffb017b11c70c73e5487fe2f38c32988391f7 Mon Sep 17 00:00:00 2001 From: Yannis Damigos Date: Sat, 15 Jul 2017 21:57:32 +0300 Subject: [PATCH] dts: Add cpus and cpu nodes missing properties This patch adds #address-cell, #size-cell properties to cpus container node and device_type, reg properties to cpu node. Signed-off-by: Yannis Damigos --- dts/arm/atmel/sam3x.dtsi | 5 +++++ dts/arm/atmel/sam4s.dtsi | 5 +++++ dts/arm/atmel/same70.dtsi | 5 +++++ dts/arm/nordic/nrf51822.dtsi | 5 +++++ dts/arm/nordic/nrf52832.dtsi | 5 +++++ dts/arm/nordic/nrf52840.dtsi | 5 +++++ dts/arm/nxp/nxp_k6x.dtsi | 5 +++++ dts/arm/nxp/nxp_kl25z.dtsi | 5 +++++ dts/arm/nxp/nxp_kw40z.dtsi | 5 +++++ dts/arm/nxp/nxp_kw41z.dtsi | 5 +++++ dts/arm/st/stm32f103Xb.dtsi | 11 +++++++++++ dts/arm/st/stm32f103Xe.dtsi | 11 +++++++++++ dts/arm/st/stm32f107.dtsi | 11 +++++++++++ dts/arm/st/stm32f303.dtsi | 11 +++++++++++ dts/arm/st/stm32f334.dtsi | 11 +++++++++++ dts/arm/st/stm32f373.dtsi | 11 +++++++++++ dts/arm/st/stm32f4.dtsi | 11 +++++++++++ dts/arm/st/stm32l432.dtsi | 11 +++++++++++ dts/arm/st/stm32l475.dtsi | 11 +++++++++++ dts/arm/ti/cc2650.dtsi | 37 ++++++++++++++++++++---------------- dts/arm/ti/cc32xx.dtsi | 5 +++++ dts/arm/ti/lm3s6965.dtsi | 5 +++++ dts/x86/intel_curie.dtsi | 7 +++++++ 23 files changed, 187 insertions(+), 16 deletions(-) diff --git a/dts/arm/atmel/sam3x.dtsi b/dts/arm/atmel/sam3x.dtsi index c5955ec379e..8a64f42dd1f 100644 --- a/dts/arm/atmel/sam3x.dtsi +++ b/dts/arm/atmel/sam3x.dtsi @@ -8,8 +8,13 @@ / { cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-m4"; + reg = <0>; }; }; diff --git a/dts/arm/atmel/sam4s.dtsi b/dts/arm/atmel/sam4s.dtsi index ec3c5b8da11..ad677d94375 100644 --- a/dts/arm/atmel/sam4s.dtsi +++ b/dts/arm/atmel/sam4s.dtsi @@ -8,8 +8,13 @@ / { cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-m4"; + reg = <0>; }; }; diff --git a/dts/arm/atmel/same70.dtsi b/dts/arm/atmel/same70.dtsi index 3227eb0f0f8..60219b36a52 100644 --- a/dts/arm/atmel/same70.dtsi +++ b/dts/arm/atmel/same70.dtsi @@ -10,8 +10,13 @@ / { cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-m7"; + reg = <0>; }; }; diff --git a/dts/arm/nordic/nrf51822.dtsi b/dts/arm/nordic/nrf51822.dtsi index 61d22f3ee39..b62f6099693 100644 --- a/dts/arm/nordic/nrf51822.dtsi +++ b/dts/arm/nordic/nrf51822.dtsi @@ -3,8 +3,13 @@ / { cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-m0"; + reg = <0>; }; }; diff --git a/dts/arm/nordic/nrf52832.dtsi b/dts/arm/nordic/nrf52832.dtsi index 8534aa8b9e1..957e802ac89 100644 --- a/dts/arm/nordic/nrf52832.dtsi +++ b/dts/arm/nordic/nrf52832.dtsi @@ -3,8 +3,13 @@ / { cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-m4f"; + reg = <0>; }; }; diff --git a/dts/arm/nordic/nrf52840.dtsi b/dts/arm/nordic/nrf52840.dtsi index 78d00fd750e..f56f06b4315 100644 --- a/dts/arm/nordic/nrf52840.dtsi +++ b/dts/arm/nordic/nrf52840.dtsi @@ -3,8 +3,13 @@ / { cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-m4f"; + reg = <0>; }; }; diff --git a/dts/arm/nxp/nxp_k6x.dtsi b/dts/arm/nxp/nxp_k6x.dtsi index b1b7c672cc3..0ce2f1cd1e4 100644 --- a/dts/arm/nxp/nxp_k6x.dtsi +++ b/dts/arm/nxp/nxp_k6x.dtsi @@ -2,8 +2,13 @@ / { cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-m4f"; + reg = <0>; }; }; diff --git a/dts/arm/nxp/nxp_kl25z.dtsi b/dts/arm/nxp/nxp_kl25z.dtsi index d746a123f69..958f0a38adb 100644 --- a/dts/arm/nxp/nxp_kl25z.dtsi +++ b/dts/arm/nxp/nxp_kl25z.dtsi @@ -2,8 +2,13 @@ / { cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-m0+"; + reg = <0>; }; }; diff --git a/dts/arm/nxp/nxp_kw40z.dtsi b/dts/arm/nxp/nxp_kw40z.dtsi index fe744b1ca1c..273fa46f028 100644 --- a/dts/arm/nxp/nxp_kw40z.dtsi +++ b/dts/arm/nxp/nxp_kw40z.dtsi @@ -2,8 +2,13 @@ / { cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-m0+"; + reg = <0>; }; }; diff --git a/dts/arm/nxp/nxp_kw41z.dtsi b/dts/arm/nxp/nxp_kw41z.dtsi index ecb9dc68c80..13902cfa944 100644 --- a/dts/arm/nxp/nxp_kw41z.dtsi +++ b/dts/arm/nxp/nxp_kw41z.dtsi @@ -2,8 +2,13 @@ / { cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-m0+"; + reg = <0>; }; }; diff --git a/dts/arm/st/stm32f103Xb.dtsi b/dts/arm/st/stm32f103Xb.dtsi index 740ca88f22d..5fd50ea11ea 100644 --- a/dts/arm/st/stm32f103Xb.dtsi +++ b/dts/arm/st/stm32f103Xb.dtsi @@ -11,6 +11,17 @@ #include / { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m3"; + reg = <0>; + }; + }; + flash0: flash { reg = <0x08000000 DT_FLASH_SIZE>; }; diff --git a/dts/arm/st/stm32f103Xe.dtsi b/dts/arm/st/stm32f103Xe.dtsi index 57b3066fca9..704df28a0ae 100644 --- a/dts/arm/st/stm32f103Xe.dtsi +++ b/dts/arm/st/stm32f103Xe.dtsi @@ -11,6 +11,17 @@ #include / { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m3"; + reg = <0>; + }; + }; + flash0: flash { reg = <0x08000000 DT_FLASH_SIZE>; }; diff --git a/dts/arm/st/stm32f107.dtsi b/dts/arm/st/stm32f107.dtsi index 86ce849f726..70d9056490b 100644 --- a/dts/arm/st/stm32f107.dtsi +++ b/dts/arm/st/stm32f107.dtsi @@ -8,6 +8,17 @@ #include / { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m3"; + reg = <0>; + }; + }; + flash0: flash { reg = <0x08000000 DT_FLASH_SIZE>; }; diff --git a/dts/arm/st/stm32f303.dtsi b/dts/arm/st/stm32f303.dtsi index 86ce849f726..a6f696627da 100644 --- a/dts/arm/st/stm32f303.dtsi +++ b/dts/arm/st/stm32f303.dtsi @@ -8,6 +8,17 @@ #include / { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m4f"; + reg = <0>; + }; + }; + flash0: flash { reg = <0x08000000 DT_FLASH_SIZE>; }; diff --git a/dts/arm/st/stm32f334.dtsi b/dts/arm/st/stm32f334.dtsi index 2b565da9869..4bb5f4af99c 100644 --- a/dts/arm/st/stm32f334.dtsi +++ b/dts/arm/st/stm32f334.dtsi @@ -8,6 +8,17 @@ #include / { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m4f"; + reg = <0>; + }; + }; + flash0: flash { reg = <0x08000000 DT_FLASH_SIZE>; }; diff --git a/dts/arm/st/stm32f373.dtsi b/dts/arm/st/stm32f373.dtsi index 2b565da9869..4bb5f4af99c 100644 --- a/dts/arm/st/stm32f373.dtsi +++ b/dts/arm/st/stm32f373.dtsi @@ -8,6 +8,17 @@ #include / { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m4f"; + reg = <0>; + }; + }; + flash0: flash { reg = <0x08000000 DT_FLASH_SIZE>; }; diff --git a/dts/arm/st/stm32f4.dtsi b/dts/arm/st/stm32f4.dtsi index 1988a4825c8..2e1232e1831 100644 --- a/dts/arm/st/stm32f4.dtsi +++ b/dts/arm/st/stm32f4.dtsi @@ -8,6 +8,17 @@ #include / { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m4f"; + reg = <0>; + }; + }; + flash0: flash { reg = <0x08000000 DT_FLASH_SIZE>; }; diff --git a/dts/arm/st/stm32l432.dtsi b/dts/arm/st/stm32l432.dtsi index 5fd133d0d98..dd051982d75 100644 --- a/dts/arm/st/stm32l432.dtsi +++ b/dts/arm/st/stm32l432.dtsi @@ -8,6 +8,17 @@ #include / { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m4f"; + reg = <0>; + }; + }; + flash0: flash { reg = <0x08000000 DT_FLASH_SIZE>; }; diff --git a/dts/arm/st/stm32l475.dtsi b/dts/arm/st/stm32l475.dtsi index 49a1cb92b80..7556eba9e26 100644 --- a/dts/arm/st/stm32l475.dtsi +++ b/dts/arm/st/stm32l475.dtsi @@ -8,6 +8,17 @@ #include / { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m4f"; + reg = <0>; + }; + }; + flash0: flash { reg = <0x08000000 DT_FLASH_SIZE>; }; diff --git a/dts/arm/ti/cc2650.dtsi b/dts/arm/ti/cc2650.dtsi index 7255f831ba9..3db05042f5f 100644 --- a/dts/arm/ti/cc2650.dtsi +++ b/dts/arm/ti/cc2650.dtsi @@ -7,23 +7,28 @@ #include "armv7-m.dtsi" / { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m3"; + reg = <0>; + }; + }; + + sram0: memory { + compatible = "sram"; + reg = <0x20000000 0x5000>; + }; + + flash0: serial-flash { + compatible = "serial-flash"; + reg = <0x0 0x20000>; + }; + soc { - cpus { - cpu@0 { - compatible = "arm,cortex-m3"; - }; - }; - - sram0: memory { - compatible = "sram"; - reg = <0x20000000 0x5000>; - }; - - flash0: serial-flash { - compatible = "serial-flash"; - reg = <0x0 0x20000>; - }; - gpioa: gpio@40022000 { compatible = "ti,cc2650-gpio"; reg = <0x40022000 0xE4>; diff --git a/dts/arm/ti/cc32xx.dtsi b/dts/arm/ti/cc32xx.dtsi index ca2d4163e11..111a88e3bb1 100644 --- a/dts/arm/ti/cc32xx.dtsi +++ b/dts/arm/ti/cc32xx.dtsi @@ -9,8 +9,13 @@ / { cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-m4"; + reg = <0>; }; }; diff --git a/dts/arm/ti/lm3s6965.dtsi b/dts/arm/ti/lm3s6965.dtsi index 026ac89a19c..1a92f0575c7 100644 --- a/dts/arm/ti/lm3s6965.dtsi +++ b/dts/arm/ti/lm3s6965.dtsi @@ -2,8 +2,13 @@ / { cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "arm,cortex-m3"; + reg = <0>; }; }; diff --git a/dts/x86/intel_curie.dtsi b/dts/x86/intel_curie.dtsi index 69abc9b4aa2..87bdb39c265 100644 --- a/dts/x86/intel_curie.dtsi +++ b/dts/x86/intel_curie.dtsi @@ -3,12 +3,19 @@ / { cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "intel,quark"; + reg = <0>; }; cpu@1 { + device_type = "cpu"; compatible = "arc"; + reg = <1>; }; };