From 93c59793c2741d845d9415236cc529ea1f5c290c Mon Sep 17 00:00:00 2001
From: Declan Snyder <declan.snyder@nxp.com>
Date: Fri, 3 Nov 2023 10:38:16 -0500
Subject: [PATCH] soc: rt6xx: Add NXP MRT

Add NXP MRT to RT6xx DT definition and add peripheral reset to soc.c

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
---
 dts/arm/nxp/nxp_rt6xx_common.dtsi | 32 +++++++++++++++++++++++++++++++
 soc/arm/nxp_imx/rt6xx/soc.c       |  4 ++++
 2 files changed, 36 insertions(+)

diff --git a/dts/arm/nxp/nxp_rt6xx_common.dtsi b/dts/arm/nxp/nxp_rt6xx_common.dtsi
index e4acafbafa5..0c81f71d140 100644
--- a/dts/arm/nxp/nxp_rt6xx_common.dtsi
+++ b/dts/arm/nxp/nxp_rt6xx_common.dtsi
@@ -458,6 +458,38 @@
 		#address-cells = <3>;
 		#size-cells = <0>;
 	};
+
+	mrt: mrt@2d000 {
+		compatible = "nxp,mrt";
+		reg = <0x2d000 0x100>;
+		interrupts = <9 0>;
+		num-channels = <4>;
+		num-bits = <24>;
+		clocks = <&clkctl1 MCUX_MRT_CLK>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		mrt_channel0: mrt_channel@0 {
+			compatible = "nxp,mrt-channel";
+			reg = <0>;
+			status = "disabled";
+		};
+		mrt_channel1: mrt_channel@1 {
+			compatible = "nxp,mrt-channel";
+			reg = <1>;
+			status = "disabled";
+		};
+		mrt_channel2: mrt_channel@2 {
+			compatible = "nxp,mrt-channel";
+			reg = <2>;
+			status = "disabled";
+		};
+		mrt_channel3: mrt_channel@3 {
+			compatible = "nxp,mrt-channel";
+			reg = <3>;
+			status = "disabled";
+		};
+	};
 };
 
 &flexspi {
diff --git a/soc/arm/nxp_imx/rt6xx/soc.c b/soc/arm/nxp_imx/rt6xx/soc.c
index e04499b289d..2d4eab6854d 100644
--- a/soc/arm/nxp_imx/rt6xx/soc.c
+++ b/soc/arm/nxp_imx/rt6xx/soc.c
@@ -321,6 +321,10 @@ static ALWAYS_INLINE void clock_init(void)
 	flexspi_setup_clock(FLEXSPI, 1U, 9U);
 #endif
 
+#if CONFIG_COUNTER_NXP_MRT
+	RESET_PeripheralReset(kMRT0_RST_SHIFT_RSTn);
+#endif
+
 	/* Set SystemCoreClock variable. */
 	SystemCoreClock = CLOCK_INIT_CORE_CLOCK;