diff --git a/boards/riscv/neorv32/doc/index.rst b/boards/riscv/neorv32/doc/index.rst
index 3c7693ee685..de28b14ccda 100644
--- a/boards/riscv/neorv32/doc/index.rst
+++ b/boards/riscv/neorv32/doc/index.rst
@@ -45,6 +45,8 @@ Processor (SoC):
 | UART      | on-chip    | serial port-polling;                |
 |           |            | serial port-interrupt               |
 +-----------+------------+-------------------------------------+
+| TRNG      | on-chip    | entropy                             |
++-----------+------------+-------------------------------------+
 
 The default board configuration for the NEORV32 Processor (SoC) can be found in
 the defconfig file: :file:`boards/riscv/neorv32/neorv32_defconfig`.
@@ -93,6 +95,14 @@ system console.
    standard NEORV32 bootloader. The baudrate can be changed by modifying the
    ``current-speed`` property of the ``uart0`` devicetree node.
 
+True Random-Number Generator
+============================
+
+The True Random-Number Generator (TRNG) of the NEORV32 is supported, but
+disabled by default. For NEORV32 SoC implementations supporting the TRNG,
+support can be enabled by setting the ``status`` property of the ``trng``
+devicetree node to ``okay``.
+
 Programming and Debugging
 *************************