soc: esp32c6: Kconfig and .ld updates, DTS and comments fix
Kconfig, .ld and comments fixing Fixed address of UART1, WDT and RTC timer disabled by default Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
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3b732a1ade
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9265c82313
8 changed files with 26 additions and 31 deletions
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@ -110,7 +110,7 @@ config RISCV
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bool
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bool
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select ARCH_IS_SET
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select ARCH_IS_SET
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select ARCH_SUPPORTS_COREDUMP
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select ARCH_SUPPORTS_COREDUMP
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select ARCH_SUPPORTS_ROM_START if !SOC_SERIES_ESP32C3
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select ARCH_SUPPORTS_ROM_START if !SOC_FAMILY_ESPRESSIF_ESP32
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select ARCH_HAS_CODE_DATA_RELOCATION
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select ARCH_HAS_CODE_DATA_RELOCATION
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select ARCH_HAS_THREAD_LOCAL_STORAGE
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select ARCH_HAS_THREAD_LOCAL_STORAGE
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select ARCH_HAS_STACKWALK
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select ARCH_HAS_STACKWALK
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
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* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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@ -25,7 +25,7 @@
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cpu0: cpu@0 {
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cpu0: cpu@0 {
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device_type = "cpu";
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device_type = "cpu";
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compatible = "espressif,riscv";
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compatible = "espressif,riscv";
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riscv,isa = "rv32imc_zicsr";
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riscv,isa = "rv32imac_zicsr";
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reg = <0>;
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reg = <0>;
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clock-source = <ESP32_CPU_CLK_SRC_PLL>;
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clock-source = <ESP32_CPU_CLK_SRC_PLL>;
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clock-frequency = <DT_FREQ_M(160)>;
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clock-frequency = <DT_FREQ_M(160)>;
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@ -82,7 +82,7 @@
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clocks = <&rtc ESP32_MODULE_MAX>;
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clocks = <&rtc ESP32_MODULE_MAX>;
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interrupts = <LP_RTC_TIMER_INTR_SOURCE>;
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interrupts = <LP_RTC_TIMER_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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interrupt-parent = <&intc>;
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status = "okay";
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status = "disabled";
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};
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};
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spi2: spi@60081000 {
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spi2: spi@60081000 {
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@ -96,18 +96,18 @@
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status = "disabled";
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status = "disabled";
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};
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};
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wdt0: watchdog@6001f048 {
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wdt0: watchdog@60008048 {
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compatible = "espressif,esp32-watchdog";
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compatible = "espressif,esp32-watchdog";
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reg = <0x6001f048 0x20>;
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reg = <0x60008048 0x20>;
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interrupts = <TG0_WDT_LEVEL_INTR_SOURCE>;
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interrupts = <TG0_WDT_LEVEL_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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interrupt-parent = <&intc>;
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clocks = <&rtc ESP32_TIMG0_MODULE>;
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clocks = <&rtc ESP32_TIMG0_MODULE>;
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status = "disabled";
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status = "disabled";
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};
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};
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wdt1: watchdog@60020048 {
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wdt1: watchdog@60009048 {
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compatible = "espressif,esp32-watchdog";
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compatible = "espressif,esp32-watchdog";
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reg = <0x60020048 0x20>;
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reg = <0x60009048 0x20>;
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interrupts = <TG1_WDT_LEVEL_INTR_SOURCE>;
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interrupts = <TG1_WDT_LEVEL_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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interrupt-parent = <&intc>;
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clocks = <&rtc ESP32_TIMG1_MODULE>;
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clocks = <&rtc ESP32_TIMG1_MODULE>;
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@ -147,9 +147,9 @@
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clocks = <&rtc ESP32_UART0_MODULE>;
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clocks = <&rtc ESP32_UART0_MODULE>;
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};
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};
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uart1: uart@60010000 {
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uart1: uart@60001000 {
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compatible = "espressif,esp32-uart";
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compatible = "espressif,esp32-uart";
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reg = <0x60010000 DT_SIZE_K(4)>;
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reg = <0x60001000 DT_SIZE_K(4)>;
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status = "disabled";
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status = "disabled";
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interrupts = <UART1_INTR_SOURCE>;
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interrupts = <UART1_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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interrupt-parent = <&intc>;
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@ -1,4 +1,4 @@
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# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
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# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
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# SPDX-License-Identifier: Apache-2.0
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# SPDX-License-Identifier: Apache-2.0
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config SOC_SERIES_ESP32C6
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config SOC_SERIES_ESP32C6
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@ -8,6 +8,7 @@ config SOC_SERIES_ESP32C6
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select CLOCK_CONTROL
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select CLOCK_CONTROL
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select PINCTRL
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select PINCTRL
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select RISCV_ISA_RV32I
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select RISCV_ISA_RV32I
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select RISCV_ISA_EXT_A
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select RISCV_ISA_EXT_M
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select RISCV_ISA_EXT_M
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select RISCV_ISA_EXT_C
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select RISCV_ISA_EXT_C
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select RISCV_ISA_EXT_ZICSR
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select RISCV_ISA_EXT_ZICSR
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@ -18,10 +19,6 @@ config SOC_SERIES_ESP32C6
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if SOC_SERIES_ESP32C6
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if SOC_SERIES_ESP32C6
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config IDF_TARGET_ESP32C6
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bool "ESP32C6 as target board"
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default y
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config ESP32_PHY_MAX_WIFI_TX_POWER
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config ESP32_PHY_MAX_WIFI_TX_POWER
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int "Max WiFi TX power (dBm)"
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int "Max WiFi TX power (dBm)"
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range 10 20
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range 10 20
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@ -37,7 +34,6 @@ config ESP32_PHY_MAX_TX_POWER
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config MAC_BB_PD
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config MAC_BB_PD
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bool "Power down MAC and baseband of Wi-Fi and Bluetooth when PHY is disabled"
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bool "Power down MAC and baseband of Wi-Fi and Bluetooth when PHY is disabled"
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depends on SOC_SERIES_ESP32C6 && TICKLESS_KERNEL
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depends on SOC_SERIES_ESP32C6 && TICKLESS_KERNEL
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default n
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help
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help
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If enabled, the MAC and baseband of Wi-Fi and Bluetooth will be powered
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If enabled, the MAC and baseband of Wi-Fi and Bluetooth will be powered
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down when PHY is disabled. Enabling this setting reduces power consumption
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down when PHY is disabled. Enabling this setting reduces power consumption
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@ -1,6 +1,6 @@
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# ESP32C3 board configuration
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# ESP32C6 board configuration
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# Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd.
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# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
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# SPDX-License-Identifier: Apache-2.0
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# SPDX-License-Identifier: Apache-2.0
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if SOC_SERIES_ESP32C6
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if SOC_SERIES_ESP32C6
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@ -1,4 +1,4 @@
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# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
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# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
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# SPDX-License-Identifier: Apache-2.0
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# SPDX-License-Identifier: Apache-2.0
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config SOC_SERIES_ESP32C6
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config SOC_SERIES_ESP32C6
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@ -21,9 +21,8 @@ config SOC_SERIES
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default "esp32c6" if SOC_SERIES_ESP32C6
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default "esp32c6" if SOC_SERIES_ESP32C6
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config SOC
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config SOC
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default "esp32c6" if SOC_SERIES_ESP32C6
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default "esp32c6" if SOC_ESP32C6
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config SOC_PART_NUMBER
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config SOC_PART_NUMBER
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default "ESP32_C6_WROOM_1U_N4" if SOC_ESP32_C6_WROOM_1U_N4
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default "ESP32_C6_WROOM_1U_N4" if SOC_ESP32_C6_WROOM_1U_N4
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default "ESP32_C6_WROOM_1U_N8" if SOC_ESP32_C6_WROOM_1U_N8
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default "ESP32_C6_WROOM_1U_N8" if SOC_ESP32_C6_WROOM_1U_N8
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default "ESP32C6" if SOC_ESP32C6
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@ -610,8 +610,6 @@ SECTIONS
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__bss_start = ABSOLUTE(.);
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__bss_start = ABSOLUTE(.);
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_bss_start = ABSOLUTE(.);
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_bss_start = ABSOLUTE(.);
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/* bluetooth library requires this symbol to be defined */
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_btdm_bss_start = ABSOLUTE(.);
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*libbtdm_app.a:(.bss .bss.* COMMON)
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*libbtdm_app.a:(.bss .bss.* COMMON)
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. = ALIGN (4);
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. = ALIGN (4);
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_btdm_bss_end = ABSOLUTE(.);
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_btdm_bss_end = ABSOLUTE(.);
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@ -662,6 +660,7 @@ SECTIONS
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_instruction_reserved_start = ABSOLUTE(.);
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_instruction_reserved_start = ABSOLUTE(.);
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_text_start = ABSOLUTE(.);
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_text_start = ABSOLUTE(.);
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_instruction_reserved_start = ABSOLUTE(.);
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_instruction_reserved_start = ABSOLUTE(.);
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__text_region_start = ABSOLUTE(.);
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#if !defined(CONFIG_ESP32_WIFI_IRAM_OPT)
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#if !defined(CONFIG_ESP32_WIFI_IRAM_OPT)
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*libnet80211.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.*)
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*libnet80211.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.*)
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@ -692,6 +691,7 @@ SECTIONS
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_instruction_reserved_end = ABSOLUTE(.);
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_instruction_reserved_end = ABSOLUTE(.);
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_text_end = ABSOLUTE(.);
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_text_end = ABSOLUTE(.);
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_instruction_reserved_end = ABSOLUTE(.);
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_instruction_reserved_end = ABSOLUTE(.);
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__text_region_end = ABSOLUTE(.);
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_etext = .;
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_etext = .;
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} GROUP_DATA_LINK_IN(CACHED_REGION, ROMABLE_REGION)
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} GROUP_DATA_LINK_IN(CACHED_REGION, ROMABLE_REGION)
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@ -701,17 +701,17 @@ SECTIONS
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/* --- START OF .rodata --- */
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/* --- START OF .rodata --- */
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/* Align next section to 64k to allow mapping */
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/* Align next section to 64k to allow mapping */
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.flash.align_rodata (NOLOAD) :
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{
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/* Subsequent segment lma and vma align */
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. = ALIGN(CACHE_ALIGN);
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} GROUP_DATA_LINK_IN(CACHED_REGION, ROMABLE_REGION)
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.flash.align_rom (NOLOAD) :
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.flash.align_rom (NOLOAD) :
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{
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{
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. = ALIGN(CACHE_ALIGN);
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. = ALIGN(CACHE_ALIGN);
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} GROUP_LINK_IN(ROMABLE_REGION)
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} GROUP_LINK_IN(ROMABLE_REGION)
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.flash.align_rodata (NOLOAD) :
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{
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/* Subsequent segment lma and vma align */
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. = ALIGN(CACHE_ALIGN);
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} GROUP_LINK_IN(CACHED_REGION)
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/* Symbols used during the application memory mapping */
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/* Symbols used during the application memory mapping */
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_image_drom_start = LOADADDR(.flash.rodata);
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_image_drom_start = LOADADDR(.flash.rodata);
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_image_drom_size = _image_rodata_end - _image_rodata_start;
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_image_drom_size = _image_rodata_end - _image_rodata_start;
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@ -101,7 +101,7 @@ SECTIONS
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*(.iram1 .iram1.*)
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*(.iram1 .iram1.*)
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*(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
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*(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
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/* C3 memprot requires 512 B alignment for split lines */
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/* C6 memprot requires 512 B alignment for split lines */
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. = ALIGN (16);
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. = ALIGN (16);
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_init_end = ABSOLUTE(.);
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_init_end = ABSOLUTE(.);
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. = ALIGN(16);
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. = ALIGN(16);
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