kconfig: Unify CACHE_* options
The kconfig options to configure the cache flushing framework are currently living in the arch-specific kconfigs of ARC and X86 (32-bit) architectures even though these are defining the same things. Move the common symbols in one place accessible by all the architectures and create a menu for those. Leave the default values in the arch-specific locations. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
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3 changed files with 28 additions and 55 deletions
28
arch/Kconfig
28
arch/Kconfig
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@ -710,6 +710,34 @@ config FPU_SHARING
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endmenu
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menu "Cache Options"
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config CACHE_LINE_SIZE_DETECT
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bool "Detect cache line size at runtime"
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help
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This option enables querying some architecture-specific hardware for
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finding the cache line size at the expense of taking more memory and
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code and a slightly increased boot time.
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If the CPU's cache line size is known in advance, disable this option and
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manually enter the value for CACHE_LINE_SIZE.
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config CACHE_LINE_SIZE
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int "Cache line size" if !CACHE_LINE_SIZE_DETECT
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default 0
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help
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Size in bytes of a CPU cache line.
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Detect automatically at runtime by selecting CACHE_LINE_SIZE_DETECT.
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config CACHE_FLUSHING
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bool "Enable cache flushing mechanism"
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help
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This links in the cache flushing functions (d-cache and i-cache where
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possible).
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endmenu
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config ARCH
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string
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help
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@ -282,34 +282,8 @@ source "arch/arc/core/mpu/Kconfig"
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endmenu
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config CACHE_LINE_SIZE_DETECT
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bool "Detect d-cache line size at runtime"
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help
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This option enables querying the d-cache build register for finding
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the d-cache line size at the expense of taking more memory and code
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and a slightly increased boot time.
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If the CPU's d-cache line size is known in advance, disable this
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option and manually enter the value for CACHE_LINE_SIZE.
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config CACHE_LINE_SIZE
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int "Cache line size" if !CACHE_LINE_SIZE_DETECT
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default 32
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help
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Size in bytes of a CPU d-cache line.
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Detect automatically at runtime by selecting CACHE_LINE_SIZE_DETECT.
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config ARCH_CACHE_FLUSH_DETECT
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bool
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config CACHE_FLUSHING
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bool "Enable d-cache flushing mechanism"
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help
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This links in the sys_cache_flush() function, which provides a
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way to flush multiple lines of the d-cache.
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If the d-cache is present, set this to y.
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If the d-cache is NOT present, set this to n.
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config ARC_EXCEPTION_STACK_SIZE
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int "ARC exception handling stack size"
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@ -140,25 +140,8 @@ config LAZY_FPU_SHARING
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endmenu
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config CACHE_LINE_SIZE_DETECT
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bool "Detect cache line size at runtime"
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default y
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help
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This option enables querying the CPUID register for finding the cache line
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size at the expense of taking more memory and code and a slightly increased
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boot time.
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If the CPU's cache line size is known in advance, disable this option and
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manually enter the value for CACHE_LINE_SIZE.
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config CACHE_LINE_SIZE
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int "Cache line size" if !CACHE_LINE_SIZE_DETECT
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default 64 if CPU_ATOM
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default 0
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help
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Size in bytes of a CPU cache line.
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Detect automatically at runtime by selecting CACHE_LINE_SIZE_DETECT.
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config CLFLUSH_INSTRUCTION_SUPPORTED
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bool "CLFLUSH instruction supported"
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@ -185,18 +168,6 @@ config CLFLUSH_DETECT
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If the CPU's support (or lack thereof) of CLFLUSH is known in advance, then
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disable this option and set CLFLUSH_INSTRUCTION_SUPPORTED as appropriate.
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config ARCH_CACHE_FLUSH_DETECT
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bool
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default y
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depends on CLFLUSH_DETECT
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config CACHE_FLUSHING
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bool "Enable cache flushing mechanism"
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help
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This links in the sys_cache_flush() function. A mechanism for flushing the
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cache must be selected as well. By default, that mechanism is discovered at
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runtime.
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config X86_DYNAMIC_IRQ_STUBS
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int "Number of dynamic interrupt stubs"
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depends on DYNAMIC_INTERRUPTS
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