soc: arm: st_stm32: add driver lptimer management to stm32wb series
This patch introduces the support of the Low Power Timer for the STM32WBxx from STMicroelectronics. Signed-off-by: Francois Ramu <francois.ramu@st.com>
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3 changed files with 24 additions and 0 deletions
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@ -277,6 +277,18 @@
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reg = <0x40003000 0x400>;
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label = "IWDG";
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};
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lptim1: timers@40007c00 {
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compatible = "st,stm32-timers";
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40007c00 0x400>;
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interrupts = <47 0>;
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interrupt-names = "wakeup";
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status = "disabled";
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label = "LPTIM_1";
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};
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};
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};
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@ -164,4 +164,11 @@
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#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
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#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
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#define DT_LPTIM_1_BASE_ADDRESS DT_ST_STM32_TIMERS_40007C00_BASE_ADDRESS
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#define DT_LPTIM_1_IRQ DT_ST_STM32_TIMERS_40007C00_IRQ_0
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#define DT_LPTIM_1_IRQ_PRI DT_ST_STM32_TIMERS_40007C00_IRQ_0_PRIORITY
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#define DT_LPTIM_1_NAME DT_ST_STM32_TIMERS_40007C00_LABEL
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#define DT_LPTIM_1_CLOCK_BITS DT_ST_STM32_TIMERS_40007C00_CLOCK_BITS_0
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#define DT_LPTIM_1_CLOCK_BUS DT_ST_STM32_TIMERS_40007C00_CLOCK_BUS_0
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/* End of SoC Level DTS fixup file */
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@ -73,6 +73,11 @@
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#include <stm32wbxx_ll_wwdg.h>
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#endif
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#ifdef CONFIG_STM32_LPTIM_TIMER
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#include <stm32wbxx_ll_lptim.h>
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#include <stm32wbxx_ll_system.h>
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#endif
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#endif /* !_ASMLANGUAGE */
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#endif /* _STM32WBX_SOC_H_ */
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