From 9151af224a6c06d39b46780ab3f8010b988fa249 Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Tue, 10 Jan 2023 15:14:01 +0100 Subject: [PATCH] boards: nucleo f7xx: Increase core speed STM32F7 allow to run at significantly higher speed that the one configured on these boards. Configure clocks to make benefit of full potential. Additionally, configure PLL_Q output to provide USB compatible 48MHz freq. Signed-off-by: Erwan Gouriou --- boards/arm/nucleo_f746zg/nucleo_f746zg.dts | 10 +++++----- boards/arm/nucleo_f756zg/nucleo_f756zg.dts | 10 +++++----- boards/arm/nucleo_f767zi/nucleo_f767zi.dts | 10 +++++----- 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/boards/arm/nucleo_f746zg/nucleo_f746zg.dts b/boards/arm/nucleo_f746zg/nucleo_f746zg.dts index 1674f0de74e..1a3d3c6e35a 100644 --- a/boards/arm/nucleo_f746zg/nucleo_f746zg.dts +++ b/boards/arm/nucleo_f746zg/nucleo_f746zg.dts @@ -74,19 +74,19 @@ &pll { div-m = <4>; - mul-n = <72>; + mul-n = <216>; div-p = <2>; - div-q = <3>; + div-q = <9>; clocks = <&clk_hse>; status = "okay"; }; &rcc { clocks = <&pll>; - clock-frequency = ; + clock-frequency = ; ahb-prescaler = <1>; - apb1-prescaler = <2>; - apb2-prescaler = <1>; + apb1-prescaler = <4>; + apb2-prescaler = <2>; }; &usart2 { diff --git a/boards/arm/nucleo_f756zg/nucleo_f756zg.dts b/boards/arm/nucleo_f756zg/nucleo_f756zg.dts index fd77ddf83d3..01cec2c0765 100644 --- a/boards/arm/nucleo_f756zg/nucleo_f756zg.dts +++ b/boards/arm/nucleo_f756zg/nucleo_f756zg.dts @@ -68,19 +68,19 @@ &pll { div-m = <4>; - mul-n = <72>; + mul-n = <216>; div-p = <2>; - div-q = <3>; + div-q = <9>; clocks = <&clk_hse>; status = "okay"; }; &rcc { clocks = <&pll>; - clock-frequency = ; + clock-frequency = ; ahb-prescaler = <1>; - apb1-prescaler = <2>; - apb2-prescaler = <1>; + apb1-prescaler = <4>; + apb2-prescaler = <2>; }; &usart2 { diff --git a/boards/arm/nucleo_f767zi/nucleo_f767zi.dts b/boards/arm/nucleo_f767zi/nucleo_f767zi.dts index f32c0b648a7..74c26113555 100644 --- a/boards/arm/nucleo_f767zi/nucleo_f767zi.dts +++ b/boards/arm/nucleo_f767zi/nucleo_f767zi.dts @@ -75,19 +75,19 @@ &pll { div-m = <4>; - mul-n = <72>; + mul-n = <216>; div-p = <2>; - div-q = <3>; + div-q = <9>; clocks = <&clk_hse>; status = "okay"; }; &rcc { clocks = <&pll>; - clock-frequency = ; + clock-frequency = ; ahb-prescaler = <1>; - apb1-prescaler = <2>; - apb2-prescaler = <1>; + apb1-prescaler = <4>; + apb2-prescaler = <2>; }; &usart2 {