michaelh/zephyr
1
0
Fork 0
Code Releases Activity

drivers: can: stm32: bxcan: rename driver to match reference manuals

Browse source 
Rename the STM32 bxCAN driver DTS compatible, Kconfig symbol, and
implementation file to match the naming used in the ST reference manuals.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit is contained in:
Henrik Brix Andersen 2023-08-15 10:37:32 +02:00 • committed by Carles Cufí
commit 913e59c5ea
22 changed files with 33 additions and 34 deletions
Download patch file Download diff file Expand all files Collapse all files

2
drivers/can/CMakeLists.txt
View file

@ -13,7 +13,7 @@ zephyr_library_sources_ifdef(CONFIG_CAN_MCP2515 can_mcp2515.c)
zephyr_library_sources_ifdef(CONFIG_CAN_MCUX_FLEXCAN can_mcux_flexcan.c) zephyr_library_sources_ifdef(CONFIG_CAN_MCUX_FLEXCAN can_mcux_flexcan.c)
zephyr_library_sources_ifdef(CONFIG_CAN_SAM can_sam.c) zephyr_library_sources_ifdef(CONFIG_CAN_SAM can_sam.c)
zephyr_library_sources_ifdef(CONFIG_CAN_SAM0 can_sam0.c) zephyr_library_sources_ifdef(CONFIG_CAN_SAM0 can_sam0.c)
zephyr_library_sources_ifdef(CONFIG_CAN_STM32 can_stm32.c) zephyr_library_sources_ifdef(CONFIG_CAN_STM32_BXCAN can_stm32_bxcan.c)
zephyr_library_sources_ifdef(CONFIG_CAN_STM32FD can_stm32fd.c) zephyr_library_sources_ifdef(CONFIG_CAN_STM32FD can_stm32fd.c)
zephyr_library_sources_ifdef(CONFIG_CAN_STM32H7 can_stm32h7.c) zephyr_library_sources_ifdef(CONFIG_CAN_STM32H7 can_stm32h7.c)
zephyr_library_sources_ifdef(CONFIG_CAN_RCAR can_rcar.c) zephyr_library_sources_ifdef(CONFIG_CAN_RCAR can_rcar.c)

17
drivers/can/Kconfig.stm32
View file

@ -3,18 +3,17 @@
# Copyright (c) 2018 Alexander Wachter # Copyright (c) 2018 Alexander Wachter
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
config CAN_STM32 config CAN_STM32_BXCAN
bool "STM32 CAN Driver" bool "STM32 bxCAN driver"
default y default y
depends on DT_HAS_ST_STM32_CAN_ENABLED depends on DT_HAS_ST_STM32_BXCAN_ENABLED
help help
Enable STM32 CAN Driver. Enable STM32 bxCAN Driver.
Tested on STM32F0, STM32F4, STM32L4 and STM32F7 series.
if CAN_STM32 if CAN_STM32_BXCAN
config CAN_MAX_STD_ID_FILTER config CAN_MAX_STD_ID_FILTER
int "Maximum number of std ID filters" int "Maximum number of standard (11-bit) ID filters"
default 14 default 14
range 0 28 range 0 28
help help
@ -30,7 +29,7 @@ config CAN_MAX_STD_ID_FILTER
CAN_MAX_STD_ID_FILTER + CAN_MAX_EXT_ID_FILTER * 2 <= 28 CAN_MAX_STD_ID_FILTER + CAN_MAX_EXT_ID_FILTER * 2 <= 28
config CAN_MAX_EXT_ID_FILTER config CAN_MAX_EXT_ID_FILTER
int "Maximum number of ext ID filters" int "Maximum number of extended (29-bit) ID filters"
default 7 default 7
range 0 14 range 0 14
help help
@ -45,4 +44,4 @@ config CAN_MAX_EXT_ID_FILTER
CAN_MAX_STD_ID_FILTER + CAN_MAX_EXT_ID_FILTER * 2 <= 28 CAN_MAX_STD_ID_FILTER + CAN_MAX_EXT_ID_FILTER * 2 <= 28
endif # CAN_STM32 endif # CAN_STM32_BXCAN

2
drivers/can/can_stm32.c → drivers/can/can_stm32_bxcan.c
View file

@ -23,7 +23,7 @@ LOG_MODULE_REGISTER(can_stm32, CONFIG_CAN_LOG_LEVEL);
#define CAN_INIT_TIMEOUT (10 * sys_clock_hw_cycles_per_sec() / MSEC_PER_SEC) #define CAN_INIT_TIMEOUT (10 * sys_clock_hw_cycles_per_sec() / MSEC_PER_SEC)
#define DT_DRV_COMPAT st_stm32_can #define DT_DRV_COMPAT st_stm32_bxcan
#define SP_IS_SET(inst) DT_INST_NODE_HAS_PROP(inst, sample_point) || #define SP_IS_SET(inst) DT_INST_NODE_HAS_PROP(inst, sample_point) ||

2
dts/arm/st/f0/stm32f042.dtsi
View file

@ -39,7 +39,7 @@
}; };
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
interrupts = <30 0>; interrupts = <30 0>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>;

2
dts/arm/st/f0/stm32f072.dtsi
View file

@ -11,7 +11,7 @@
compatible = "st,stm32f072", "st,stm32f0", "simple-bus"; compatible = "st,stm32f072", "st,stm32f0", "simple-bus";
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
interrupts = <30 0>; interrupts = <30 0>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>;

2
dts/arm/st/f0/stm32f091.dtsi
View file

@ -53,7 +53,7 @@
}; };
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
interrupts = <30 0>; interrupts = <30 0>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>;

2
dts/arm/st/f1/stm32f103X8.dtsi
View file

@ -48,7 +48,7 @@
}; };
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
interrupts = <19 0>, <20 0>, <21 0>, <22 0>; interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";

4
dts/arm/st/f1/stm32f105.dtsi
View file

@ -34,7 +34,7 @@
}; };
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
interrupts = <19 0>, <20 0>, <21 0>, <22 0>; interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";
@ -45,7 +45,7 @@
}; };
can2: can@40006800 { can2: can@40006800 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006800 0x400>; reg = <0x40006800 0x400>;
interrupts = <63 0>, <64 0>, <65 0>, <66 0>; interrupts = <63 0>, <64 0>, <65 0>, <66 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";

2
dts/arm/st/f3/stm32f3.dtsi
View file

@ -414,7 +414,7 @@
}; };
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
interrupts = <19 0>, <20 0>, <21 0>, <22 0>; interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";

4
dts/arm/st/f4/stm32f405.dtsi
View file

@ -206,7 +206,7 @@
}; };
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
interrupts = <19 0>, <20 0>, <21 0>, <22 0>; interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";
@ -217,7 +217,7 @@
}; };
can2: can@40006800 { can2: can@40006800 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006800 0x400>; reg = <0x40006800 0x400>;
interrupts = <63 0>, <64 0>, <65 0>, <66 0>; interrupts = <63 0>, <64 0>, <65 0>, <66 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";

4
dts/arm/st/f4/stm32f412.dtsi
View file

@ -206,7 +206,7 @@
}; };
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
interrupts = <19 0>, <20 0>, <21 0>, <22 0>; interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";
@ -217,7 +217,7 @@
}; };
can2: can@40006800 { can2: can@40006800 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006800 0x400>; reg = <0x40006800 0x400>;
interrupts = <63 0>, <64 0>, <65 0>, <66 0>; interrupts = <63 0>, <64 0>, <65 0>, <66 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";

2
dts/arm/st/f4/stm32f413.dtsi
View file

@ -73,7 +73,7 @@
}; };
can3: can@40006c00 { can3: can@40006c00 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006c00 0x400>; reg = <0x40006c00 0x400>;
interrupts = <74 0>, <75 0>, <76 0>, <77 0>; interrupts = <74 0>, <75 0>, <76 0>, <77 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";

4
dts/arm/st/f4/stm32f446.dtsi
View file

@ -59,7 +59,7 @@
}; };
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
interrupts = <19 0>, <20 0>, <21 0>, <22 0>; interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";
@ -70,7 +70,7 @@
}; };
can2: can@40006800 { can2: can@40006800 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006800 0x400>; reg = <0x40006800 0x400>;
interrupts = <63 0>, <64 0>, <65 0>, <66 0>; interrupts = <63 0>, <64 0>, <65 0>, <66 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";

2
dts/arm/st/f7/stm32f7.dtsi
View file

@ -396,7 +396,7 @@
}; };
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
interrupts = <19 0>, <20 0>, <21 0>, <22 0>; interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";

2
dts/arm/st/f7/stm32f745.dtsi
View file

@ -66,7 +66,7 @@
}; };
can2: can@40006800 { can2: can@40006800 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006800 0x400>; reg = <0x40006800 0x400>;
interrupts = <63 0>, <64 0>, <65 0>, <66 0>; interrupts = <63 0>, <64 0>, <65 0>, <66 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";

2
dts/arm/st/l4/stm32l431.dtsi
View file

@ -102,7 +102,7 @@
}; };
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>;
interrupts = <19 0>, <20 0>, <21 0>, <22 0>; interrupts = <19 0>, <20 0>, <21 0>, <22 0>;

2
dts/arm/st/l4/stm32l432.dtsi
View file

@ -51,7 +51,7 @@
}; };
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
interrupts = <19 0>, <20 0>, <21 0>, <22 0>; interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";

2
dts/arm/st/l4/stm32l451.dtsi
View file

@ -135,7 +135,7 @@
}; };
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
interrupts = <19 0>, <20 0>, <21 0>, <22 0>; interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";

2
dts/arm/st/l4/stm32l471.dtsi
View file

@ -226,7 +226,7 @@
}; };
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
interrupts = <19 0>, <20 0>, <21 0>, <22 0>; interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";

2
dts/arm/st/l4/stm32l496.dtsi
View file

@ -49,7 +49,7 @@
}; };
can2: can@40006800 { can2: can@40006800 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006800 0x400>; reg = <0x40006800 0x400>;
interrupts = <86 0>, <87 0>, <88 0>, <89 0>; interrupts = <86 0>, <87 0>, <88 0>, <89 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";

2
dts/arm/st/l4/stm32l4p5.dtsi
View file

@ -285,7 +285,7 @@
}; };
can1: can@40006400 { can1: can@40006400 {
compatible = "st,stm32-can"; compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>; reg = <0x40006400 0x400>;
interrupts = <19 0>, <20 0>, <21 0>, <22 0>; interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE"; interrupt-names = "TX", "RX0", "RX1", "SCE";

2
dts/bindings/can/st,stm32-can.yaml → dts/bindings/can/st,stm32-bxcan.yaml
View file

@ -1,6 +1,6 @@
description: STM32 CAN controller description: STM32 CAN controller
compatible: "st,stm32-can" compatible: "st,stm32-bxcan"
include: [can-controller.yaml, pinctrl-device.yaml] include: [can-controller.yaml, pinctrl-device.yaml]