soc: espressif: esp32s2: improve memory layout
- Allow more statical allocations by reordering the sections in the mcuboot.ld and in default.ld. - Reorder the ROM sections to cover the cases described in the `common-rom-common-kernel-devices.ld`. Changing the order of .rodata and .text we prevents to create an overlapped segments issue. Signed-off-by: Marek Matej <marek.matej@espressif.com>
This commit is contained in:
Marek Matej
Anas Nashif
parent
fe06ffb37f
commit
90ecdf0dab
3 changed files with 113 additions and 107 deletions
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@ -17,7 +17,7 @@
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* If no bootloader is used, we can extend it to gain more user ram.
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*/
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#ifdef CONFIG_ESP_SIMPLE_BOOT
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user_iram_end = (DRAM_BUFFERS_START + IRAM_DRAM_OFFSET);
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user_iram_end = (BOOTLOADER_USER_DRAM_END + IRAM_DRAM_OFFSET);
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#else
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user_iram_end = BOOTLOADER_IRAM_LOADER_SEG_START;
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#endif
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@ -31,7 +31,7 @@ user_iram_seg_len = user_idram_size;
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user_dram_seg_len = user_idram_size;
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/* Aliases */
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#define ROTEXT_REGION irom0_0_seg
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#define FLASH_CODE_REGION irom0_0_seg
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#define RODATA_REGION drom0_0_seg
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#define IRAM_REGION iram0_0_seg
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#define RAMABLE_REGION dram0_0_seg
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@ -42,7 +42,6 @@ user_dram_seg_len = user_idram_size;
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#undef GROUP_ROM_LINK_IN
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#define GROUP_ROM_LINK_IN(vregion, lregion) > RODATA_REGION AT > lregion
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/* TODO */
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#define RESERVE_RTC_MEM 0
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MEMORY
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@ -798,10 +797,63 @@ SECTIONS
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/* --- END OF DRAM --- */
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/* --- START OF .flash.text --- */
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_image_irom_start = LOADADDR(.flash.text);
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_image_irom_size = SIZEOF(.flash.text);
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_image_irom_vaddr = ADDR(.flash.text);
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.flash.text_dummy (NOLOAD):
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{
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. = ALIGN(CACHE_ALIGN);
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} GROUP_LINK_IN(ROMABLE_REGION)
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.flash.text : ALIGN(4)
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{
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_stext = .;
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_instruction_reserved_start = ABSOLUTE(.);
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_text_start = ABSOLUTE(.);
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__text_region_start = ABSOLUTE(.);
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#if !defined(CONFIG_ESP32_WIFI_IRAM_OPT)
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*libnet80211.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.*)
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*libpp.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.* .wifiorslpiram .wifiorslpiram.*)
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#endif
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#if !defined(CONFIG_ESP32_WIFI_RX_IRAM_OPT)
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*libnet80211.a:( .wifirxiram .wifirxiram.* .wifislprxiram .wifislprxiram.*)
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*libpp.a:( .wifirxiram .wifirxiram.* .wifislprxiram .wifislprxiram.*)
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#endif
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*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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*(.literal .text .literal.* .text.*)
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/* CPU will try to prefetch up to 16 bytes of
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* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
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* safe access to up to 16 bytes after the last real instruction, add
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* dummy bytes to ensure this
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*/
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. += 16;
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_text_end = ABSOLUTE(.);
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_instruction_reserved_end = ABSOLUTE(.); /* This is a symbol marking the flash.text end, this can be used for mmu driver to maintain virtual address */
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__text_region_end = ABSOLUTE(.);
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_etext = .;
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} GROUP_DATA_LINK_IN(FLASH_CODE_REGION, ROMABLE_REGION)
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/* --- END OF .flash.text --- */
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/* --- START OF .rodata --- */
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_image_drom_start = LOADADDR(.flash.rodata);
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_image_drom_size = LOADADDR(.flash.rodata_end) + SIZEOF(.flash.rodata_end) - _image_drom_start;
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_image_drom_size2 = _rodata_end - _rodata_start;
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_image_drom_vaddr = ADDR(.flash.rodata);
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/* Align next section to 64k to allow mapping */
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@ -843,7 +895,6 @@ SECTIONS
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*(.dynamic)
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*(.gnu.version_d)
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. = ALIGN(4);
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_rodata_end = ABSOLUTE(.);
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/* Literals are also RO data. */
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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@ -871,6 +922,7 @@ SECTIONS
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.flash.rodata_end :
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{
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. = ALIGN(CACHE_ALIGN);
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_rodata_end = ABSOLUTE(.);
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_image_rodata_end = ABSOLUTE(.);
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_rodata_reserved_end = ABSOLUTE(.);
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__rodata_region_end = ABSOLUTE(.);
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@ -879,58 +931,6 @@ SECTIONS
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/* --- END OF .rodata --- */
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/* --- START OF .flash.text --- */
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_image_irom_start = LOADADDR(.flash.text);
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_image_irom_size = LOADADDR(.flash.text) + SIZEOF(.flash.text) - _image_irom_start;
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_image_irom_vaddr = ADDR(.flash.text);
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.flash.text_dummy (NOLOAD):
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{
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. = ALIGN(CACHE_ALIGN+CACHE_ALIGN);
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} GROUP_LINK_IN(ROMABLE_REGION)
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.flash.text : ALIGN(4)
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{
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_stext = .;
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_instruction_reserved_start = ABSOLUTE(.);
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_text_start = ABSOLUTE(.);
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__text_region_start = ABSOLUTE(.);
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#if !defined(CONFIG_ESP32_WIFI_IRAM_OPT)
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*libnet80211.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.*)
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*libpp.a:( .wifi0iram .wifi0iram.* .wifislpiram .wifislpiram.* .wifiorslpiram .wifiorslpiram.*)
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#endif
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#if !defined(CONFIG_ESP32_WIFI_RX_IRAM_OPT)
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*libnet80211.a:( .wifirxiram .wifirxiram.* .wifislprxiram .wifislprxiram.*)
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*libpp.a:( .wifirxiram .wifirxiram.* .wifislprxiram .wifislprxiram.*)
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#endif
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*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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*(.literal .text .literal.* .text.*)
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/* CPU will try to prefetch up to 16 bytes of
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* of instructions. This means that any configuration (e.g. MMU, PMS) must allow
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* safe access to up to 16 bytes after the last real instruction, add
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* dummy bytes to ensure this
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*/
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. += 16;
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_text_end = ABSOLUTE(.);
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_instruction_reserved_end = ABSOLUTE(.); /* This is a symbol marking the flash.text end, this can be used for mmu driver to maintain virtual address */
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__text_region_end = ABSOLUTE(.);
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_etext = .;
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} GROUP_DATA_LINK_IN(ROTEXT_REGION, ROMABLE_REGION)
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/* --- END OF .flash.text --- */
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#ifdef CONFIG_GEN_ISR_TABLES
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#include <zephyr/linker/intlist.ld>
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#endif
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@ -61,20 +61,19 @@ SECTIONS
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*libzephyr.a:cache_hal.*(.literal .text .literal.* .text.*)
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*libzephyr.a:flash_map.*(.literal .text .literal.* .text.*)
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*libzephyr.a:esp_rom_spiflash.*(.literal .text .literal.* .text.*)
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*libzephyr.a:heap.*(.literal .text .literal.* .text.*)
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*libkernel.a:kheap.*(.literal .text .literal.* .text.*)
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*libkernel.a:mempool.*(.literal .text .literal.* .text.*)
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*libkernel.a:device.*(.literal .text .literal.* .text.*)
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*libkernel.a:timeout.*(.literal .text .literal.* .text.*)
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*libzephyr.a:esp_loader.*(.literal .text .literal.* .text.*)
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*libzephyr.a:mmu_hal.*(.literal .text .literal.* .text.*)
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*libzephyr.a:rtc_time.*(.literal .literal.* .text .text.*)
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*libzephyr.a:rtc_clk.*(.literal .literal.* .text .text.*)
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*libzephyr.a:rtc_clk_init.*(.literal .literal.* .text .text.*)
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*(.literal.bootloader_mmap .text.bootloader_mmap)
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*(.literal.bootloader_munmap .text.bootloader_munmap)
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*libzephyr.a:esp_loader.*(.literal .text .literal.* .text.*)
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*libzephyr.a:mmu_hal.*(.literal .text .literal.* .text.*)
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*(.literal.esp_intr_disable .literal.esp_intr_disable.* .text.esp_intr_disable .text.esp_intr_disable.*)
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*(.literal.default_intr_handler .text.default_intr_handler .iram1.*.default_intr_handler)
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*(.literal.esp_log_timestamp .text.esp_log_timestamp)
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@ -90,14 +89,7 @@ SECTIONS
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* safe access to up to 16 bytes after the last real instruction, add
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* dummy bytes to ensure this
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*/
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. += 16;
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_text_end = ABSOLUTE(.);
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_etext = .;
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. = ALIGN(4);
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_loader_text_end = ABSOLUTE(.);
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_iram_text_end = ABSOLUTE(.);
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_iram_end = ABSOLUTE(.);
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. = ALIGN(4) + 16;
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} > iram_loader_seg
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.iram0.vectors : ALIGN(4)
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@ -136,7 +128,6 @@ SECTIONS
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*(.entry.text)
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*(.init.literal)
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*(.init)
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. = ALIGN (4);
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_init_end = ABSOLUTE(.);
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_iram_start = ABSOLUTE(.);
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@ -156,33 +147,14 @@ SECTIONS
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. = ALIGN(4);
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} > iram_seg
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.dram0.data : ALIGN(16)
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.dram.rodata :
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{
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. = ALIGN(4);
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__data_start = ABSOLUTE(.);
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__rodata_region_start = ABSOLUTE(.);
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. = ALIGN(4);
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#include <snippets-rodata.ld>
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. = ALIGN(4);
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#include <snippets-rwdata.ld>
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. = ALIGN(4);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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*(.data1)
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*libzephyr.a:mmu_hal.*(.rodata .rodata.*)
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*libzephyr.a:rtc_clk.*(.rodata .rodata.*)
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KEEP(*(.jcr))
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*(.dram1 .dram1.*)
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. = ALIGN(4);
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*(.rodata)
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*(.rodata.*)
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@ -216,17 +188,49 @@ SECTIONS
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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. = ALIGN(4);
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_thread_local_start = ABSOLUTE(.);
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*(.tdata)
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*(.tdata.*)
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*(.tbss)
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*(.tbss.*)
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*(.rodata_wlog)
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*(.rodata_wlog*)
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_thread_local_end = ABSOLUTE(.);
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. = ALIGN(4);
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} > dram_seg
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#include <zephyr/linker/common-rom/common-rom-cpp.ld>
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#include <zephyr/linker/common-rom/common-rom-kernel-devices.ld>
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#include <zephyr/linker/common-rom/common-rom-debug.ld>
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#include <zephyr/linker/common-rom/common-rom-misc.ld>
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#include <snippets-sections.ld>
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.dram0.data :
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{
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__data_start = ABSOLUTE(.);
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. = ALIGN(4);
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#include <snippets-rwdata.ld>
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. = ALIGN(4);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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*(.data1)
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*libzephyr.a:mmu_hal.*(.rodata .rodata.*)
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*libzephyr.a:rtc_clk.*(.rodata .rodata.*)
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KEEP(*(.jcr))
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*(.dram1 .dram1.*)
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. = ALIGN(4);
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} > dram_seg
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#include <zephyr/linker/cplusplus-rom.ld>
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#include <snippets-data-sections.ld>
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#include <zephyr/linker/common-ram.ld>
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@ -239,14 +243,14 @@ SECTIONS
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. = ALIGN(8);
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*(.noinit)
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*(.noinit.*)
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. = ALIGN(8) ;
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. = ALIGN(8);
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} > dram_seg
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/* Shared RAM */
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.bss (NOLOAD):
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{
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. = ALIGN (8);
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_bss_start = ABSOLUTE(.); /* required by bluetooth library */
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_bss_start = ABSOLUTE(.);
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__bss_start = ABSOLUTE(.);
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*(.dynsbss)
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@ -29,26 +29,28 @@
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*/
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#define IRAM_DRAM_OFFSET 0x70000
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#define DRAM_BUFFERS_START 0x3ffeab00
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#define DRAM_RESERVED_START 0x3ffec000
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#define DRAM_STACK_START 0x3fffc410
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#define DRAM_ROM_BSS_DATA_START 0x3fffe710
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/* For safety margin between bootloader data section and startup stacks */
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#define BOOTLOADER_STACK_OVERHEAD 0x0
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#define BOOTLOADER_DRAM_SEG_LEN 0x7000
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#define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x3000
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#define BOOTLOADER_IRAM_SEG_LEN 0xa000
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/* Base address used for calculating memory layout
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* counted from Dbus backwards and back to the Ibus
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*/
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#define BOOTLOADER_USABLE_DRAM_END DRAM_BUFFERS_START
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/* For safety margin between bootloader data section and startup stacks */
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#define BOOTLOADER_STACK_OVERHEAD 0x0
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#define BOOTLOADER_DRAM_SEG_LEN 0x6000
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#define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x2800
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#define BOOTLOADER_IRAM_SEG_LEN 0x8000
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#define BOOTLOADER_USER_DRAM_END (DRAM_RESERVED_START - BOOTLOADER_STACK_OVERHEAD)
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/* Start of the lower region is determined by region size and the end of the higher region */
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#define BOOTLOADER_DRAM_SEG_END (BOOTLOADER_USABLE_DRAM_END - BOOTLOADER_STACK_OVERHEAD)
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#define BOOTLOADER_DRAM_SEG_START (BOOTLOADER_DRAM_SEG_END - BOOTLOADER_DRAM_SEG_LEN)
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#define BOOTLOADER_IRAM_LOADER_SEG_START (BOOTLOADER_DRAM_SEG_START - \
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BOOTLOADER_IRAM_LOADER_SEG_LEN + IRAM_DRAM_OFFSET)
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#define BOOTLOADER_IRAM_SEG_START (BOOTLOADER_IRAM_LOADER_SEG_START - BOOTLOADER_IRAM_SEG_LEN)
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#define BOOTLOADER_IRAM_LOADER_SEG_START (BOOTLOADER_USER_DRAM_END + IRAM_DRAM_OFFSET \
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- BOOTLOADER_IRAM_LOADER_SEG_LEN)
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#define BOOTLOADER_DRAM_SEG_START (BOOTLOADER_IRAM_LOADER_SEG_START - BOOTLOADER_DRAM_SEG_LEN \
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- IRAM_DRAM_OFFSET)
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#define BOOTLOADER_IRAM_SEG_START (BOOTLOADER_DRAM_SEG_START - BOOTLOADER_IRAM_SEG_LEN \
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+ IRAM_DRAM_OFFSET)
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/* Flash */
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#ifdef CONFIG_FLASH_SIZE
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