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drivers: i3c: Correct some I3C register name

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Register at offset 0xe8 is QUEUE_SIZE_CAPABILITY
Register at offset 0xec is RELEASE_SDA_TIMING

Signed-off-by: Nghia Phung <nghiap@amperecomputing.com>
This commit is contained in:
Nghia Phung 2025-06-12 16:19:27 +07:00 • committed by Benjamin Cabé
commit 90dd76bf7a
1 changed files with 3 additions and 4 deletions
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7
drivers/i3c/i3c_dw.c
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@ -287,10 +287,9 @@ LOG_MODULE_REGISTER(i3c_dw, CONFIG_I3C_DW_LOG_LEVEL);
#define I3C_BUS_IDLE_TIME_NS 1000000U
#define BUS_I3C_IDLE_TIME(x) ((x) & GENMASK(19, 0))
#define I3C_VER_ID 0xe0
#define I3C_VER_TYPE 0xe4
#define EXTENDED_CAPABILITY 0xe8
#define SLAVE_CONFIG 0xec
#define I3C_VER_ID 0xe0
#define I3C_VER_TYPE 0xe4
#define RELEASE_SDA_TIMING 0xec
#define QUEUE_SIZE_CAPABILITY 0xe8
#define QUEUE_SIZE_CAPABILITY_IBI_BUF_DWORD_SIZE(x) (2 << (((x) & GENMASK(19, 16)) >> 16))