boards: arm: Add ast1030_evb board

Skeleton board support for the aspeed ast1030 evaluation board from
Aspeed Technology.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Change-Id: I16af50dd63cb355071e32f89264d8aeae47184ac

boards/arm/ast1030_evb/Kconfig.board

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+# SPDX-License-Identifier: Apache-2.0
+#
+# Aspeed AST1030 evaluation board configuration
+#
+# Copyright (c) 2021 Aspeed Technology Inc.
+
+config BOARD_AST1030_EVB
+	bool "ASPEED AST1030 Evaluation Board"
+	depends on SOC_AST1030

boards/arm/ast1030_evb/Kconfig.defconfig

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+# SPDX-License-Identifier: Apache-2.0
+#
+# Aspeed AST1030 evaluation board configuration
+#
+# Copyright (c) 2021 Aspeed Technology Inc.
+
+if BOARD_AST1030_EVB
+config BOARD
+	default "ast1030_evb"
+endif # BOARD_AST1030_EVB

boards/arm/ast1030_evb/ast1030_evb.dts

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+/*
+ * Copyright (c) 2021 Aspeed Technology Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <aspeed/ast10x0.dtsi>
+
+/ {
+	model = "Aspeed AST1030 Evaluation board";
+	compatible = "aspeed,ast1030-evb";
+
+	chosen {
+		zephyr,console = &uart5;
+		zephyr,shell-uart = &uart5;
+		zephyr,sram = &sram0;
+	};
+};
+
+&sram0 {
+	reg = <0 DT_SIZE_K(448)>, <0x70000 DT_SIZE_K(320)>;
+};
+
+&uart5 {
+	clock-frequency = <1846153>;
+	current-speed = <115200>;
+	status = "okay";
+};

boards/arm/ast1030_evb/ast1030_evb.yaml

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+# Copyright (c) 2021 Aspeed Technology Inc.
+# SPDX-License-Identifier: Apache-2.0
+identifier: ast1030_evb
+name: Aspeed AST1030-EVB
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+ram: 768
+flash: 1024
+supported:
+  - serial

boards/arm/ast1030_evb/ast1030_evb_defconfig

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+# SPDX-License-Identifier: Apache-2.0
+#
+# Copyright (c) 2021 Aspeed Technology Inc.
+#
+CONFIG_SOC_SERIES_AST10X0=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000
+CONFIG_MAIN_STACK_SIZE=4096
+CONFIG_BOOTLOADER_SRAM_SIZE=0
+CONFIG_FLASH_SIZE=0
+CONFIG_FLASH_BASE_ADDRESS=0x0
+CONFIG_XIP=n
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_NS16550=y
+CONFIG_HEAP_MEM_POOL_SIZE=50000

boards/arm/ast1030_evb/doc/index.rst

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+.. _ast1030_evb:
+
+AST1030_EVB
+###################
+
+Overview
+********
+
+The AST1030_EVB kit is a development platform to evaluate the
+Aspeed AST10x0 series SOCs. This board needs to be mated with
+part number AST1030.
+
+.. image:: ./ast1030_evb.png
+     :width: 800px
+     :align: center
+     :alt: AST1030 Evaluation Board
+
+Hardware
+********
+
+- ARM Cortex-M4F Processor
+- 768 KB on-chip SRAM for instruction and data memory
+- 1 MB on-chip Flash memory for boot ROM and data storage
+- SPI interface
+- UART interface
+- I2C/I3C interface
+- FAN PWM interface
+- ADC interface
+- JTAG interface
+- USB interface
+- LPC interface
+- eSPI interface
+
+Supported Features
+==================
+
+The following features are supported:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial port-polling;                |
+|           |            | serial port-interrupt               |
++-----------+------------+-------------------------------------+
+
+Other hardware features are not currently supported by Zephyr (at the moment)
+
+The default configuration can be found in the defconfig file:
+``boards/arm/ast1030_evb/ast1030_evb_defconfig``
+
+
+Connections and IOs
+===================
+
+Aspeed to provide the schematic for this board.
+
+System Clock
+============
+
+The AST1030 SOC is configured to use external 25MHz clock input to generate 200Mhz system clock by
+the on-chip PLL.
+
+Serial Port
+===========
+
+UART5 is configured for serial logs.  The default serial setup is 115200 8N1.
+
+
+Programming and Debugging
+*************************
+
+This board comes with a JTAG port which facilitates debugging using a single physical connection.
+
+Flashing
+========
+
+Build application as usual for the ``ast1030_evb`` board, and flash
+using SF100 SPI Flash programmer. See the
+`Aspeed Zephyr SDK User Guide`_ for more information.
+
+
+Debugging
+=========
+
+Use JTAG or SWD with a J-Link
+
+References
+**********
+.. target-notes::
+
+.. _Aspeed Zephyr SDK User Guide:
+   https://github.com/AspeedTech-BMC/zephyr/releases/download/v00.01.03/Aspeed_Zephy_SDK_User_Guide_v00.01.03.pdf