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kernel: add architecture interface headers

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include/sys/arch_inlines.h will contain all architecture APIs
that are used by public inline functions and macros,
with implementations deriving from include/arch/cpu.h.

kernel/include/arch_interface.h will contain everything
else, with implementations deriving from
arch/*/include/kernel_arch_func.h.

Instances of duplicate documentation for these APIs have been
removed; implementation details have been left in place.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2019-10-03 10:08:13 -07:00 • committed by Anas Nashif
commit 8ffff144ea
37 changed files with 925 additions and 960 deletions
Download patch file Download diff file Expand all files Collapse all files

3
include/arch/arc/arch.h
View file

@ -226,9 +226,6 @@ extern "C" {
/* Typedef for the k_mem_partition attribute*/
typedef u32_t k_mem_partition_attr_t;
/**
* @brief Explicitly nop operation.
*/
static ALWAYS_INLINE void z_arch_nop(void)
{
__asm__ volatile("nop");

66
include/arch/arc/v2/irq.h
View file

@ -39,26 +39,13 @@ extern void z_irq_priority_set(unsigned int irq, unsigned int prio,
extern void _isr_wrapper(void);
extern void z_irq_spurious(void *unused);
/**
* Configure a static interrupt.
*
* All arguments must be computable by the compiler at build time.
*
* Z_ISR_DECLARE will populate the .intList section with the interrupt's
/* Z_ISR_DECLARE will populate the .intList section with the interrupt's
* parameters, which will then be used by gen_irq_tables.py to create
* the vector table and the software ISR table. This is all done at
* build-time.
*
* We additionally set the priority in the interrupt controller at
* runtime.
*
* @param irq_p IRQ line number
* @param priority_p Interrupt priority
* @param isr_p Interrupt service routine
* @param isr_param_p ISR parameter
* @param flags_p IRQ options
*
* @return The vector assigned to this interrupt
*/
#define Z_ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
({ \
@ -67,40 +54,6 @@ extern void z_irq_spurious(void *unused);
irq_p; \
})
/**
*
* @brief Disable all interrupts on the local CPU
*
* This routine disables interrupts. It can be called from either interrupt or
* thread level. This routine returns an architecture-dependent
* lock-out key representing the "interrupt disable state" prior to the call;
* this key can be passed to irq_unlock() to re-enable interrupts.
*
* The lock-out key should only be used as the argument to the
* irq_unlock() API. It should never be used to manually re-enable
* interrupts or to inspect or manipulate the contents of the source register.
*
* This function can be called recursively: it will return a key to return the
* state of interrupt locking to the previous level.
*
* WARNINGS
* Invoking a kernel routine with interrupts locked may result in
* interrupts being re-enabled for an unspecified period of time. If the
* called routine blocks, interrupts will be re-enabled while another
* thread executes, or while the system is idle.
*
* The "interrupt disable state" is an attribute of a thread. Thus, if a
* thread disables interrupts and subsequently invokes a kernel
* routine that causes the calling thread to block, the interrupt
* disable state will be restored when the thread is later rescheduled
* for execution.
*
* @return An architecture-dependent lock-out key representing the
* "interrupt disable state" prior to the call.
*/
static ALWAYS_INLINE unsigned int z_arch_irq_lock(void)
{
unsigned int key;
@ -109,28 +62,11 @@ static ALWAYS_INLINE unsigned int z_arch_irq_lock(void)
return key;
}
/**
*
* @brief Enable all interrupts on the local CPU
*
* This routine re-enables interrupts on the local CPU. The @a key parameter
* is an architecture-dependent lock-out key that is returned by a previous
* invocation of irq_lock().
*
* This routine can be called from either interrupt or thread level.
*
* @return N/A
*/
static ALWAYS_INLINE void z_arch_irq_unlock(unsigned int key)
{
__asm__ volatile("seti %0" : : "ir"(key) : "memory");
}
/**
* Returns true if interrupts were unlocked prior to the
* z_arch_irq_lock() call that produced the key argument.
*/
static ALWAYS_INLINE bool z_arch_irq_unlocked(unsigned int key)
{
/* ARC irq lock uses instruction "clri r0",

56
include/arch/arm/asm_inline_gcc.h
View file

@ -26,40 +26,7 @@
extern "C" {
#endif
/**
*
* @brief Disable all interrupts on the CPU
*
* This routine disables interrupts. It can be called from either interrupt or
* thread level. This routine returns an architecture-dependent
* lock-out key representing the "interrupt disable state" prior to the call;
* this key can be passed to irq_unlock() to re-enable interrupts.
*
* The lock-out key should only be used as the argument to the irq_unlock()
* API. It should never be used to manually re-enable interrupts or to inspect
* or manipulate the contents of the source register.
*
* This function can be called recursively: it will return a key to return the
* state of interrupt locking to the previous level.
*
* WARNINGS
* Invoking a kernel routine with interrupts locked may result in
* interrupts being re-enabled for an unspecified period of time. If the
* called routine blocks, interrupts will be re-enabled while another
* thread executes, or while the system is idle.
*
* The "interrupt disable state" is an attribute of a thread. Thus, if a
* thread disables interrupts and subsequently invokes a kernel
* routine that causes the calling thread to block, the interrupt
* disable state will be restored when the thread is later rescheduled
* for execution.
*
* @return An architecture-dependent lock-out key representing the
* "interrupt disable state" prior to the call.
*
* @internal
*
* On ARMv7-M and ARMv8-M Mainline CPUs, this function prevents regular
/* On ARMv7-M and ARMv8-M Mainline CPUs, this function prevents regular
* exceptions (i.e. with interrupt priority lower than or equal to
* _EXC_IRQ_DEFAULT_PRIO) from interrupting the CPU. NMI, Faults, SVC,
* and Zero Latency IRQs (if supported) may still interrupt the CPU.
@ -104,23 +71,8 @@ static ALWAYS_INLINE unsigned int z_arch_irq_lock(void)
}
/**
*
* @brief Enable all interrupts on the CPU (inline)
*
* This routine re-enables interrupts on the CPU. The @a key parameter is an
* architecture-dependent lock-out key that is returned by a previous
* invocation of irq_lock().
*
* This routine can be called from either interrupt or thread level.
*
* @param key architecture-dependent lock-out key
*
* @return N/A
*
* On Cortex-M0/M0+, this enables all interrupts if they were not
/* On Cortex-M0/M0+, this enables all interrupts if they were not
* previously disabled.
*
*/
static ALWAYS_INLINE void z_arch_irq_unlock(unsigned int key)
@ -148,10 +100,6 @@ static ALWAYS_INLINE void z_arch_irq_unlock(unsigned int key)
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
}
/**
* Returns true if interrupts were unlocked prior to the
* z_arch_irq_lock() call that produced the key argument.
*/
static ALWAYS_INLINE bool z_arch_irq_unlocked(unsigned int key)
{
/* This convention works for both PRIMASK and BASEPRI */

20
include/arch/arm/irq.h
View file

@ -66,10 +66,7 @@ extern void z_arm_irq_priority_set(unsigned int irq, unsigned int prio,
#endif
/**
* Configure a static interrupt.
*
* All arguments must be computable by the compiler at build time.
/* All arguments must be computable by the compiler at build time.
*
* Z_ISR_DECLARE will populate the .intList section with the interrupt's
* parameters, which will then be used by gen_irq_tables.py to create
@ -78,14 +75,6 @@ extern void z_arm_irq_priority_set(unsigned int irq, unsigned int prio,
*
* We additionally set the priority in the interrupt controller at
* runtime.
*
* @param irq_p IRQ line number
* @param priority_p Interrupt priority
* @param isr_p Interrupt service routine
* @param isr_param_p ISR parameter
* @param flags_p IRQ options
*
* @return The vector assigned to this interrupt
*/
#define Z_ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
({ \
@ -94,13 +83,6 @@ extern void z_arm_irq_priority_set(unsigned int irq, unsigned int prio,
irq_p; \
})
/**
* Configure a 'direct' static interrupt.
*
* See include/irq.h for details.
* All arguments must be computable at build time.
*/
#define Z_ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \
({ \
Z_ISR_DECLARE(irq_p, ISR_FLAG_DIRECT, isr_p, NULL); \

3
include/arch/arm/misc.h
View file

@ -26,9 +26,6 @@ static inline u32_t z_arch_k_cycle_get_32(void)
return z_timer_cycle_get_32();
}
/**
* @brief Explicitly nop operation.
*/
static ALWAYS_INLINE void z_arch_nop(void)
{
__asm__ volatile("nop");

34
include/arch/nios2/arch.h
View file

@ -33,33 +33,8 @@
extern "C" {
#endif
/**
* Configure a static interrupt.
*
* All arguments must be computable by the compiler at build time.
*
* Internally this function does a few things:
*
* 1. The enum statement has no effect but forces the compiler to only
* accept constant values for the irq_p parameter, very important as the
* numerical IRQ line is used to create a named section.
*
* 2. An instance of struct _isr_table_entry is created containing the ISR and
* its parameter. If you look at how _sw_isr_table is created, each entry in
* the array is in its own section named by the IRQ line number. What we are
* doing here is to override one of the default entries (which points to the
* spurious IRQ handler) with what was supplied here.
*
* There is no notion of priority with the Nios II internal interrupt
/* There is no notion of priority with the Nios II internal interrupt
* controller and no flags are currently supported.
*
* @param irq_p IRQ line number
* @param priority_p Interrupt priority (ignored)
* @param isr_p Interrupt service routine
* @param isr_param_p ISR parameter
* @param flags_p IRQ triggering options (currently unused)
*
* @return The vector assigned to this interrupt
*/
#define Z_ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
({ \
@ -116,10 +91,6 @@ static ALWAYS_INLINE void z_arch_irq_unlock(unsigned int key)
#endif
}
/**
* Returns true if interrupts were unlocked prior to the
* z_arch_irq_lock() call that produced the key argument.
*/
static ALWAYS_INLINE bool z_arch_irq_unlocked(unsigned int key)
{
return key & 1;
@ -205,9 +176,6 @@ static inline u32_t z_arch_k_cycle_get_32(void)
return z_timer_cycle_get_32();
}
/**
* @brief Explicitly nop operation.
*/
static ALWAYS_INLINE void z_arch_nop(void)
{
__asm__ volatile("nop");

3
include/arch/posix/arch.h
View file

@ -51,9 +51,6 @@ static inline u32_t z_arch_k_cycle_get_32(void)
return z_timer_cycle_get_32();
}
/**
* @brief Explicitly nop operation.
*/
static ALWAYS_INLINE void z_arch_nop(void)
{
__asm__ volatile("nop");

22
include/arch/riscv/arch.h
View file

@ -69,20 +69,6 @@ int z_arch_irq_is_enabled(unsigned int irq);
void z_arch_irq_priority_set(unsigned int irq, unsigned int prio);
void z_irq_spurious(void *unused);
/**
* Configure a static interrupt.
*
* All arguments must be computable by the compiler at build time.
*
* @param irq_p IRQ line number
* @param priority_p Interrupt priority
* @param isr_p Interrupt service routine
* @param isr_param_p ISR parameter
* @param flags_p IRQ options
*
* @return The vector assigned to this interrupt
*/
#if defined(CONFIG_RISCV_HAS_PLIC)
#define Z_ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
({ \
@ -130,10 +116,6 @@ static ALWAYS_INLINE void z_arch_irq_unlock(unsigned int key)
: "memory");
}
/**
* Returns true if interrupts were unlocked prior to the
* z_arch_irq_lock() call that produced the key argument.
*/
static ALWAYS_INLINE bool z_arch_irq_unlocked(unsigned int key)
{
/* FIXME: looking at z_arch_irq_lock, this should be reducable
@ -146,15 +128,11 @@ static ALWAYS_INLINE bool z_arch_irq_unlocked(unsigned int key)
return (key & SOC_MSTATUS_IEN) == SOC_MSTATUS_IEN;
}
/**
* @brief Explicitly nop operation.
*/
static ALWAYS_INLINE void z_arch_nop(void)
{
__asm__ volatile("nop");
}
extern u32_t z_timer_cycle_get_32(void);
static inline u32_t z_arch_k_cycle_get_32(void)

4
include/arch/x86/arch.h
View file

@ -217,10 +217,6 @@ static inline u32_t z_arch_k_cycle_get_32(void)
return z_timer_cycle_get_32();
}
/**
* Returns true if interrupts were unlocked prior to the
* z_arch_irq_lock() call that produced the key argument.
*/
static ALWAYS_INLINE bool z_arch_irq_unlocked(unsigned int key)
{
return (key & 0x200) != 0;

52
include/arch/x86/ia32/arch.h
View file

@ -168,12 +168,7 @@ typedef struct s_isrList {
*/
#define _VECTOR_ARG(irq_p) (-1)
/**
* Configure a static interrupt.
*
* All arguments must be computable by the compiler at build time.
*
* Internally this function does a few things:
/* Internally this function does a few things:
*
* 1. There is a declaration of the interrupt parameters in the .intList
* section, used by gen_idt to create the IDT. This does the same thing
@ -190,14 +185,6 @@ typedef struct s_isrList {
*
* 4. z_irq_controller_irq_config() is called at runtime to set the mapping
* between the vector and the IRQ line as well as triggering flags
*
* @param irq_p IRQ line number
* @param priority_p Interrupt priority
* @param isr_p Interrupt service routine
* @param isr_param_p ISR parameter
* @param flags_p IRQ triggering options, as defined in sysapic.h
*
* @return The vector assigned to this interrupt
*/
#define Z_ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
({ \
@ -228,11 +215,6 @@ typedef struct s_isrList {
Z_IRQ_TO_INTERRUPT_VECTOR(irq_p); \
})
/** Configure a 'direct' static interrupt
*
* All arguments must be computable by the compiler at build time
*
*/
#define Z_ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \
({ \
NANO_CPU_INT_REGISTER(isr_p, irq_p, priority_p, -1, 0); \
@ -307,38 +289,6 @@ struct _x86_syscall_stack_frame {
u32_t ss;
};
/**
* @brief Disable all interrupts on the CPU (inline)
*
* This routine disables interrupts. It can be called from either interrupt
* or thread level. This routine returns an architecture-dependent
* lock-out key representing the "interrupt disable state" prior to the call;
* this key can be passed to irq_unlock() to re-enable interrupts.
*
* The lock-out key should only be used as the argument to the irq_unlock()
* API. It should never be used to manually re-enable interrupts or to inspect
* or manipulate the contents of the source register.
*
* This function can be called recursively: it will return a key to return the
* state of interrupt locking to the previous level.
*
* WARNINGS
* Invoking a kernel routine with interrupts locked may result in
* interrupts being re-enabled for an unspecified period of time. If the
* called routine blocks, interrupts will be re-enabled while another
* thread executes, or while the system is idle.
*
* The "interrupt disable state" is an attribute of a thread. Thus, if a
* thread disables interrupts and subsequently invokes a kernel
* routine that causes the calling thread to block, the interrupt
* disable state will be restored when the thread is later rescheduled
* for execution.
*
* @return An architecture-dependent lock-out key representing the
* "interrupt disable state" prior to the call.
*
*/
static ALWAYS_INLINE unsigned int z_arch_irq_lock(void)
{
unsigned int key;

33
include/arch/xtensa/arch.h
View file

@ -39,36 +39,6 @@ extern "C" {
/* internal routine documented in C file, needed by IRQ_CONNECT() macro */
extern void z_irq_priority_set(u32_t irq, u32_t prio, u32_t flags);
/**
* Configure a static interrupt.
*
* All arguments must be computable by the compiler at build time; if this
* can't be done use irq_connect_dynamic() instead.
*
* Internally this function does a few things:
*
* 1. The enum statement has no effect but forces the compiler to only
* accept constant values for the irq_p parameter, very important as the
* numerical IRQ line is used to create a named section.
*
* 2. An instance of _isr_table_entry is created containing the ISR and its
* parameter. If you look at how _sw_isr_table is created, each entry in the
* array is in its own section named by the IRQ line number. What we are doing
* here is to override one of the default entries (which points to the
* spurious IRQ handler) with what was supplied here.
*
* 3. The priority level for the interrupt is configured by a call to
* z_irq_priority_set()
*
* @param irq_p IRQ line number
* @param priority_p Interrupt priority
* @param isr_p Interrupt service routine
* @param isr_param_p ISR parameter
* @param flags_p IRQ options
*
* @return The vector assigned to this interrupt
*/
#define Z_ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
({ \
Z_ISR_DECLARE(irq_p, flags_p, isr_p, isr_param_p); \
@ -87,9 +57,6 @@ static inline u32_t z_arch_k_cycle_get_32(void)
return z_timer_cycle_get_32();
}
/**
* @brief Explicitly nop operation.
*/
static ALWAYS_INLINE void z_arch_nop(void)
{
__asm__ volatile("nop");

23
include/arch/xtensa/irq.h
View file

@ -47,30 +47,11 @@
#endif
/**
*
* @brief Enable an interrupt line
*
* Clear possible pending interrupts on the line, and enable the interrupt
* line. After this call, the CPU will receive interrupts for the specified
* IRQ.
*
* @return N/A
*/
static ALWAYS_INLINE void z_xtensa_irq_enable(u32_t irq)
{
z_xt_ints_on(1 << irq);
}
/**
*
* @brief Disable an interrupt line
*
* Disable an interrupt line. After this call, the CPU will stop receiving
* interrupts for the specified IRQ.
*
* @return N/A
*/
static ALWAYS_INLINE void z_xtensa_irq_disable(u32_t irq)
{
z_xt_ints_off(1 << irq);
@ -87,10 +68,6 @@ static ALWAYS_INLINE void z_arch_irq_unlock(unsigned int key)
XTOS_RESTORE_INTLEVEL(key);
}
/**
* Returns true if interrupts were unlocked prior to the
* z_arch_irq_lock() call that produced the key argument.
*/
static ALWAYS_INLINE bool z_arch_irq_unlocked(unsigned int key)
{
return (key & 0xf) == 0; /* INTLEVEL field */