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soc: nxp_imx: rt: enable ethernet ref clock output

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Enable soc ethernet ref clock output at the SOC level instead of board
level, since it is required for all iMX.RT SOCs

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2022-03-23 09:41:42 -05:00 • committed by David Leach
commit 8fd1b54a82
2 changed files with 10 additions and 0 deletions
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7
soc/arm/nxp_imx/rt/soc_rt10xx.c
View file

@ -15,6 +15,7 @@
#include <arch/arm/aarch32/cortex_m/cmsis.h>
#include <fsl_flexspi_nor_boot.h>
#include <dt-bindings/clock/imx_ccm.h>
#include <fsl_iomuxc.h>
#if CONFIG_USB_DC_NXP_EHCI
#include "usb_phy.h"
#include "usb_dc_mcux.h"
@ -164,6 +165,12 @@ static ALWAYS_INLINE void clock_init(void)
CLOCK_SetDiv(kCLOCK_LcdifDiv, 1);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(enet), okay) && CONFIG_NET_L2_ETHERNET
/* Enable clock output for ENET1 */
IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1TxClkOutputDir, true);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usb1), okay) && CONFIG_USB_DC_NXP_EHCI
CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usb480M,
DT_PROP_BY_PHANDLE(DT_NODELABEL(usb1), clocks, clock_frequency));

3
soc/arm/nxp_imx/rt/soc_rt11xx.c
View file

@ -372,6 +372,9 @@ static ALWAYS_INLINE void clock_init(void)
rootCfg.mux = kCLOCK_ENET1_ClockRoot_MuxSysPll1Div2;
rootCfg.div = 10;
CLOCK_SetRootClock(kCLOCK_Root_Enet1, &rootCfg);
/* Set ENET_REF_CLK as an output driven by ENET1_CLK_ROOT */
IOMUXC_GPR->GPR4 |= (IOMUXC_GPR_GPR4_ENET_REF_CLK_DIR(0x01U) |
IOMUXC_GPR_GPR4_ENET_TX_CLK_SEL(0x1U));
#endif
#ifdef CONFIG_PTP_CLOCK_MCUX