From 8fc76f1b6d16e94a93c26f55c21be1fc2cc8ea39 Mon Sep 17 00:00:00 2001 From: Kai Vehmanen Date: Thu, 23 May 2024 12:09:20 +0300 Subject: [PATCH] soc: intel_adsp: tools: improve FW boot handling on ace1.x Starting with ace1.x, the boot status is no longer reported by the boot ROM in the SRAM status window as it was done in older platforms. The current cavstool.py code works on these newer platforms, as Zephyr soc bootcode writes to same location, but this is not the recommended boot flow. Modify boot flow to use a dedicated register to observe boot state. This change improves usability of cavstool.py on ace1.x platforms as: - it is possible to start cavstool.py (e.g. in log-only or shell mode) while DSP has been already been booted, but is currently in low-power mode (and SRAM window is not accessible from host) - more reliable boot and better error reporting as actual ROM status is observed Furthermore, this change allows to remove the memory window writes from Zephyr intel_adsp boot_complete(). This IPC interface is application and IPC revision specific and the write should not be done in generic Zephyr SoC code. However, to keep cavstool.py working, the tool has to be updated first. Signed-off-by: Kai Vehmanen --- soc/intel/intel_adsp/tools/cavstool.py | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/soc/intel/intel_adsp/tools/cavstool.py b/soc/intel/intel_adsp/tools/cavstool.py index 3b82d5bf336..b10cfa135fc 100755 --- a/soc/intel/intel_adsp/tools/cavstool.py +++ b/soc/intel/intel_adsp/tools/cavstool.py @@ -281,6 +281,7 @@ def map_regs(): dsp.HFIPCXCTL = 0x73228 dsp.HFIPCXTDDY = 0x73300 dsp.HFIPCXIDDY = 0x73380 + dsp.ROM_STATUS = 0x163200 dsp.SRAM_FW_STATUS = WINDOW_BASE_ACE else: dsp.ADSPCS = 0x00004 @@ -290,7 +291,8 @@ def map_regs(): dsp.HIPCIDR = 0x00048 if cavs15 else 0x000d0 dsp.HIPCIDA = 0x000d4 # 1.8+ only dsp.HIPCIDD = 0x0004c if cavs15 else 0x000d8 - dsp.SRAM_FW_STATUS = WINDOW_BASE # Start of first SRAM window + dsp.ROM_STATUS = WINDOW_BASE # Start of first SRAM window + dsp.SRAM_FW_STATUS = WINDOW_BASE dsp.freeze() return (hda, sd, dsp, hda_ostream_id) @@ -600,7 +602,7 @@ def load_firmware_ace(fw_file): log.info("ACK IPC") dsp.HFIPCXIDA |= (1 << 31) - log.info(f"Starting DMA, FW_STATUS = 0x{dsp.SRAM_FW_STATUS:x}") + log.info(f"Starting DMA, FW_STATUS = 0x{dsp.ROM_STATUS:x}") sd.CTL |= 2 # START flag wait_fw_entered() @@ -618,12 +620,12 @@ def load_firmware_ace(fw_file): log.info(f"ACE firmware load complete") def fw_is_alive(): - return dsp.SRAM_FW_STATUS & ((1 << 28) - 1) == 5 # "FW_ENTERED" + return dsp.ROM_STATUS & ((1 << 28) - 1) == 5 # "FW_ENTERED" def wait_fw_entered(timeout_s=2): - log.info("Waiting %s for firmware handoff, FW_STATUS = 0x%x", + log.info("Waiting %s for firmware handoff, ROM_STATUS = 0x%x", "forever" if timeout_s is None else f"{timeout_s} seconds", - dsp.SRAM_FW_STATUS) + dsp.ROM_STATUS) hertz = 100 attempts = None if timeout_s is None else timeout_s * hertz while True: @@ -637,9 +639,9 @@ def wait_fw_entered(timeout_s=2): time.sleep(1 / hertz) if not alive: - log.warning("Load failed? FW_STATUS = 0x%x", dsp.SRAM_FW_STATUS) + log.warning("Load failed? ROM_STATUS = 0x%x", dsp.ROM_STATUS) else: - log.info("FW alive, FW_STATUS = 0x%x", dsp.SRAM_FW_STATUS) + log.info("FW alive, ROM_STATUS = 0x%x", dsp.ROM_STATUS) def winstream_offset(): ( base, stride ) = adsp_mem_window_config()