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linker: cc13x2_cc26x2: CCFG registers as partition

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Define the FLASH_CCFG memory region from a devicetree partition instead
of from math in the linker file. Removing the special math case results
in the FLASH_CCFG region overlapping the FLASH region, but the linker
accepts this until the FLASH region actually starts placing variables
in the FLASH_CCFG region.

As a result, applications that don't fit in (FLASH_SIZE - 88) bytes will
still fail to link, just with an overlapping memory region error instead
of an overflow error.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This commit is contained in:
Jordan Yates 2021-04-10 15:42:15 +10:00 • committed by Carles Cufí
commit 8fb37b94fd
3 changed files with 26 additions and 10 deletions
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12
dts/arm/ti/cc1352r.dtsi
View file

@ -14,5 +14,17 @@
flash0: serial-flash@0 { flash0: serial-flash@0 {
reg = <0x0 DT_SIZE_K(352)>; reg = <0x0 DT_SIZE_K(352)>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* CCFG registers occupy the last 88 bytes of flash */
ti_ccfg_partition: partition@57fa8 {
label = "ti_ccfg";
reg = <0x57fa8 88>;
};
};
}; };
}; };

12
dts/arm/ti/cc2652r.dtsi
View file

@ -14,5 +14,17 @@
flash0: serial-flash@0 { flash0: serial-flash@0 {
reg = <0x0 DT_SIZE_K(352)>; reg = <0x0 DT_SIZE_K(352)>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* CCFG registers occupy the last 88 bytes of flash */
ti_ccfg_partition: partition@57fa8 {
label = "ti_ccfg";
reg = <0x57fa8 88>;
};
};
}; };
}; };

12
include/arch/arm/aarch32/cortex_m/scripts/linker.ld
View file

@ -40,18 +40,11 @@
#define ROM_ADDR (CONFIG_FLASH_BASE_ADDRESS + CONFIG_FLASH_LOAD_OFFSET) #define ROM_ADDR (CONFIG_FLASH_BASE_ADDRESS + CONFIG_FLASH_LOAD_OFFSET)
#endif #endif
#ifdef CONFIG_HAS_TI_CCFG
#define CCFG_SIZE 88
#define ROM_SIZE (CONFIG_FLASH_SIZE*1K - CONFIG_FLASH_LOAD_OFFSET - \
CCFG_SIZE)
#define CCFG_ADDR (ROM_ADDR + ROM_SIZE)
#else
#if CONFIG_FLASH_LOAD_SIZE > 0 #if CONFIG_FLASH_LOAD_SIZE > 0
#define ROM_SIZE CONFIG_FLASH_LOAD_SIZE #define ROM_SIZE CONFIG_FLASH_LOAD_SIZE
#else #else
#define ROM_SIZE (CONFIG_FLASH_SIZE*1K - CONFIG_FLASH_LOAD_OFFSET) #define ROM_SIZE (CONFIG_FLASH_SIZE*1K - CONFIG_FLASH_LOAD_OFFSET)
#endif #endif
#endif
#if defined(CONFIG_XIP) #if defined(CONFIG_XIP)
#if defined(CONFIG_IS_BOOTLOADER) #if defined(CONFIG_IS_BOOTLOADER)
@ -93,10 +86,9 @@ _region_min_align = 4;
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE
#ifdef CONFIG_HAS_TI_CCFG
FLASH_CCFG (rwx): ORIGIN = CCFG_ADDR, LENGTH = CCFG_SIZE
#endif
SRAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE SRAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE
/* TI CCFG Registers */
DT_REGION_FROM_NODE_STATUS_OKAY(FLASH_CCFG, rwx, DT_NODELABEL(ti_ccfg_partition))
/* Data & Instruction Tightly Coupled Memory */ /* Data & Instruction Tightly Coupled Memory */
DT_REGION_FROM_NODE_STATUS_OKAY(ITCM, rw, DT_CHOSEN(zephyr_itcm)) DT_REGION_FROM_NODE_STATUS_OKAY(ITCM, rw, DT_CHOSEN(zephyr_itcm))
DT_REGION_FROM_NODE_STATUS_OKAY(DTCM, rw, DT_CHOSEN(zephyr_dtcm)) DT_REGION_FROM_NODE_STATUS_OKAY(DTCM, rw, DT_CHOSEN(zephyr_dtcm))