From 8f65bdabab28eab7433f970e6bb9e8828303fedb Mon Sep 17 00:00:00 2001 From: Mulin Chao Date: Mon, 21 Feb 2022 18:53:28 -0800 Subject: [PATCH] drivers: pwm: add pinctrl driver support Replace soc-specific pin functions with Zephyr pinctrl api functions for pin-mux configuration in pwm driver. Signed-off-by: Mulin Chao --- .../npcx7m6fb_evb/npcx7m6fb_evb-pinctrl.dtsi | 4 +++ boards/arm/npcx7m6fb_evb/npcx7m6fb_evb.dts | 3 ++- .../npcx9m6f_evb/npcx9m6f_evb-pinctrl.dtsi | 4 +++ boards/arm/npcx9m6f_evb/npcx9m6f_evb.dts | 3 ++- drivers/pwm/pwm_npcx.c | 26 +++++++------------ dts/arm/nuvoton/npcx.dtsi | 8 ------ dts/bindings/pwm/nuvoton,npcx-pwm.yaml | 6 ++--- 7 files changed, 24 insertions(+), 30 deletions(-) diff --git a/boards/arm/npcx7m6fb_evb/npcx7m6fb_evb-pinctrl.dtsi b/boards/arm/npcx7m6fb_evb/npcx7m6fb_evb-pinctrl.dtsi index 94636234dd0..489901976d2 100644 --- a/boards/arm/npcx7m6fb_evb/npcx7m6fb_evb-pinctrl.dtsi +++ b/boards/arm/npcx7m6fb_evb/npcx7m6fb_evb-pinctrl.dtsi @@ -10,3 +10,7 @@ bias-pull-up; /* Enable internal pull-up for i2c0_0 */ pinmux-locked; /* Lock pinmuxing */ }; + +&pwm6_gpc0 { + drive-open-drain; +}; diff --git a/boards/arm/npcx7m6fb_evb/npcx7m6fb_evb.dts b/boards/arm/npcx7m6fb_evb/npcx7m6fb_evb.dts index 95782266391..15c5bf8dfbb 100644 --- a/boards/arm/npcx7m6fb_evb/npcx7m6fb_evb.dts +++ b/boards/arm/npcx7m6fb_evb/npcx7m6fb_evb.dts @@ -76,8 +76,9 @@ }; &pwm6 { - drive-open-drain; status = "okay"; + pinctrl-0 = <&pwm6_gpc0>; + pinctrl-names = "default"; }; &adc0 { diff --git a/boards/arm/npcx9m6f_evb/npcx9m6f_evb-pinctrl.dtsi b/boards/arm/npcx9m6f_evb/npcx9m6f_evb-pinctrl.dtsi index 33a315ef2a3..6b59184941a 100644 --- a/boards/arm/npcx9m6f_evb/npcx9m6f_evb-pinctrl.dtsi +++ b/boards/arm/npcx9m6f_evb/npcx9m6f_evb-pinctrl.dtsi @@ -10,3 +10,7 @@ bias-pull-up; /* Enable internal pull-up for i2c0_0 */ pinmux-locked; /* Lock pinmuxing */ }; + +&pwm6_gpc0 { + drive-open-drain; +}; diff --git a/boards/arm/npcx9m6f_evb/npcx9m6f_evb.dts b/boards/arm/npcx9m6f_evb/npcx9m6f_evb.dts index 97fd8fc5c42..c7d1badc218 100644 --- a/boards/arm/npcx9m6f_evb/npcx9m6f_evb.dts +++ b/boards/arm/npcx9m6f_evb/npcx9m6f_evb.dts @@ -89,8 +89,9 @@ }; &pwm6 { - drive-open-drain; status = "okay"; + pinctrl-0 = <&pwm6_gpc0>; + pinctrl-names = "default"; }; &adc0 { diff --git a/drivers/pwm/pwm_npcx.c b/drivers/pwm/pwm_npcx.c index 1d1688faa7d..5c8abb1b88c 100644 --- a/drivers/pwm/pwm_npcx.c +++ b/drivers/pwm/pwm_npcx.c @@ -7,6 +7,7 @@ #define DT_DRV_COMPAT nuvoton_npcx_pwm #include +#include #include #include #include @@ -38,11 +39,8 @@ struct pwm_npcx_config { uintptr_t base; /* clock configuration */ struct npcx_clk_cfg clk_cfg; - /* Output buffer - open drain */ - const bool is_od; /* pinmux configuration */ - const uint8_t alts_size; - const struct npcx_alt *alts_list; + const struct pinctrl_dev_config *pcfg; }; /* Driver data */ @@ -57,7 +55,6 @@ struct pwm_npcx_data { /* PWM local functions */ static void pwm_npcx_configure(const struct device *dev, int clk_bus) { - const struct pwm_npcx_config *const config = dev->config; struct pwm_reg *const inst = HAL_INSTANCE(dev); /* Disable PWM for module configuration first */ @@ -79,12 +76,6 @@ static void pwm_npcx_configure(const struct device *dev, int clk_bus) inst->PWMCTL |= BIT(NPCX_PWMCTL_CKSEL); else inst->PWMCTL &= ~BIT(NPCX_PWMCTL_CKSEL); - - /* Select output buffer type of io pad */ - if (config->is_od) - inst->PWMCTLEX |= BIT(NPCX_PWMCTLEX_OD_OUT); - else - inst->PWMCTLEX &= ~BIT(NPCX_PWMCTLEX_OD_OUT); } /* PWM api functions */ @@ -212,21 +203,22 @@ static int pwm_npcx_init(const struct device *dev) pwm_npcx_configure(dev, config->clk_cfg.bus); /* Configure pin-mux for PWM device */ - npcx_pinctrl_mux_configure(config->alts_list, config->alts_size, 1); + ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); + if (ret < 0) { + LOG_ERR("PWM pinctrl setup failed (%d)", ret); + return ret; + } return 0; } #define NPCX_PWM_INIT(inst) \ - static const struct npcx_alt pwm_alts##inst[] = \ - NPCX_DT_ALT_ITEMS_LIST(inst); \ + PINCTRL_DT_INST_DEFINE(inst); \ \ static const struct pwm_npcx_config pwm_npcx_cfg_##inst = { \ .base = DT_INST_REG_ADDR(inst), \ .clk_cfg = NPCX_DT_CLK_CFG_ITEM(inst), \ - .is_od = DT_INST_PROP(inst, drive_open_drain), \ - .alts_size = ARRAY_SIZE(pwm_alts##inst), \ - .alts_list = pwm_alts##inst, \ + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \ }; \ \ static struct pwm_npcx_data pwm_npcx_data_##inst; \ diff --git a/dts/arm/nuvoton/npcx.dtsi b/dts/arm/nuvoton/npcx.dtsi index 5051ac3dc6f..a1edb625891 100644 --- a/dts/arm/nuvoton/npcx.dtsi +++ b/dts/arm/nuvoton/npcx.dtsi @@ -294,7 +294,6 @@ compatible = "nuvoton,npcx-pwm"; reg = <0x40080000 0x2000>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 0>; - pinctrl-0 = <&alt4_pwm0_sl>; /* PINC3 */ #pwm-cells = <3>; status = "disabled"; label = "PWM_0"; @@ -304,7 +303,6 @@ compatible = "nuvoton,npcx-pwm"; reg = <0x40082000 0x2000>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 1>; - pinctrl-0 = <&alt4_pwm1_sl>; /* PINC2 */ #pwm-cells = <3>; status = "disabled"; label = "PWM_1"; @@ -314,7 +312,6 @@ compatible = "nuvoton,npcx-pwm"; reg = <0x40084000 0x2000>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 2>; - pinctrl-0 = <&alt4_pwm2_sl>; /* PINC4 */ #pwm-cells = <3>; status = "disabled"; label = "PWM_2"; @@ -324,7 +321,6 @@ compatible = "nuvoton,npcx-pwm"; reg = <0x40086000 0x2000>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 3>; - pinctrl-0 = <&alt4_pwm3_sl>; /* PIN80 */ #pwm-cells = <3>; status = "disabled"; label = "PWM_3"; @@ -334,7 +330,6 @@ compatible = "nuvoton,npcx-pwm"; reg = <0x40088000 0x2000>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 4>; - pinctrl-0 = <&alt4_pwm4_sl>; /* PINB6 */ #pwm-cells = <3>; status = "disabled"; label = "PWM_4"; @@ -344,7 +339,6 @@ compatible = "nuvoton,npcx-pwm"; reg = <0x4008a000 0x2000>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 5>; - pinctrl-0 = <&alt4_pwm5_sl>; /* PINB7 */ #pwm-cells = <3>; status = "disabled"; label = "PWM_5"; @@ -354,7 +348,6 @@ compatible = "nuvoton,npcx-pwm"; reg = <0x4008c000 0x2000>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 6>; - pinctrl-0 = <&alt4_pwm6_sl>; /* PINC0 */ #pwm-cells = <3>; status = "disabled"; label = "PWM_6"; @@ -364,7 +357,6 @@ compatible = "nuvoton,npcx-pwm"; reg = <0x4008e000 0x2000>; clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL2 7>; - pinctrl-0 = <&alt4_pwm7_sl>; /* PIN60 */ #pwm-cells = <3>; status = "disabled"; label = "PWM_7"; diff --git a/dts/bindings/pwm/nuvoton,npcx-pwm.yaml b/dts/bindings/pwm/nuvoton,npcx-pwm.yaml index acc4fbafffa..20df277d596 100644 --- a/dts/bindings/pwm/nuvoton,npcx-pwm.yaml +++ b/dts/bindings/pwm/nuvoton,npcx-pwm.yaml @@ -5,7 +5,7 @@ description: Nuvoton, NPCX Pulse Width Modulator (PWM) node compatible: "nuvoton,npcx-pwm" -include: [pwm-controller.yaml, base.yaml] +include: [pwm-controller.yaml, base.yaml, pinctrl-device.yaml] properties: reg: @@ -15,9 +15,9 @@ properties: label: required: true pinctrl-0: - type: phandles required: true - description: configurations of pinmux controllers + pinctrl-names: + required: true drive-open-drain: type: boolean description: |