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ite: drivers/adc: create pinmux phandle to the ADC driver node

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Create the pinmux phandle to the ADC driver node in the
devicetree. When the pinmux_pin_set function in
adc_it8xxx2_channel_setup can refer to the setting of
this phandle. It is more flexible to use.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This commit is contained in:
Tim Lin 2021-05-20 11:09:39 +08:00 • committed by Carles Cufí
commit 8ea58d4389
11 changed files with 131 additions and 13 deletions
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1
boards/riscv/it8xxx2_evb/it8xxx2_evb.dts
View file

@ -6,6 +6,7 @@
/dts-v1/;
#include <it8xxx2.dtsi>
#include <it8xxx2-alts-map.dtsi>
/ {
model = "IT8XXX2 EV-Board";

2
boards/riscv/it8xxx2_evb/pinmux.c
View file

@ -7,7 +7,7 @@
#include <init.h>
#include <drivers/pinmux.h>
#include <soc.h>
#include <dt-bindings/pinctrl/it8xxx2-pinctrl.h>
static int it8xxx2_evb_pinmux_init(const struct device *dev)
{

42
drivers/adc/adc_ite_it8xxx2.c
View file

@ -15,12 +15,22 @@ LOG_MODULE_REGISTER(adc_ite_it8xxx2);
#include <soc.h>
#include <errno.h>
#include <assert.h>
#include <dt-bindings/pinctrl/it8xxx2-pinctrl.h>
#define ADC_CONTEXT_USES_KERNEL_TIMER
#include "adc_context.h"
#define DEV_DATA(dev) ((struct adc_it8xxx2_data * const)(dev)->data)
#define DEV_CFG(dev) ((struct adc_it8xxx2_cfg * const)(dev)->config)
#define DEV_PIN(adc_ch) DT_PHA(DT_PHANDLE_BY_IDX(DT_DRV_INST(0), \
pinctrl_0, adc_ch), pinctrls, pin)
#define DEV_ALT_FUNC(adc_ch) DT_PHA(DT_PHANDLE_BY_IDX(DT_DRV_INST(0), \
pinctrl_0, adc_ch), pinctrls, alt_func)
#define DEV_PINMUX(adc_ch) DEVICE_DT_GET(DT_PHANDLE_BY_IDX(DT_NODELABEL \
(pinctrl_adc##adc_ch), pinctrls, 0))
/* ADC internal reference voltage (Unit:mV) */
#define IT8XXX2_ADC_VREF_VOL 3000
/* ADC channels disabled */
@ -52,14 +62,26 @@ struct adc_it8xxx2_data {
uint16_t *repeat_buffer;
};
/*
* Strcture adc_it8xxx2_cfg is about the setting of adc
* this config will be used at initial time
*/
struct adc_it8xxx2_cfg {
/* Pinmux control group */
const struct device *pinctrls;
/* GPIO pin */
uint8_t pin;
/* Alternate function */
uint8_t alt_fun;
};
#define ADC_IT8XXX2_REG_BASE \
((struct adc_it8xxx2_regs *)(DT_INST_REG_ADDR(0)))
static int adc_it8xxx2_channel_setup(const struct device *dev,
const struct adc_channel_cfg *channel_cfg)
{
ARG_UNUSED(dev);
const struct device *porti = DEVICE_DT_GET(DT_NODELABEL(pinmuxi));
struct adc_it8xxx2_cfg *config = DEV_CFG(dev);
if (channel_cfg->acquisition_time != ADC_ACQ_TIME_DEFAULT) {
LOG_ERR("Selected ADC acquisition time is not valid");
@ -82,7 +104,9 @@ static int adc_it8xxx2_channel_setup(const struct device *dev,
}
/* The channel is set to ADC alternate function */
pinmux_pin_set(porti, channel_cfg->channel_id, IT8XXX2_PINMUX_FUNC_1);
pinmux_pin_set(config[channel_cfg->channel_id].pinctrls,
config[channel_cfg->channel_id].pin,
config[channel_cfg->channel_id].alt_fun);
LOG_DBG("Channel setup succeeded!");
return 0;
}
@ -310,9 +334,19 @@ static struct adc_it8xxx2_data adc_it8xxx2_data_0 = {
ADC_CONTEXT_INIT_LOCK(adc_it8xxx2_data_0, ctx),
ADC_CONTEXT_INIT_SYNC(adc_it8xxx2_data_0, ctx),
};
#define ITE_DT_ITEMS_BY_CH(adc_ch, _) \
{ \
.pin = DEV_PIN(adc_ch), \
.alt_fun = DEV_ALT_FUNC(adc_ch), \
.pinctrls = DEV_PINMUX(adc_ch), \
},
static const struct adc_it8xxx2_cfg adc_it8xxx2_cfg_0[CHIP_ADC_COUNT] = {
UTIL_LISTIFY(DT_INST_PROP_LEN(0, pinctrl_0), ITE_DT_ITEMS_BY_CH, _)
};
DEVICE_DT_INST_DEFINE(0, adc_it8xxx2_init,
NULL,
&adc_it8xxx2_data_0,
NULL, PRE_KERNEL_1,
&adc_it8xxx2_cfg_0, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&api_it8xxx2_driver_api);

1
drivers/pinmux/pinmux_ite_it8xxx2.c
View file

@ -12,6 +12,7 @@
#include <device.h>
#include <drivers/pinmux.h>
#include <soc.h>
#include <dt-bindings/pinctrl/it8xxx2-pinctrl.h>
#define DT_DRV_COMPAT ite_it8xxx2_pinmux

4
dts/bindings/adc/ite,it8xxx2-adc.yaml
View file

@ -10,3 +10,7 @@ include: adc-controller.yaml
properties:
interrupts:
required: true
pinctrl-0:
type: phandles
required: true

13
dts/bindings/pinctrl/ite,it8xxx2-pinctrl-conf.yaml Normal file
View file

@ -0,0 +1,13 @@
# Copyright (c) 2021 ITE Corporation. All Rights Reserved.
# SPDX-License-Identifier: Apache-2.0
description: ITE IT8XXX2 Pin-Mux Configuration
compatible: "ite,it8xxx2-pinctrl-conf"
child-binding:
description: ITE Pinmux configuration child node
properties:
pinctrls:
type: phandle-array
required: true
description: Pin alternate function selection

4
dts/bindings/pinctrl/ite,it8xxx2-pinmux.yaml
View file

@ -26,3 +26,7 @@ properties:
func4_en_mask:
type: array
required: true
pinctrl-cells:
- pin
- alt_func

40
dts/riscv/it8xxx2-alts-map.dtsi Normal file
View file

@ -0,0 +1,40 @@
/*
* Copyright (c) 2021 ITE Corporation. All Rights Reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/it8xxx2-pinctrl.h>
/ {
it8xxx2_alts_map {
compatible = "ite,it8xxx2-pinctrl-conf";
/* ADC alternate function */
pinctrl_adc0: adc0 {
pinctrls = <&pinmuxi 0 IT8XXX2_PINMUX_FUNC_1>;
};
pinctrl_adc1: adc1 {
pinctrls = <&pinmuxi 1 IT8XXX2_PINMUX_FUNC_1>;
};
pinctrl_adc2: adc2 {
pinctrls = <&pinmuxi 2 IT8XXX2_PINMUX_FUNC_1>;
};
pinctrl_adc3: adc3 {
pinctrls = <&pinmuxi 3 IT8XXX2_PINMUX_FUNC_1>;
};
pinctrl_adc4: adc4 {
pinctrls = <&pinmuxi 4 IT8XXX2_PINMUX_FUNC_1>;
};
pinctrl_adc5: adc5 {
pinctrls = <&pinmuxi 5 IT8XXX2_PINMUX_FUNC_1>;
};
pinctrl_adc6: adc6 {
pinctrls = <&pinmuxi 6 IT8XXX2_PINMUX_FUNC_1>;
};
pinctrl_adc7: adc7 {
pinctrls = <&pinmuxi 7 IT8XXX2_PINMUX_FUNC_1>;
};
};
};

22
dts/riscv/it8xxx2.dtsi
View file

@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-controller/ite-intc.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/pinctrl/it8xxx2-pinctrl.h>
#include "it8xxx2-alts-map.dtsi"
/ {
#address-cells = <1>;
@ -55,6 +56,7 @@
NO_FUNC NO_FUNC NO_FUNC NO_FUNC >;
func4_en_mask = <0 0 0 0
0 0 0 0 >;
#pinctrl-cells = <2>;
};
pinmuxb: pinmux@f01618 {
compatible = "ite,it8xxx2-pinmux";
@ -68,6 +70,7 @@
NO_FUNC NO_FUNC NO_FUNC 0xf016f1>;
func4_en_mask = <0 0 0 0
0 0 0 0x40 >;
#pinctrl-cells = <2>;
};
pinmuxc: pinmux@f01620 {
compatible = "ite,it8xxx2-pinmux";
@ -81,6 +84,7 @@
NO_FUNC NO_FUNC NO_FUNC 0xf016f6>;
func4_en_mask = <0 0 0 0
0 0 0 0x80 >;
#pinctrl-cells = <2>;
};
pinmuxd: pinmux@f01628 {
compatible = "ite,it8xxx2-pinmux";
@ -94,6 +98,7 @@
NO_FUNC NO_FUNC NO_FUNC NO_FUNC>;
func4_en_mask = <0 0 0 0
0 0 0 0 >;
#pinctrl-cells = <2>;
};
pinmuxe: pinmux@f01630 {
compatible = "ite,it8xxx2-pinmux";
@ -107,6 +112,7 @@
NO_FUNC NO_FUNC NO_FUNC NO_FUNC >;
func4_en_mask = <0x01 0 0 0
0 0 0 0 >;
#pinctrl-cells = <2>;
};
pinmuxf: pinmux@f01638 {
compatible = "ite,it8xxx2-pinmux";
@ -120,6 +126,7 @@
NO_FUNC NO_FUNC NO_FUNC NO_FUNC >;
func4_en_mask = <0 0 0x20 0x20
0 0 0 0 >;
#pinctrl-cells = <2>;
};
pinmuxg: pinmux@f01640 {
compatible = "ite,it8xxx2-pinmux";
@ -133,6 +140,7 @@
NO_FUNC NO_FUNC NO_FUNC NO_FUNC>;
func4_en_mask = <0 0 0 0
0 0 0 0 >;
#pinctrl-cells = <2>;
};
pinmuxh: pinmux@f01648 {
compatible = "ite,it8xxx2-pinmux";
@ -146,6 +154,7 @@
NO_FUNC NO_FUNC NO_FUNC NO_FUNC>;
func4_en_mask = <0 0x04 0x08 0
0 0 0 0 >;
#pinctrl-cells = <2>;
};
pinmuxi: pinmux@f01650 {
compatible = "ite,it8xxx2-pinmux";
@ -159,6 +168,7 @@
NO_FUNC NO_FUNC NO_FUNC NO_FUNC >;
func4_en_mask = <0 0 0 0
0 0 0 0 >;
#pinctrl-cells = <2>;
};
pinmuxj: pinmux@f01658 {
compatible = "ite,it8xxx2-pinmux";
@ -172,6 +182,7 @@
NO_FUNC NO_FUNC NO_FUNC NO_FUNC>;
func4_en_mask = <0 0 0 0
0 0 0 0 >;
#pinctrl-cells = <2>;
};
pinmuxk: pinmux@f01690 {
compatible = "ite,it8xxx2-pinmux";
@ -185,6 +196,7 @@
NO_FUNC NO_FUNC NO_FUNC NO_FUNC>;
func4_en_mask = <0 0 0 0
0 0 0 0 >;
#pinctrl-cells = <2>;
};
pinmuxl: pinmux@f01698 {
compatible = "ite,it8xxx2-pinmux";
@ -198,6 +210,7 @@
NO_FUNC NO_FUNC NO_FUNC NO_FUNC>;
func4_en_mask = <0 0 0 0
0 0 0 0 >;
#pinctrl-cells = <2>;
};
pinmuxm: pinmux@f016a0 {
compatible = "ite,it8xxx2-pinmux";
@ -211,6 +224,7 @@
NO_FUNC NO_FUNC NO_FUNC NO_FUNC>;
func4_en_mask = <0 0 0 0
0 0 0 0 >;
#pinctrl-cells = <2>;
};
sram0: memory@80100000 {
compatible = "mmio-sram";
@ -559,6 +573,14 @@
status = "disabled";
label = "ADC_0";
#io-channel-cells = <1>;
pinctrl-0 = <&pinctrl_adc0 /* ADC0*/
&pinctrl_adc1 /* ADC1*/
&pinctrl_adc2 /* ADC2*/
&pinctrl_adc3 /* ADC3*/
&pinctrl_adc4 /* ADC4*/
&pinctrl_adc5 /* ADC5*/
&pinctrl_adc6 /* ADC6*/
&pinctrl_adc7>; /* ADC7*/
};
i2c0: i2c@f01c40 {
compatible = "ite,it8xxx2-i2c";

7
include/dt-bindings/pinctrl/it8xxx2-pinctrl.h
View file

@ -8,4 +8,11 @@
#define NO_FUNC 0
/* PINMUX config */
#define IT8XXX2_PINMUX_FUNC_1 0
#define IT8XXX2_PINMUX_FUNC_2 1
#define IT8XXX2_PINMUX_FUNC_3 2
#define IT8XXX2_PINMUX_FUNC_4 3
#define IT8XXX2_PINMUX_PINS 8
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_IT8XXX2_PINCTRL_H_ */

8
soc/riscv/riscv-ite/it8xxx2/soc.h
View file

@ -20,12 +20,4 @@
#define ite_read(reg, reg_size) \
(*((volatile unsigned char *)(reg)))
/* PINMUX config */
#define IT8XXX2_PINMUX_FUNC_1 PINMUX_FUNC_A
#define IT8XXX2_PINMUX_FUNC_2 PINMUX_FUNC_B
#define IT8XXX2_PINMUX_FUNC_3 PINMUX_FUNC_C
#define IT8XXX2_PINMUX_FUNC_4 PINMUX_FUNC_D
#define IT8XXX2_PINMUX_PINS 8
#endif /* __RISCV_ITE_SOC_H_ */