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arch: introduce config DCLS

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Some processors support Dual-redundant Core Lock-step
DCLS) topology but the processor still can be ran in
split-lock mode (by default or changed at flash time).
So, introduce config DCLS that is enabled by default if
config CPU_HAS_DCLS is set, it should be disabled if
processor is used in split-lock mode.

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
This commit is contained in:
Dat Nguyen Duy 2022-06-18 23:09:49 +07:00 • committed by Stephanos Ioannidis
commit 8e55e59c59
3 changed files with 14 additions and 4 deletions
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12
arch/Kconfig
View file

@ -591,7 +591,7 @@ config CPU_HAS_TEE
config CPU_HAS_DCLS config CPU_HAS_DCLS
bool bool
help help
This option is enabled when the processor hardware is configured in This option is enabled when the processor hardware has support for
Dual-redundant Core Lock-step (DCLS) topology. Dual-redundant Core Lock-step (DCLS) topology.
config CPU_HAS_FPU config CPU_HAS_FPU
@ -652,6 +652,16 @@ config ARCH_MAPS_ALL_RAM
this mapping at all; non-kernel pages will be considered free (unless marked this mapping at all; non-kernel pages will be considered free (unless marked
as reserved) and Z_PAGE_FRAME_MAPPED will not be set. as reserved) and Z_PAGE_FRAME_MAPPED will not be set.
config DCLS
bool "Processor is configured in DCLS mode"
depends on CPU_HAS_DCLS
default y
help
This option is enabled when the processor hardware is configured in
Dual-redundant Core Lock-step (DCLS) topology. For the processor that
supports DCLS, but is configured in split-lock mode (by default or
changed at flash time), this option should be disabled.
menuconfig MPU menuconfig MPU
bool "MPU features" bool "MPU features"
depends on CPU_HAS_MPU depends on CPU_HAS_MPU

4
arch/arm/core/aarch32/cortex_a_r/reset.S
View file

@ -76,7 +76,7 @@ SECTION_SUBSEC_FUNC(TEXT, _reset_section, __start)
EL1_Reset_Handler: EL1_Reset_Handler:
#endif #endif
#if defined(CONFIG_CPU_HAS_DCLS) #if defined(CONFIG_DCLS)
/* /*
* Initialise CPU registers to a defined state if the processor is * Initialise CPU registers to a defined state if the processor is
* configured as Dual-redundant Core Lock-step (DCLS). This is required * configured as Dual-redundant Core Lock-step (DCLS). This is required
@ -194,7 +194,7 @@ EL1_Reset_Handler:
vmsr fpexc, r1 vmsr fpexc, r1
#endif /* CONFIG_FPU && CONFIG_CPU_HAS_VFP */ #endif /* CONFIG_FPU && CONFIG_CPU_HAS_VFP */
#endif /* CONFIG_CPU_HAS_DCLS */ #endif /* CONFIG_DCLS */
/* /*
* Configure stack. * Configure stack.

2
cmake/compiler/gcc/target_arm.cmake
View file

@ -14,7 +14,7 @@ if(CONFIG_FPU)
list(APPEND TOOLCHAIN_C_FLAGS -mfpu=${GCC_M_FPU}) list(APPEND TOOLCHAIN_C_FLAGS -mfpu=${GCC_M_FPU})
list(APPEND TOOLCHAIN_LD_FLAGS -mfpu=${GCC_M_FPU}) list(APPEND TOOLCHAIN_LD_FLAGS -mfpu=${GCC_M_FPU})
if(CONFIG_CPU_HAS_DCLS AND NOT CONFIG_FP_HARDABI) if(CONFIG_DCLS AND NOT CONFIG_FP_HARDABI)
# If the processor is equipped with VFP and configured in DCLS topology, # If the processor is equipped with VFP and configured in DCLS topology,
# the FP "hard" ABI must be used in order to facilitate the FP register # the FP "hard" ABI must be used in order to facilitate the FP register
# initialisation and synchronisation. # initialisation and synchronisation.