watchdog: Add driver for CMSDK APB WDOG
Add driver for CMSDK (Cortex-M System Design Kit) APB WDOG. This device uses NMI as interrupt hence it requires Runtime NMI (CONFIG_RUNTIME_NMI) to be configured in the platform. Tested with drivers/watchdog sample application. Jira: ZEP-1300 Change-Id: Ib318047109af81e32060e80d456ef3873fd380ea Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
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@ -32,4 +32,6 @@ source "drivers/watchdog/Kconfig.qmsi"
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source "drivers/watchdog/Kconfig.stm32"
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source "drivers/watchdog/Kconfig.stm32"
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source "drivers/watchdog/Kconfig.cmsdk_apb"
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endif
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endif
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45
drivers/watchdog/Kconfig.cmsdk_apb
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45
drivers/watchdog/Kconfig.cmsdk_apb
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@ -0,0 +1,45 @@
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# Kconfig.cmsdk_ahb - ARM CMSDK (Cortex-M System Design Kit) AHB WDOG cfg
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#
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#
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# Copyright (c) 2016 Linaro Limited
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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if SOC_FAMILY_ARM
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config WDOG_CMSDK_APB
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bool "CMSDK APB Watchdog Driver for ARM family of MCUs"
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depends on RUNTIME_NMI
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help
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Enable CMSDK APB Watchdog (WDOG_CMSDK_APB) Driver for ARM
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family of MCUs.
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config WDOG_CMSDK_APB_START_AT_BOOT
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bool "Start Watchdog during boot"
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depends on WDOG_CMSDK_APB
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default n
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help
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Enable this setting to allow WDOG to be automatically started
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during device initialization. Note that once WDOG is started
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it must be reloaded before the counter reaches 0, otherwise
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the MCU will be reset.
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config WDOG_CMSDK_APB_DEVICE_NAME
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string "Device name for CMSDK APB Watchdog"
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depends on WDOG_CMSDK_APB
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default "WATCHDOG_0"
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help
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Set the name used by WDOG device during registration.
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endif # SOC_FAMILY_ARM
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@ -1,2 +1,3 @@
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obj-$(CONFIG_WDT_QMSI) += wdt_qmsi.o
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obj-$(CONFIG_WDT_QMSI) += wdt_qmsi.o
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obj-$(CONFIG_IWDG_STM32) += iwdg_stm32.o
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obj-$(CONFIG_IWDG_STM32) += iwdg_stm32.o
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obj-$(CONFIG_WDOG_CMSDK_APB) += wdog_cmsdk_apb.o
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217
drivers/watchdog/wdog_cmsdk_apb.c
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217
drivers/watchdog/wdog_cmsdk_apb.c
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/*
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* Copyright (c) 2016 Linaro Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @brief Driver for CMSDK APB Watchdog.
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*/
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#include <errno.h>
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#include <soc.h>
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#include <watchdog.h>
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#include <misc/printk.h>
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#include <misc/reboot.h>
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struct wdog_cmsdk_apb {
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/* offset: 0x000 (r/w) watchdog load register */
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volatile uint32_t load;
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/* offset: 0x004 (r/ ) watchdog value register */
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volatile uint32_t value;
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/* offset: 0x008 (r/w) watchdog control register */
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volatile uint32_t ctrl;
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/* offset: 0x00c ( /w) watchdog clear interrupt register */
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volatile uint32_t intclr;
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/* offset: 0x010 (r/ ) watchdog raw interrupt status register */
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volatile uint32_t rawintstat;
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/* offset: 0x014 (r/ ) watchdog interrupt status register */
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volatile uint32_t maskintstat;
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volatile uint32_t reserved0[762];
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/* offset: 0xc00 (r/w) watchdog lock register */
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volatile uint32_t lock;
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volatile uint32_t reserved1[191];
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/* offset: 0xf00 (r/w) watchdog integration test control register */
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volatile uint32_t itcr;
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/* offset: 0xf04 ( /w) watchdog integration test output set register */
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volatile uint32_t itop;
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};
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#define CMSDK_APB_WDOG_LOAD (0xFFFFFFFF << 0)
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#define CMSDK_APB_WDOG_RELOAD (0xE4E1C00 << 0)
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#define CMSDK_APB_WDOG_VALUE (0xFFFFFFFF << 0)
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#define CMSDK_APB_WDOG_CTRL_RESEN (0x1 << 1)
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#define CMSDK_APB_WDOG_CTRL_INTEN (0x1 << 0)
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#define CMSDK_APB_WDOG_INTCLR (0x1 << 0)
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#define CMSDK_APB_WDOG_RAWINTSTAT (0x1 << 0)
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#define CMSDK_APB_WDOG_MASKINTSTAT (0x1 << 0)
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#define CMSDK_APB_WDOG_LOCK (0x1 << 0)
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#define CMSDK_APB_WDOG_INTEGTESTEN (0x1 << 0)
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#define CMSDK_APB_WDOG_INTEGTESTOUTSET (0x1 << 1)
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/*
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* Value written to the LOCK register to lock or unlock the write access
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* to all of the registers of the watchdog (except the LOCK register)
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*/
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#define CMSDK_APB_WDOG_UNLOCK_VALUE (0x1ACCE551)
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#define CMSDK_APB_WDOG_LOCK_VALUE (0x2BDDF662)
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#define WDOG_STRUCT \
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((volatile struct wdog_cmsdk_apb *)(CMSDK_APB_WDOG))
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/* Keep reference of the device to pass it to the callback */
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struct device *wdog_r;
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/* watchdog reload value in sec */
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static unsigned int reload_s = CMSDK_APB_WDOG_RELOAD;
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static unsigned int mode;
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static void (*user_cb)(struct device *dev);
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static void wdog_cmsdk_apb_unlock(struct device *dev)
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{
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volatile struct wdog_cmsdk_apb *wdog = WDOG_STRUCT;
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ARG_UNUSED(dev);
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wdog->lock = CMSDK_APB_WDOG_UNLOCK_VALUE;
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}
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static void wdog_cmsdk_apb_enable(struct device *dev)
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{
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volatile struct wdog_cmsdk_apb *wdog = WDOG_STRUCT;
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ARG_UNUSED(dev);
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/* Start the watchdog counter with INTEN bit */
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wdog->ctrl = (CMSDK_APB_WDOG_CTRL_RESEN | CMSDK_APB_WDOG_CTRL_INTEN);
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}
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static void wdog_cmsdk_apb_disable(struct device *dev)
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{
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volatile struct wdog_cmsdk_apb *wdog = WDOG_STRUCT;
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ARG_UNUSED(dev);
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/* Stop the watchdog counter with INTEN bit */
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wdog->ctrl = ~(CMSDK_APB_WDOG_CTRL_RESEN | CMSDK_APB_WDOG_CTRL_INTEN);
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}
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static int wdog_cmsdk_apb_set_config(struct device *dev,
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struct wdt_config *config)
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{
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volatile struct wdog_cmsdk_apb *wdog = WDOG_STRUCT;
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ARG_UNUSED(dev);
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/* Reload value */
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reload_s = config->timeout * CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC;
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mode = config->mode;
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wdog->load = reload_s;
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/* Configure only the callback */
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user_cb = config->interrupt_fn;
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return 0;
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}
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static void wdog_cmsdk_apb_get_config(struct device *dev,
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struct wdt_config *config)
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{
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ARG_UNUSED(dev);
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/* Return stored configuration */
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config->timeout = reload_s / CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC;
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config->mode = mode;
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config->interrupt_fn = user_cb;
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}
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static void wdog_cmsdk_apb_reload(struct device *dev)
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{
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volatile struct wdog_cmsdk_apb *wdog = WDOG_STRUCT;
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ARG_UNUSED(dev);
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/* Clear the interrupt */
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wdog->intclr = CMSDK_APB_WDOG_INTCLR;
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/* Reload */
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wdog->load = reload_s;
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}
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static const struct wdt_driver_api wdog_cmsdk_apb_api = {
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.enable = wdog_cmsdk_apb_enable,
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.disable = wdog_cmsdk_apb_disable,
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.get_config = wdog_cmsdk_apb_get_config,
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.set_config = wdog_cmsdk_apb_set_config,
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.reload = wdog_cmsdk_apb_reload,
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};
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#ifdef CONFIG_RUNTIME_NMI
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extern void _NmiHandlerSet(void (*pHandler)(void));
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static int wdog_cmsdk_apb_has_fired(void)
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{
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volatile struct wdog_cmsdk_apb *wdog = WDOG_STRUCT;
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return (wdog->maskintstat & CMSDK_APB_WDOG_MASKINTSTAT) != 0;
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}
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static void wdog_cmsdk_apb_isr(void)
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{
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/*
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* Check if the watchdog was the reason of the NMI interrupt
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* and if not, exit immediately
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*/
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if (!wdog_cmsdk_apb_has_fired()) {
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printk("NMI received! Rebooting...\n");
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/* In ARM implementation sys_reboot ignores the parameter */
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sys_reboot(0);
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} else {
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if (user_cb != NULL) {
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user_cb(wdog_r);
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}
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}
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}
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#endif /* CONFIG_RUNTIME_NMI */
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static int wdog_cmsdk_apb_init(struct device *dev)
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{
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volatile struct wdog_cmsdk_apb *wdog = WDOG_STRUCT;
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wdog_r = dev;
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/* unlock access to configuration registers */
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wdog_cmsdk_apb_unlock(dev);
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/* set default reload value */
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wdog->load = reload_s;
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#ifdef CONFIG_RUNTIME_NMI
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/* Configure the interrupts */
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_NmiHandlerSet(wdog_cmsdk_apb_isr);
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#endif
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#ifdef CONFIG_WDOG_CMSDK_APB_START_AT_BOOT
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wdog_cmsdk_apb_enable(dev);
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#endif
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return 0;
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}
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DEVICE_AND_API_INIT(wdog_cmsdk_apb, CONFIG_WDOG_CMSDK_APB_DEVICE_NAME,
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wdog_cmsdk_apb_init,
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NULL, NULL,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&wdog_cmsdk_apb_api);
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