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Xtensa port: Connect Xtensa timer to tick IRQ in legacy test_context.

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The test will also need to increase the stack to run correctly for Xtensa cores.

Change-Id: If94f12a941dc8eccf879558bdebdc7ccb2d047f1
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
This commit is contained in:
Mazen NEIFER 2017-02-06 21:33:01 +01:00 • committed by Andrew Boie
commit 8e3b86fe0a
1 changed files with 4 additions and 1 deletions
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5
tests/legacy/kernel/test_context/src/context.c
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@ -27,7 +27,7 @@
* Include board.h from platform to get IRQ number.
* NOTE: Cortex-M does not need IRQ numbers
*/
#if !defined(CONFIG_CPU_CORTEX_M)
#if !defined(CONFIG_CPU_CORTEX_M) && !defined(CONFIG_XTENSA)
#include <board.h>
#endif
@ -52,6 +52,9 @@
/* MVIC case */
#define TICK_IRQ CONFIG_MVIC_TIMER_IRQ
#endif
#elif defined(CONFIG_XTENSA)
#include <xtensa_timer.h>
#define TICK_IRQ XT_TIMER_INTNUM
#elif defined(CONFIG_ALTERA_AVALON_TIMER)
#define TICK_IRQ TIMER_0_IRQ
#elif defined(CONFIG_ARCV2_TIMER)