Bluetooth: Controller: Remove custom irq implementation
As part of an effort to closely integrate with Zephyr OS, removed the custom implementation of IRQ interfaces used in controller code. Jira: ZEP-841 Change-id: Ie427f45aeecad51053112371526cb7dc4817248f Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
This commit is contained in:
parent
54164b1350
commit
8e25789052
11 changed files with 61 additions and 151 deletions
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@ -5,7 +5,6 @@ obj-$(CONFIG_BLUETOOTH_CONTROLLER) += util/mem.o
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obj-$(CONFIG_BLUETOOTH_CONTROLLER) += util/memq.o
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obj-$(CONFIG_BLUETOOTH_CONTROLLER) += util/work.o
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obj-$(CONFIG_BLUETOOTH_CONTROLLER) += util/util.o
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obj-$(CONFIG_BLUETOOTH_CONTROLLER) += hal/irq.o
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obj-$(CONFIG_BLUETOOTH_CONTROLLER) += hal/clock.o
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obj-$(CONFIG_BLUETOOTH_CONTROLLER) += hal/rtc.o
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obj-$(CONFIG_BLUETOOTH_CONTROLLER) += hal/rand.o
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@ -15,7 +15,7 @@
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* limitations under the License.
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*/
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#include "nrf.h"
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#include <soc.h>
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#include "clock.h"
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@ -54,7 +54,7 @@ uint32_t clock_m16src_start(uint32_t async)
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if (!async) {
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uint32_t intenset;
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NVIC_DisableIRQ(POWER_CLOCK_IRQn);
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irq_disable(POWER_CLOCK_IRQn);
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NRF_CLOCK->EVENTS_HFCLKSTARTED = 0;
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@ -76,8 +76,8 @@ uint32_t clock_m16src_start(uint32_t async)
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NRF_CLOCK->INTENCLR = CLOCK_INTENCLR_HFCLKSTARTED_Msk;
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}
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NVIC_ClearPendingIRQ(POWER_CLOCK_IRQn);
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NVIC_EnableIRQ(POWER_CLOCK_IRQn);
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_NvicIrqUnpend(POWER_CLOCK_IRQn);
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irq_enable(POWER_CLOCK_IRQn);
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} else {
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NRF_CLOCK->EVENTS_HFCLKSTARTED = 0;
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NRF_CLOCK->TASKS_HFCLKSTART = 1;
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@ -120,7 +120,7 @@ uint32_t clock_k32src_start(uint32_t src)
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NRF_CLOCK->TASKS_LFCLKSTOP = 1;
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NVIC_DisableIRQ(POWER_CLOCK_IRQn);
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irq_disable(POWER_CLOCK_IRQn);
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NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
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@ -139,8 +139,8 @@ uint32_t clock_k32src_start(uint32_t src)
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NRF_CLOCK->INTENCLR = CLOCK_INTENCLR_LFCLKSTARTED_Msk;
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}
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NVIC_ClearPendingIRQ(POWER_CLOCK_IRQn);
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NVIC_EnableIRQ(POWER_CLOCK_IRQn);
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_NvicIrqUnpend(POWER_CLOCK_IRQn);
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irq_enable(POWER_CLOCK_IRQn);
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/* Calibrate RC, and start timer for consecutive calibrations */
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NRF_CLOCK->TASKS_CTSTOP = 1;
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@ -160,7 +160,7 @@ uint32_t clock_k32src_start(uint32_t src)
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*/
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NRF_CLOCK->INTENSET = CLOCK_INTENSET_HFCLKSTARTED_Msk;
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if (clock_m16src_start(1)) {
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NVIC_ClearPendingIRQ(POWER_CLOCK_IRQn);
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_NvicIrqUnpend(POWER_CLOCK_IRQn);
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}
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}
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@ -224,7 +224,7 @@ void power_clock_isr(void)
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*/
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NRF_CLOCK->INTENSET = CLOCK_INTENSET_HFCLKSTARTED_Msk;
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if (clock_m16src_start(1)) {
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NVIC_ClearPendingIRQ(POWER_CLOCK_IRQn);
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_NvicIrqUnpend(POWER_CLOCK_IRQn);
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}
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}
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}
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@ -15,12 +15,10 @@
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* limitations under the License.
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*/
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#include <toolchain.h>
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#include <string.h>
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#include <soc.h>
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#include "nrf.h"
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#include "mem.h"
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#include "ecb.h"
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#include "debug.h"
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@ -85,10 +83,9 @@ uint32_t ecb_encrypt_nonblocking(struct ecb *ecb)
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NRF_ECB->EVENTS_ERRORECB = 0;
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NRF_ECB->INTENSET = ECB_INTENSET_ERRORECB_Msk | ECB_INTENSET_ENDECB_Msk;
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/* setup interrupt */
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NVIC_SetPriority(ECB_IRQn, 2);
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NVIC_ClearPendingIRQ(ECB_IRQn);
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NVIC_EnableIRQ(ECB_IRQn);
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/* enable interrupt */
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_NvicIrqUnpend(ECB_IRQn);
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irq_enable(ECB_IRQn);
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/* start the encryption h/w */
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NRF_ECB->TASKS_STARTECB = 1;
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@ -102,7 +99,7 @@ static void ecb_cleanup(void)
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NRF_ECB->TASKS_STOPECB = 1;
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/* cleanup interrupt */
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NVIC_DisableIRQ(ECB_IRQn);
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irq_disable(ECB_IRQn);
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}
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void ecb_isr(void)
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@ -1,27 +0,0 @@
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/*
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* Copyright (c) 2016 Nordic Semiconductor ASA
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* Copyright (c) 2016 Vinayak Kariappa Chettimada
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef _IRQ_H_
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#define _IRQ_H_
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void irq_enable(uint8_t irq);
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void irq_disable(uint8_t irq);
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void irq_pending_set(uint8_t irq);
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uint8_t irq_enabled(uint8_t irq);
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uint8_t irq_priority_equal(uint8_t irq);
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#endif /* _IRQ_H_ */
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@ -1,53 +0,0 @@
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/*
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* Copyright (c) 2016 Nordic Semiconductor ASA
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* Copyright (c) 2016 Vinayak Kariappa Chettimada
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "nrf.h"
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#include "hal_irq.h"
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void irq_enable(uint8_t irq)
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{
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NVIC_EnableIRQ((IRQn_Type) irq);
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}
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void irq_disable(uint8_t irq)
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{
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NVIC_DisableIRQ((IRQn_Type) irq);
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}
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void irq_pending_set(uint8_t irq)
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{
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NVIC_SetPendingIRQ((IRQn_Type) irq);
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}
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uint8_t irq_enabled(uint8_t irq)
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{
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return ((NVIC->ISER[0] & (1 << ((uint32_t) (irq) & 0x1F))) != 0);
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}
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uint8_t irq_priority_equal(uint8_t irq)
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{
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uint32_t irq_current = SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk;
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uint32_t irq_priority_current = 4;
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if (irq_current > 16) {
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irq_priority_current =
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NVIC_GetPriority((IRQn_Type) (irq_current - 16)) & 0xFF;
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}
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return ((NVIC_GetPriority((IRQn_Type) irq) & 0xFF) ==
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irq_priority_current);
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}
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@ -14,10 +14,9 @@
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <soc.h>
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#include <misc/util.h>
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#include "nrf.h"
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#include "hal_work.h"
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#include "defines.h"
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@ -56,14 +55,13 @@ void radio_isr_set(radio_isr_fp fp_radio_isr)
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*/
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);
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NVIC_SetPriority(RADIO_IRQn, WORK_TICKER_WORKER0_IRQ_PRIORITY);
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NVIC_ClearPendingIRQ(RADIO_IRQn);
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NVIC_EnableIRQ(RADIO_IRQn);
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_NvicIrqUnpend(RADIO_IRQn);
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irq_enable(RADIO_IRQn);
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}
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void radio_reset(void)
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{
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NVIC_DisableIRQ(RADIO_IRQn);
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irq_disable(RADIO_IRQn);
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NRF_RADIO->POWER =
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((RADIO_POWER_POWER_Disabled << RADIO_POWER_POWER_Pos) &
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@ -481,7 +479,7 @@ void *radio_ccm_tx_pkt_set(struct ccm *ccm, void *pkt)
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__WFE();
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}
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NRF_CCM->INTENCLR = CCM_INTENCLR_ENDCRYPT_Msk;
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NVIC_ClearPendingIRQ(CCM_AAR_IRQn);
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_NvicIrqUnpend(CCM_AAR_IRQn);
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BT_ASSERT(NRF_CCM->EVENTS_ERROR == 0);
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#else
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@ -501,7 +499,7 @@ uint32_t radio_ccm_is_done(void)
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__WFE();
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}
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NRF_CCM->INTENCLR = CCM_INTENCLR_ENDCRYPT_Msk;
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NVIC_ClearPendingIRQ(CCM_AAR_IRQn);
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_NvicIrqUnpend(CCM_AAR_IRQn);
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return (NRF_CCM->EVENTS_ERROR == 0);
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}
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@ -15,9 +15,10 @@
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* limitations under the License.
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*/
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#include "nrf.h"
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#include <soc.h>
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#include "rand.h"
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#include "debug.h"
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#define RAND_RESERVED (4)
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@ -42,10 +43,6 @@ void rand_init(uint8_t *context, uint8_t context_len)
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NRF_RNG->CONFIG = RNG_CONFIG_DERCEN_Msk;
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NRF_RNG->EVENTS_VALRDY = 0;
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NRF_RNG->INTENSET = RNG_INTENSET_VALRDY_Msk;
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NVIC_SetPriority(RNG_IRQn, 2);
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NVIC_EnableIRQ(RNG_IRQn);
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NRF_RNG->TASKS_START = 1;
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}
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@ -262,6 +262,8 @@ static int hci_driver_open(void)
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{
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uint32_t err;
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DEBUG_INIT();
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clock_k32src_start(1);
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_ticker_users[RADIO_TICKER_USER_ID_WORKER][0] =
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return -ENOMEM;
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}
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IRQ_CONNECT(NRF52_IRQ_POWER_CLOCK_IRQn, 2, power_clock_nrf5_isr, 0, 0);
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IRQ_CONNECT(NRF52_IRQ_POWER_CLOCK_IRQn, 1, power_clock_nrf5_isr, 0, 0);
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IRQ_CONNECT(NRF52_IRQ_RADIO_IRQn, 0, radio_nrf5_isr, 0, 0);
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IRQ_CONNECT(NRF52_IRQ_RTC0_IRQn, 0, rtc0_nrf5_isr, 0, 0);
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IRQ_CONNECT(NRF52_IRQ_RNG_IRQn, 2, rng_nrf5_isr, 0, 0);
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IRQ_CONNECT(NRF52_IRQ_RNG_IRQn, 1, rng_nrf5_isr, 0, 0);
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IRQ_CONNECT(NRF52_IRQ_SWI4_EGU4_IRQn, 0, swi4_nrf5_isr, 0, 0);
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IRQ_CONNECT(NRF52_IRQ_SWI5_EGU5_IRQn, 2, swi5_nrf5_isr, 0, 0);
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IRQ_CONNECT(NRF52_IRQ_SWI5_EGU5_IRQn, 1, swi5_nrf5_isr, 0, 0);
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irq_enable(NRF52_IRQ_POWER_CLOCK_IRQn);
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irq_enable(NRF52_IRQ_RADIO_IRQn);
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irq_enable(NRF52_IRQ_RTC0_IRQn);
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@ -4437,7 +4437,7 @@ static inline uint32_t event_conn_update_prep(struct connection *conn,
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/* disable ticker job, in order to chain stop and start
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* to avoid RTC being stopped if no tickers active.
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*/
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work_was_enabled = work_enabled(WORK_TICKER_JOB0_IRQ);
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work_was_enabled = work_is_enabled(WORK_TICKER_JOB0_IRQ);
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work_disable(WORK_TICKER_JOB0_IRQ);
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/* start slave/master with new timings */
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@ -16,28 +16,35 @@
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*/
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#include <stdint.h>
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#include "hal_irq.h"
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#include <irq.h>
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#include "work.h"
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static struct work *_work_head;
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#ifdef __GNUC__
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static inline uint32_t __disable_irq(void)
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static int _irq_is_priority_equal(unsigned int irq)
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{
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uint32_t result;
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unsigned int curr_ctx;
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int curr_prio;
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__asm__ volatile ("MRS %0, PRIMASK\n\t CPSID i":"=r" (result));
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curr_ctx = _ScbActiveVectorGet();
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if (curr_ctx > 16) {
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/* Interrupts */
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curr_prio = _NvicIrqPrioGet(curr_ctx - 16);
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} else if (curr_ctx > 3) {
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/* Execeptions */
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curr_prio = _ScbExcPrioGet(curr_ctx);
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} else if (curr_ctx > 0) {
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/* Fixed Priority Exceptions: -3, -2, -1 priority */
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curr_prio = curr_ctx - 4;
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} else {
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/* Thread mode */
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curr_prio = 256;
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}
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return (result & 0x01);
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return (_NvicIrqPrioGet(irq) == curr_prio);
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}
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static inline void __enable_irq(void)
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{
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__asm__ volatile ("CPSIE i");
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}
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#endif
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void work_enable(uint8_t group)
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{
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irq_enable(group);
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irq_disable(group);
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}
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uint8_t work_enabled(uint8_t group)
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uint32_t work_is_enabled(uint8_t group)
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{
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return irq_enabled(group);
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return irq_is_enabled(group);
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}
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uint32_t work_schedule(struct work *w, uint8_t chain)
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{
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int was_masked = __disable_irq();
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uint32_t imask = irq_lock();
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struct work *prev;
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struct work *curr;
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}
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/* chain, if explicitly requested, or if work not at current level */
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chain = chain || (!irq_priority_equal(w->group))
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|| (!irq_enabled(w->group));
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chain = chain || (!_irq_is_priority_equal(w->group))
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|| (!irq_is_enabled(w->group));
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/* Already in List */
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curr = _work_head;
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break;
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}
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if (!was_masked) {
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__enable_irq();
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}
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irq_unlock(imask);
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return 1;
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}
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@ -106,9 +111,7 @@ uint32_t work_schedule(struct work *w, uint8_t chain)
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if (!chain) {
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w->req = w->ack;
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if (!was_masked) {
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__enable_irq();
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}
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irq_unlock(imask);
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if (w->fp) {
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w->fp(w->params);
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prev->next = w;
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}
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irq_pending_set(w->group);
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_NvicIrqPend(w->group);
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if (!was_masked) {
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__enable_irq();
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}
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irq_unlock(imask);
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return 0;
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}
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void work_run(uint8_t group)
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{
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int was_masked = __disable_irq();
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uint32_t imask = irq_lock();
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struct work *curr = _work_head;
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while (curr) {
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if (curr->fp) {
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if (curr->next) {
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irq_pending_set(group);
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_NvicIrqPend(group);
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}
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if (!was_masked) {
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__enable_irq();
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}
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irq_unlock(imask);
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curr->fp(curr->params);
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@ -162,7 +161,5 @@ void work_run(uint8_t group)
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curr = curr->next;
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}
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if (!was_masked) {
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__enable_irq();
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||||
}
|
||||
irq_unlock(imask);
|
||||
}
|
||||
|
|
|
@ -31,7 +31,7 @@ struct work {
|
|||
|
||||
void work_enable(uint8_t group);
|
||||
void work_disable(uint8_t group);
|
||||
uint8_t work_enabled(uint8_t group);
|
||||
uint32_t work_is_enabled(uint8_t group);
|
||||
uint32_t work_schedule(struct work *w, uint8_t chain);
|
||||
void work_run(uint8_t group);
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue