soc: arm: mps2_an521: have separate configs for the 2 cores of AN521

MPS2 AN521 is a dual (Cortex-M33) core where the two cores
have different capabilities. E.g CPU0 implements TrustZone-M,
while CPU1 implements the FPU. Therefore we introcude separate
Kconfig symbols for the two SoC variants, and use these to
select the different Cortex-M capabilities. We also update
the definitions of __MPU/FPU/SAU/DSP variant in soc.h to make
them get the value from the Kconfig settings, directly.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2021-05-17 16:53:23 +02:00 committed by Anas Nashif
commit 8deb775736
3 changed files with 17 additions and 7 deletions

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@ -6,7 +6,7 @@
# #
CONFIG_SOC_SERIES_MPS2=y CONFIG_SOC_SERIES_MPS2=y
CONFIG_SOC_MPS2_AN521=y CONFIG_SOC_MPS2_AN521_CPU1=y
CONFIG_BOARD_MPS2_AN521=y CONFIG_BOARD_MPS2_AN521=y
CONFIG_CORTEX_M_SYSTICK=y CONFIG_CORTEX_M_SYSTICK=y
CONFIG_RUNTIME_NMI=y CONFIG_RUNTIME_NMI=y

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@ -1,6 +1,11 @@
# Copyright (c) 2017-2019 Linaro Limited # Copyright (c) 2017-2019 Linaro Limited
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
config SOC_MPS2_AN521
bool
select CPU_CORTEX_M33
select CPU_HAS_ARM_MPU
choice choice
prompt "ARM MPS2 SoCs" prompt "ARM MPS2 SoCs"
depends on SOC_SERIES_MPS2 depends on SOC_SERIES_MPS2
@ -10,10 +15,14 @@ config SOC_MPS2_AN385
select CPU_CORTEX_M3 select CPU_CORTEX_M3
select CPU_HAS_ARM_MPU select CPU_HAS_ARM_MPU
config SOC_MPS2_AN521 config SOC_MPS2_AN521_CPU0
bool "ARM Cortex-M33 SMM-SSE-200 on V2M-MPS2+ (AN521)" bool "ARM Cortex-M33 SMM-SSE-200 on V2M-MPS2+ (AN521) CPU0"
select CPU_CORTEX_M33 select SOC_MPS2_AN521
select CPU_HAS_ARM_SAU select CPU_HAS_ARM_SAU
select CPU_HAS_ARM_MPU
config SOC_MPS2_AN521_CPU1
bool "ARM Cortex-M33 SMM-SSE-200 on V2M-MPS2+ (AN521) CPU1"
select SOC_MPS2_AN521
select CPU_HAS_FPU
endchoice endchoice

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@ -10,9 +10,10 @@
#define __MPU_PRESENT 1 #define __MPU_PRESENT 1
#if defined(CONFIG_SOC_MPS2_AN521) #if defined(CONFIG_SOC_MPS2_AN521)
#define __SAUREGION_PRESENT 1U /* SAU regions present */ #define __SAUREGION_PRESENT CONFIG_CPU_HAS_ARM_SAU
#define __FPU_PRESENT CONFIG_CPU_HAS_FPU #define __FPU_PRESENT CONFIG_CPU_HAS_FPU
#define __DSP_PRESENT 1U /* DSP extension present */ #define __DSP_PRESENT CONFIG_ARMV8_M_DSP
#endif #endif
#include <devicetree.h> #include <devicetree.h>