diff --git a/boards/arm/hexiwear_kw40z/Kconfig.board b/boards/arm/hexiwear_kw40z/Kconfig.board new file mode 100644 index 00000000000..c997b6ceffe --- /dev/null +++ b/boards/arm/hexiwear_kw40z/Kconfig.board @@ -0,0 +1,11 @@ +# Kconfig - Hexiwear KW40Z board +# +# Copyright (c) 2017, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +config BOARD_HEXIWEAR_KW40Z + bool "Hexiwear KW40Z" + depends on SOC_SERIES_KINETIS_KWX + select SOC_PART_NUMBER_MKW40Z160VHT4 diff --git a/boards/arm/hexiwear_kw40z/Kconfig.defconfig b/boards/arm/hexiwear_kw40z/Kconfig.defconfig new file mode 100644 index 00000000000..1242829e184 --- /dev/null +++ b/boards/arm/hexiwear_kw40z/Kconfig.defconfig @@ -0,0 +1,65 @@ +# Kconfig - Hexiwear KW40Z board +# +# Copyright (c) 2017, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +if BOARD_HEXIWEAR_KW40Z + +config BOARD + default hexiwear_kw40z + +config OSC_XTAL0_FREQ + default 32000000 + +config MCG_FRDIV + default 5 + +config MCG_FCRDIV + default 0 + +if PINMUX_MCUX + +config PINMUX_MCUX_PORTA + def_bool y + +config PINMUX_MCUX_PORTB + def_bool n + +config PINMUX_MCUX_PORTC + def_bool y if UART_MCUX_LPUART_0 || I2C_1 + +endif # PINMUX_MCUX + +if GPIO_MCUX + +config GPIO_MCUX_PORTA + def_bool y + +config GPIO_MCUX_PORTB + def_bool n + +config GPIO_MCUX_PORTC + def_bool y if UART_MCUX_LPUART_0 || I2C_1 + +endif # GPIO_MCUX + +if UART_MCUX_LPUART + +config UART_MCUX_LPUART_0 + def_bool y + +endif # UART_MCUX + +if I2C + +config I2C_1 + def_bool y + +config I2C_1_IRQ_PRI + default 0 + +endif # I2C + +endif # BOARD_HEXIWEAR_KW40Z diff --git a/boards/arm/hexiwear_kw40z/Makefile b/boards/arm/hexiwear_kw40z/Makefile new file mode 100644 index 00000000000..6122f670552 --- /dev/null +++ b/boards/arm/hexiwear_kw40z/Makefile @@ -0,0 +1,10 @@ +# Makefile - Hexiwear KW40Z board +# +# Copyright (c) 2017, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +ccflags-y += -I$(srctree)/drivers + +obj-$(CONFIG_PINMUX_MCUX) += pinmux.o diff --git a/boards/arm/hexiwear_kw40z/board.h b/boards/arm/hexiwear_kw40z/board.h new file mode 100644 index 00000000000..b704de405c1 --- /dev/null +++ b/boards/arm/hexiwear_kw40z/board.h @@ -0,0 +1,12 @@ +/* + * Copyright (c) 2017, NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __INC_BOARD_H +#define __INC_BOARD_H + +#include + +#endif /* __INC_BOARD_H */ diff --git a/boards/arm/hexiwear_kw40z/doc/hexiwear_kw40z.rst b/boards/arm/hexiwear_kw40z/doc/hexiwear_kw40z.rst new file mode 100644 index 00000000000..7ad1a4f4d9b --- /dev/null +++ b/boards/arm/hexiwear_kw40z/doc/hexiwear_kw40z.rst @@ -0,0 +1,203 @@ +.. _hexiwear_kw40z: + +Hexiwear KW40Z +############## + +Overview +******** + +See :ref:`hexiwear_k64` for a general overview of the Hexiwear board and the +main application SoC, the K64. The KW40Z is a secondary SoC on the board that +provides wireless connectivity with a multimode BLE and 802.15.4 radio. + +For more information about the KW40Z SoC: + +- `KW40Z Website`_ +- `KW40Z Datasheet`_ +- `KW40Z Reference Manual`_ + +Supported Features +================== + +The hexiwear_kw40z board configuration supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| SYSTICK | on-chip | systick | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| RTT | on-chip | console | ++-----------+------------+-------------------------------------+ +| FLASH | on-chip | soc flash | ++-----------+------------+-------------------------------------+ + +The default configuration can be found in the defconfig file: + + ``boards/arm/hexiwear_kw40z/hexiwear_kw40z_defconfig`` + +Other hardware features are not currently supported by the port. + +Connections and IOs +=================== + +The KW40Z SoC has three pairs of pinmux/gpio controllers, but only one is +currently enabled (PORTC/GPIOC) for the hexiwear_kw40z board. + ++-------+-----------------+---------------------------+ +| Name | Function | Usage | ++=======+=================+===========================+ +| PTC6 | UART0_RX | UART BT HCI | ++-------+-----------------+---------------------------+ +| PTC7 | UART0_TX | UART BT HCI | ++-------+-----------------+---------------------------+ + +System Clock +============ + +The KW40Z SoC is configured to use the 32 MHz external oscillator on the board +with the on-chip FLL to generate a 40 MHz system clock. + +Serial Port +=========== + +The KW40Z SoC has one UART, which is used for BT HCI. The console is available +using `Segger RTT`_. + +Programming and Debugging +************************* + +The Hexiwear docking station includes an `OpenSDA`_ serial and debug adaptor +built into the board. Different firmware options are available for the adaptor +including Segger J-Link and DAPLink. Because `Segger RTT`_ is required for a +console, the `Segger J-Link OpenSDA`_ firmware is recommended. + +Segger J-Link +============= + +Download and install the `Segger J-Link Software and Documentation Pack`_ to +get the JLinkGDBServer for your host computer. + +Put the OpenSDA adapter into bootloader mode by holding the reset button while +you power on the board. A USB mass storage device called MAINTENANCE will +enumerate. Copy the `Segger J-Link OpenSDA V2.1 Bootloader`_ to the MAINTENANCE +drive. Power cycle the board, this time without holding the reset button. + +Start the GDB Server: + + .. code-block:: console + + $ JLinkGDBServer -if swd -device MKW40Z160xxx4 + + SEGGER J-Link GDB Server V6.14b Command Line Version + + JLinkARM.dll V6.14b (DLL compiled Mar 9 2017 08:48:20) + + -----GDB Server start settings----- + GDBInit file: none + GDB Server Listening port: 2331 + SWO raw output listening port: 2332 + Terminal I/O port: 2333 + Accept remote connection: yes + Generate logfile: off + Verify download: off + Init regs on start: off + Silent mode: off + Single run mode: off + Target connection timeout: 0 ms + ------J-Link related settings------ + J-Link Host interface: USB + J-Link script: none + J-Link settings file: none + ------Target related settings------ + Target device: MKW40Z160xxx4 + Target interface: SWD + Target interface speed: 1000kHz + Target endian: little + + Connecting to J-Link... + J-Link is connected. + Firmware: J-Link OpenSDA 2 compiled Feb 28 2017 19:27:57 + Hardware: V1.00 + S/N: 621000000 + Checking target voltage... + Target voltage: 3.30 V + Listening on TCP/IP port 2331 + Connecting to target...Connected to target + Waiting for GDB connection... + +In a second terminal, open telnet: + + .. code-block:: console + + $ telnet localhost 19021 + Trying 127.0.0.1... + Connected to localhost. + Escape character is '^]'. + SEGGER J-Link V6.14b - Real time terminal output + J-Link OpenSDA 2 compiled Feb 28 2017 19:27:57 V1.0, SN=621000000 + Process: JLinkGDBServer + +In a third terminal, build the Zephyr kernel and application: + + .. code-block:: console + + $ cd $ZEPHYR_BASE + $ . zephyr-env.sh + $ cd $ZEPHYR_BASE/samples/hello_world/ + $ make BOARD=hexiwear_kw40z + +Start the GDB client: + + .. code-block:: console + + $ arm-zephyr-eabi-gdb outdir/hexiwear_kw40z/zephyr.elf + +Connect to the GDB server: + + .. code-block:: console + + (gdb) target remote localhost:2331 + (gdb) load + (gdb) monitor reset + (gdb) continue + +Back in the second terminal where you opened telnet, you should see: + + .. code-block:: console + + ***** BOOTING ZEPHYR OS v1.7.99 - BUILD: Apr 6 2017 21:09:52 ***** + Hello World! arm + + +.. _KW40Z Website: + http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/kinetis-cortex-m-mcus/w-series-wireless-m0-plus-m4/kinetis-kw40z-2.4-ghz-dual-mode-ble-and-802.15.4-wireless-radio-microcontroller-mcu-based-on-arm-cortex-m0-plus-core:KW40Z + +.. _KW40Z Datasheet: + http://www.nxp.com/assets/documents/data/en/data-sheets/MKW40Z160.pdf + +.. _KW40Z Reference Manual: + http://www.nxp.com/assets/documents/data/en/reference-manuals/MKW40Z160RM.pdf + +.. _Segger RTT: + https://www.segger.com/jlink-rtt.html + +.. _OpenSDA: + http://www.nxp.com/products/software-and-tools/hardware-development-tools/startertrak-development-boards/opensda-serial-and-debug-adapter:OPENSDA + +.. _Segger J-Link OpenSDA: + https://www.segger.com/opensda.html + +.. _Segger J-Link OpenSDA V2.1 Bootloader: + https://www.segger.com/downloads/jlink/OpenSDA_V2_1.bin + +.. _Segger J-Link Software and Documentation Pack: + https://www.segger.com/downloads/jlink diff --git a/boards/arm/hexiwear_kw40z/hexiwear_kw40z_defconfig b/boards/arm/hexiwear_kw40z/hexiwear_kw40z_defconfig new file mode 100644 index 00000000000..02e5e34d9b5 --- /dev/null +++ b/boards/arm/hexiwear_kw40z/hexiwear_kw40z_defconfig @@ -0,0 +1,12 @@ +CONFIG_ARM=y +CONFIG_SOC_MKW40Z4=y +CONFIG_SOC_SERIES_KINETIS_KWX=y +CONFIG_BOARD_HEXIWEAR_KW40Z=y +CONFIG_CONSOLE=y +CONFIG_RTT_CONSOLE=y +CONFIG_CORTEX_M_SYSTICK=y +CONFIG_PINMUX=y +CONFIG_GPIO=y +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=40000000 +CONFIG_OSC_EXTERNAL=y +CONFIG_HAS_DTS=y diff --git a/boards/arm/hexiwear_kw40z/pinmux.c b/boards/arm/hexiwear_kw40z/pinmux.c new file mode 100644 index 00000000000..d722932d3cd --- /dev/null +++ b/boards/arm/hexiwear_kw40z/pinmux.c @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2017, NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +static int hexiwear_kw40z_pinmux_init(struct device *dev) +{ + ARG_UNUSED(dev); + +#ifdef CONFIG_PINMUX_MCUX_PORTC + struct device *portc = + device_get_binding(CONFIG_PINMUX_MCUX_PORTC_NAME); +#endif + +#ifdef CONFIG_UART_MCUX_LPUART_0 + /* UART0 RX, TX */ + pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt4)); + pinmux_pin_set(portc, 7, PORT_PCR_MUX(kPORT_MuxAlt4)); +#endif + +#if CONFIG_I2C_1 + /* I2C1 SCL, SDA */ + pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt3) + | PORT_PCR_PS_MASK); + pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt3) + | PORT_PCR_PS_MASK); +#endif + + return 0; +} + +SYS_INIT(hexiwear_kw40z_pinmux_init, PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY); diff --git a/dts/arm/Makefile b/dts/arm/Makefile index 0b938665668..88b47ae6264 100644 --- a/dts/arm/Makefile +++ b/dts/arm/Makefile @@ -2,6 +2,7 @@ ifeq ($(CONFIG_HAS_DTS),y) dtb-$(CONFIG_BOARD_FRDM_K64F) = frdm_k64f.dts_compiled dtb-$(CONFIG_BOARD_FRDM_KW41Z) = frdm_kw41z.dts_compiled dtb-$(CONFIG_BOARD_HEXIWEAR_K64) = hexiwear_k64.dts_compiled +dtb-$(CONFIG_BOARD_HEXIWEAR_KW40Z) = hexiwear_kw40z.dts_compiled dtb-$(CONFIG_BOARD_CC3200_LAUNCHXL) = cc3200_launchxl.dts_compiled dtb-$(CONFIG_BOARD_NUCLEO_L476RG) = nucleo_l476rg.dts_compiled dtb-$(CONFIG_BOARD_V2M_BEETLE) = v2m_beetle.dts_compiled diff --git a/dts/arm/hexiwear_kw40z.dts b/dts/arm/hexiwear_kw40z.dts new file mode 100644 index 00000000000..abe80348103 --- /dev/null +++ b/dts/arm/hexiwear_kw40z.dts @@ -0,0 +1,28 @@ +/dts-v1/; + +#include + +/ { + model = "Hexiwear KW40 board"; + compatible = "nxp,kw40z", "nxp,mkw40z4"; + + aliases { + lpuart_0 = &lpuart0; + pinmux_a = &pinmux_a; + pinmux_b = &pinmux_b; + pinmux_c = &pinmux_c; + gpio_a = &gpioa; + gpio_b = &gpiob; + gpio_c = &gpioc; + }; + + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; +}; + +&lpuart0 { + status = "ok"; + baud-rate = <115200>; +}; diff --git a/dts/arm/hexiwear_kw40z.fixup b/dts/arm/hexiwear_kw40z.fixup new file mode 100644 index 00000000000..337f5f42452 --- /dev/null +++ b/dts/arm/hexiwear_kw40z.fixup @@ -0,0 +1,4 @@ +#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS + +#define CONFIG_UART_MCUX_LPUART_0_BAUD_RATE NXP_KW41Z_LPUART_40054000_BAUD_RATE +#define CONFIG_UART_MCUX_LPUART_0_IRQ_PRI NXP_KW41Z_LPUART_40054000_IRQ_0_PRIORITY