diff --git a/boards/arm/mps2/Kconfig b/boards/arm/mps2/Kconfig index 4beda641d53..367a8848536 100644 --- a/boards/arm/mps2/Kconfig +++ b/boards/arm/mps2/Kconfig @@ -1,6 +1,6 @@ # Copyright (c) 2017 Linaro Limited +# Copyright 2024 Arm Limited and/or its affiliates # SPDX-License-Identifier: Apache-2.0 config BOARD_MPS2 - select QEMU_TARGET - select HAS_COVERAGE_SUPPORT + select QEMU_TARGET if BOARD_MPS2_AN385 || BOARD_MPS2_AN521_CPU0 || BOARD_MPS2_AN521_CPU0_NS || BOARD_MPS2_AN521_CPU1 diff --git a/boards/arm/mps2/Kconfig.defconfig b/boards/arm/mps2/Kconfig.defconfig index b14613b4880..1995338ed52 100644 --- a/boards/arm/mps2/Kconfig.defconfig +++ b/boards/arm/mps2/Kconfig.defconfig @@ -1,7 +1,8 @@ # Copyright (c) 2017 Linaro Limited +# Copyright 2024 Arm Limited and/or its affiliates # SPDX-License-Identifier: Apache-2.0 -if BOARD_MPS2_AN385 +if BOARD_MPS2_AN385 || BOARD_MPS2_AN383 if SERIAL diff --git a/boards/arm/mps2/Kconfig.mps2 b/boards/arm/mps2/Kconfig.mps2 index 0731c5d2855..1bc354f9d56 100644 --- a/boards/arm/mps2/Kconfig.mps2 +++ b/boards/arm/mps2/Kconfig.mps2 @@ -1,7 +1,9 @@ # Copyright (c) 2017 Linaro Limited +# Copyright 2024 Arm Limited and/or its affiliates # SPDX-License-Identifier: Apache-2.0 config BOARD_MPS2 + select SOC_MPS2_AN383 if BOARD_MPS2_AN383 select SOC_MPS2_AN385 if BOARD_MPS2_AN385 select SOC_MPS2_AN521_CPU0 if BOARD_MPS2_AN521_CPU0 select SOC_MPS2_AN521_CPU0 if BOARD_MPS2_AN521_CPU0_NS diff --git a/boards/arm/mps2/board.cmake b/boards/arm/mps2/board.cmake index 6f38d01281b..8baa970ad1e 100644 --- a/boards/arm/mps2/board.cmake +++ b/boards/arm/mps2/board.cmake @@ -1,7 +1,8 @@ # SPDX-License-Identifier: Apache-2.0 +# Copyright 2024 Arm Limited and/or its affiliates + set(SUPPORTED_EMU_PLATFORMS qemu) - if(CONFIG_BOARD_MPS2_AN385) set(QEMU_CPU_TYPE_${ARCH} cortex-m3) set(QEMU_FLAGS_${ARCH} @@ -10,6 +11,14 @@ if(CONFIG_BOARD_MPS2_AN385) -nographic -vga none ) +elseif(CONFIG_BOARD_MPS2_AN383) + set(SUPPORTED_EMU_PLATFORMS armfvp) + set(ARMFVP_BIN_NAME FVP_MPS2_Cortex-M0plus) + set(ARMFVP_FLAGS + -C armcortexm0plusct.NUM_MPU_REGION=8 + -C armcortexm0plusct.USER=1 + -C armcortexm0plusct.VTOR=1 + ) elseif(CONFIG_BOARD_MPS2_AN521_CPU0 OR CONFIG_BOARD_MPS2_AN521_CPU0_NS OR CONFIG_BOARD_MPS2_AN521_CPU1) set(QEMU_CPU_TYPE_${ARCH} cortex-m33) set(QEMU_FLAGS_${ARCH} @@ -19,11 +28,7 @@ elseif(CONFIG_BOARD_MPS2_AN521_CPU0 OR CONFIG_BOARD_MPS2_AN521_CPU0_NS OR CONFIG -m 16 -vga none ) -endif() -board_set_debugger_ifnset(qemu) - -if(CONFIG_BOARD_MPS2_AN521_CPU0 OR CONFIG_BOARD_MPS2_AN521_CPU0_NS OR CONFIG_BOARD_MPS2_AN521_CPU1) # To enable a host tty switch between serial and pty # -chardev serial,path=/dev/ttyS0,id=hostS0 # pty is not available on Windows. @@ -44,3 +49,18 @@ if(CONFIG_BOARD_MPS2_AN521_CPU0 OR CONFIG_BOARD_MPS2_AN521_CPU0_NS OR CONFIG_BOA list(APPEND QEMU_EXTRA_FLAGS "-device;loader,file=${PROJECT_BINARY_DIR}/${KERNEL_ELF_NAME}") endif() endif() + +board_set_debugger_ifnset(qemu) + +set(ARMFVP_FLAGS ${ARMFVP_FLAGS} +-C fvp_mps2.telnetterminal0.start_telnet=0 +-C fvp_mps2.telnetterminal1.start_telnet=0 +-C fvp_mps2.telnetterminal2.start_telnet=0 +-C fvp_mps2.UART0.out_file=- +-C fvp_mps2.UART0.unbuffered_output=1 +-C fvp_mps2.UART1.out_file=- +-C fvp_mps2.UART1.unbuffered_output=1 +-C fvp_mps2.UART2.out_file=- +-C fvp_mps2.UART2.unbuffered_output=1 +-C fvp_mps2.mps2_visualisation.disable-visualisation=1 +) diff --git a/boards/arm/mps2/board.yml b/boards/arm/mps2/board.yml index 779a8ed21cc..88cf3a2b80a 100644 --- a/boards/arm/mps2/board.yml +++ b/boards/arm/mps2/board.yml @@ -3,6 +3,7 @@ board: full_name: V2M MPS2 vendor: arm socs: + - name: an383 - name: an385 - name: an521 variants: diff --git a/boards/arm/mps2/doc/img/mps2_an521.jpg b/boards/arm/mps2/doc/img/mps2.jpg similarity index 100% rename from boards/arm/mps2/doc/img/mps2_an521.jpg rename to boards/arm/mps2/doc/img/mps2.jpg diff --git a/boards/arm/mps2/doc/img/mps2_an385.jpg b/boards/arm/mps2/doc/img/mps2_an385.jpg deleted file mode 100644 index 58e42290939..00000000000 Binary files a/boards/arm/mps2/doc/img/mps2_an385.jpg and /dev/null differ diff --git a/boards/arm/mps2/doc/mps2_an383.rst b/boards/arm/mps2/doc/mps2_an383.rst new file mode 100644 index 00000000000..a8f6d550acb --- /dev/null +++ b/boards/arm/mps2/doc/mps2_an383.rst @@ -0,0 +1,271 @@ +.. _mps2_an383_board: + +ARM V2M MPS2 AN383 +################## + +Overview +******** + +The ``mps2/an383`` board target is used by Zephyr applications that run on +the V2M MPS2 board. It provides support for the ARM Cortex-M0+ (AN383) CPU and +the following devices: + +- Nested Vectored Interrupt Controller (NVIC) +- System Tick System Clock (SYSTICK) +- Cortex-M System Design Kit UART + +.. image:: img/mps2.jpg + :align: center + :alt: ARM V2M MPS2 + +In addition to enabling actual hardware usage, this board target can +also use `FVP`_. to emulate the AN383 platform running on the MPS2+. + +More information about the board can be found at the `V2M MPS2 Website`_. + +The Application Note AN383 can be found at `Application Note AN383`_. + +.. note:: + This board target makes no claims about its suitability for use + with actual MPS2 hardware systems using AN383, or any other hardware + system. It has been tested on FVP. + + +Hardware +******** + +ARM V2M MPS2 AN383 provides the following hardware components: + +- ARM Cortex-M0+ +- ARM IoT Subsystem for Cortex-M +- Form factor: 140x120cm +- ZBTSRAM: 8MB single cycle SRAM, 16MB PSRAM +- Video: QSVGA touch screen panel, 4bit RGB VGA connector +- Audio: Audio Codec +- Debug: + + - ARM JTAG20 connector + - ARM parallel trace connector (MICTOR38) + - 20 pin Cortex debug connector + - 10 pin Cortex debug connector + - ILA connector for FPGA debug + +- Expansion + + - GPIO + - SPI + +.. note:: + 4 MB of flash memory (in ZBTSRAM 1, starting at address 0x00400000) and 4 MB of RAM + (in ZBTSRAM 2 & 3, starting at address 0x20000000) are available. + +Supported Features +================== + +The ``mps2/an383`` board target supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| SYSTICK | on-chip | systick | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| WATCHDOG | on-chip | watchdog | ++-----------+------------+-------------------------------------+ +| TIMER | on-chip | counter | ++-----------+------------+-------------------------------------+ +| DUALTIMER | on-chip | counter | ++-----------+------------+-------------------------------------+ + +Other hardware features are not currently supported by the port. +See the `V2M MPS2 Website`_ for a complete list of V2M MPS2 board hardware +features. + +The default configuration can be found in +:zephyr_file:`boards/arm/mps2/mps2_an383_defconfig` + +Interrupt Controller +==================== + +MPS2 is a Cortex-M0+ based SoC and has 6 fixed exceptions and 32 IRQs. + +A Cortex-M0+ board uses vectored exceptions. This means each exception +calls a handler directly from the vector table. + +Handlers are provided for exceptions 1-3, 11, and 14-15. The table here +MPS2 is a Cortex-M0+ based SoC and has 15 fixed exceptions and 45 IRQs. + ++------+------------+----------------+--------------------------+ +| Exc# | Name | Remarks | Used by Zephyr Kernel | ++======+============+================+==========================+ +| 1 | Reset | | system initialization | ++------+------------+----------------+--------------------------+ +| 2 | NMI | | system fatal error | ++------+------------+----------------+--------------------------+ +| 3 | Hard fault | | system fatal error | ++------+------------+----------------+--------------------------+ +| 11 | SVC | | system calls, kernel | +| | | | run-time exceptions, | +| | | | and IRQ offloading | ++------+------------+----------------+--------------------------+ +| 14 | PendSV | | context switch | ++------+------------+----------------+--------------------------+ +| 15 | SYSTICK | optional | system clock | ++------+------------+----------------+--------------------------+ + +Pin Mapping +=========== + +The ARM V2M MPS2 Board has 4 GPIO controllers. These controllers are responsible +for pin muxing, input/output, pull-up, etc. + +All GPIO controller pins are exposed via the following sequence of pin numbers: + +- Pins 0 - 15 are for GPIO 0 +- Pins 16 - 31 are for GPIO 1 +- Pins 32 - 47 are for GPIO 2 +- Pins 48 - 51 are for GPIO 3 + +Mapping from the ARM MPS2 Board pins to GPIO controllers: + +.. rst-class:: rst-columns + + - D0 : EXT_0 + - D1 : EXT_4 + - D2 : EXT_2 + - D3 : EXT_3 + - D4 : EXT_1 + - D5 : EXT_6 + - D6 : EXT_7 + - D7 : EXT_8 + - D8 : EXT_9 + - D9 : EXT_10 + - D10 : EXT_12 + - D11 : EXT_13 + - D12 : EXT_14 + - D13 : EXT_11 + - D14 : EXT_15 + - D15 : EXT_5 + - D16 : EXT_16 + - D17 : EXT_17 + - D18 : EXT_18 + - D19 : EXT_19 + - D20 : EXT_20 + - D21 : EXT_21 + - D22 : EXT_22 + - D23 : EXT_23 + - D24 : EXT_24 + - D25 : EXT_25 + - D26 : EXT_26 + - D27 : EXT_30 + - D28 : EXT_28 + - D29 : EXT_29 + - D30 : EXT_27 + - D31 : EXT_32 + - D32 : EXT_33 + - D33 : EXT_34 + - D34 : EXT_35 + - D35 : EXT_36 + - D36 : EXT_38 + - D37 : EXT_39 + - D38 : EXT_40 + - D39 : EXT_44 + - D40 : EXT_41 + - D41 : EXT_31 + - D42 : EXT_37 + - D43 : EXT_42 + - D44 : EXT_43 + - D45 : EXT_45 + - D46 : EXT_46 + - D47 : EXT_47 + - D48 : EXT_48 + - D49 : EXT_49 + - D50 : EXT_50 + - D51 : EXT_51 + +Peripheral Mapping: + +.. rst-class:: rst-columns + + - UART_3_RX : D0 + - UART_3_TX : D1 + - SPI_3_CS : D10 + - SPI_3_MOSI : D11 + - SPI_3_MISO : D12 + - SPI_3_SCLK : D13 + - I2C_3_SDA : D14 + - I2C_3_SCL : D15 + - UART_4_RX : D26 + - UART_4_TX : D30 + - SPI_4_CS : D36 + - SPI_4_MOSI : D37 + - SPI_4_MISO : D38 + - SPI_4_SCK : D39 + - I2C_4_SDA : D40 + - I2C_4_SCL : D41 + +For more details please refer to `MPS2 Technical Reference Manual (TRM)`_. + +System Clock +============ + +The V2M MPS2 main clock is 24 MHz. + +Serial Port +=========== + +The V2M MPS2 processor has five UARTs. Both the UARTs have only two wires for +RX/TX and no flow control (CTS/RTS) or FIFO. The Zephyr console output, by +default, is utilizing UART0. + +Programming and Debugging +************************* + +Flashing +======== + +V2M MPS2 provides: + +- A USB connection to the host computer, which exposes a Mass Storage and an + USB Serial Port. +- A Serial Flash device, which implements the USB flash disk file storage. +- A physical UART connection which is relayed over interface USB Serial port. + +Flashing an application to V2M MPS2 +----------------------------------- + +Here is an example for the :ref:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: mps2/an383 + :goals: build + +Connect the V2M MPS2 to your host computer using the USB port and you should +see a USB connection which exposes a Mass Storage and a USB Serial Port. +Copy the generated zephyr.bin in the exposed drive. +Reset the board and you should be able to see on the corresponding Serial Port +the following message: + +.. code-block:: console + + Hello World! arm + + +.. _V2M MPS2 Website: + https://developer.mbed.org/platforms/ARM-MPS2/ + +.. _MPS2 Technical Reference Manual (TRM): + http://infocenter.arm.com/help/topic/com.arm.doc.100112_0200_05_en/versatile_express_cortex_m_prototyping_systems_v2m_mps2_and_v2m_mps2plus_technical_reference_100112_0200_05_en.pdf + +.. _Application Note AN383: + https://documentation-service.arm.com/static/5ed1051dca06a95ce53f88a1 + +.. _FVP: + https://developer.arm.com/downloads/view/FMFVP diff --git a/boards/arm/mps2/doc/mps2_an385.rst b/boards/arm/mps2/doc/mps2_an385.rst index 79f01dc9c53..19b759125e4 100644 --- a/boards/arm/mps2/doc/mps2_an385.rst +++ b/boards/arm/mps2/doc/mps2_an385.rst @@ -1,7 +1,7 @@ .. _mps2_an385_board: -ARM V2M MPS2 -############ +ARM V2M MPS2 AN385 +################## Overview ******** @@ -14,7 +14,7 @@ the following devices: - System Tick System Clock (SYSTICK) - Cortex-M System Design Kit UART -.. image:: img/mps2_an385.jpg +.. image:: img/mps2.jpg :align: center :alt: ARM V2M MPS2 diff --git a/boards/arm/mps2/doc/mps2_an521.rst b/boards/arm/mps2/doc/mps2_an521.rst index 33a4f4d7ca6..067b4f286b0 100644 --- a/boards/arm/mps2/doc/mps2_an521.rst +++ b/boards/arm/mps2/doc/mps2_an521.rst @@ -15,7 +15,7 @@ CPU and the following devices: - Cortex-M System Design Kit GPIO - Cortex-M System Design Kit UART -.. image:: img/mps2_an521.jpg +.. image:: img/mps2.jpg :align: center :alt: ARM MPS2+ AN521 diff --git a/boards/arm/mps2/mps2_an383.dts b/boards/arm/mps2/mps2_an383.dts new file mode 100644 index 00000000000..ef21f37b3f7 --- /dev/null +++ b/boards/arm/mps2/mps2_an383.dts @@ -0,0 +1,30 @@ +/* + * Copyright 2024 Arm Limited and/or its affiliates + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include +#include +#include "mps2_base.dtsi" + +/* FVP does not support uart3 and uart4 */ +/* hence we delete them for AN383 in FVP */ +/delete-node/ &uart3; +/delete-node/ &uart4; + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m0+"; + reg = <0>; + }; + }; +}; diff --git a/boards/arm/mps2/mps2_an383.yaml b/boards/arm/mps2/mps2_an383.yaml new file mode 100644 index 00000000000..c7e2ae8ba3f --- /dev/null +++ b/boards/arm/mps2/mps2_an383.yaml @@ -0,0 +1,19 @@ +identifier: mps2/an383 +name: ARM V2M MPS2-an383 +type: mcu +arch: arm +simulation: + - name: armfvp + exec: FVP_MPS2_Cortex-M0plus +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - counter + - netif:serial-net + - gpio + - watchdog +testing: + default: true +vendor: arm diff --git a/boards/arm/mps2/mps2_an383_defconfig b/boards/arm/mps2/mps2_an383_defconfig new file mode 100644 index 00000000000..aaa7c33d63d --- /dev/null +++ b/boards/arm/mps2/mps2_an383_defconfig @@ -0,0 +1,20 @@ +# +# Copyright 2024 Arm Limited and/or its affiliates +# +# SPDX-License-Identifier: Apache-2.0 +# + +CONFIG_RUNTIME_NMI=y + +# GPIOs +CONFIG_GPIO=y + +# Serial +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y + +CONFIG_ARM_MPU=y + +# 0x0 is a valid address, we cannot prevent access to that area +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y diff --git a/boards/arm/mps2/mps2_an385.dts b/boards/arm/mps2/mps2_an385.dts index d2db1cebed0..9206eb47039 100644 --- a/boards/arm/mps2/mps2_an385.dts +++ b/boards/arm/mps2/mps2_an385.dts @@ -1,58 +1,17 @@ -/* SPDX-License-Identifier: Apache-2.0 */ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright 2024 Arm Limited and/or its affiliates + */ /dts-v1/; #include #include #include +#include "mps2_base.dtsi" / { - compatible = "arm,mps2"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - led0 = &led_0; - led1 = &led_1; - sw0 = &user_button_0; - sw1 = &user_button_1; - watchdog0 = &wdog0; - }; - - chosen { - zephyr,console = &uart0; - zephyr,shell-uart = &uart0; - zephyr,uart-pipe = &uart1; - zephyr,sram = &sram0; - zephyr,flash = &flash0; - }; - - leds { - compatible = "gpio-leds"; - led_0: led_0 { - gpios = <&gpio_led0 0>; - label = "USERLED0"; - }; - led_1: led_1 { - gpios = <&gpio_led0 1>; - label = "USERLED1"; - }; - }; - - gpio_keys { - compatible = "gpio-keys"; - user_button_0: button_0 { - label = "USERPB0"; - gpios = <&gpio_button 0>; - zephyr,code = ; - }; - user_button_1: button_1 { - label = "USERPB1"; - gpios = <&gpio_button 1>; - zephyr,code = ; - }; - }; - cpus { #address-cells = <1>; #size-cells = <0>; @@ -62,223 +21,4 @@ reg = <0>; }; }; - - sram0: memory@20000000 { - compatible = "mmio-sram"; - reg = <0x20000000 0x400000>; - }; - - flash0: flash@0 { - compatible = "soc-nv-flash"; - reg = <0 0x400000>; - }; - - sim_flash_controller: sim_flash_controller { - compatible = "zephyr,sim-flash"; - - #address-cells = <1>; - #size-cells = <1>; - erase-value = <0x00>; - - flash_sim0: flash_sim@0 { - compatible = "soc-nv-flash"; - reg = <0x00000000 0x8000>; - - erase-block-size = <1024>; - write-block-size = <4>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - storage_partition: partition@0 { - label = "storage_partition"; - reg = <0x00000000 0x8000>; - }; - }; - }; - }; - - sysclk: system-clock { - compatible = "fixed-clock"; - clock-frequency = <25000000>; - #clock-cells = <0>; - }; - - soc { - timer0: timer@40000000 { - compatible = "arm,cmsdk-timer"; - reg = <0x40000000 0x1000>; - interrupts = <8 3>; - }; - - timer1: timer@40001000 { - compatible = "arm,cmsdk-timer"; - reg = <0x40001000 0x1000>; - interrupts = <9 3>; - }; - - dtimer0: dtimer@40002000 { - compatible = "arm,cmsdk-dtimer"; - reg = <0x40002000 0x1000>; - interrupts = <10 3>; - }; - - uart0: uart@40004000 { - compatible = "arm,cmsdk-uart"; - reg = <0x40004000 0x1000>; - interrupts = <1 3 0 3>; - interrupt-names = "tx", "rx"; - clocks = <&sysclk>; - current-speed = <115200>; - }; - - uart1: uart@40005000 { - compatible = "arm,cmsdk-uart"; - reg = <0x40005000 0x1000>; - interrupts = <3 3 2 3>; - interrupt-names = "tx", "rx"; - clocks = <&sysclk>; - current-speed = <115200>; - }; - - uart2: uart@40006000 { - compatible = "arm,cmsdk-uart"; - reg = <0x40006000 0x1000>; - interrupts = <5 3 4 3>; - interrupt-names = "tx", "rx"; - clocks = <&sysclk>; - current-speed = <115200>; - }; - - uart3: uart@40007000 { - compatible = "arm,cmsdk-uart"; - reg = <0x40007000 0x1000>; - interrupts = <19 3 18 3>; - interrupt-names = "tx", "rx"; - clocks = <&sysclk>; - current-speed = <115200>; - }; - - wdog0: wdog@40008000 { - compatible = "arm,cmsdk-watchdog"; - clocks = <&sysclk>; - reg = <0x40008000 0x1000>; - }; - - uart4: uart@40009000 { - compatible = "arm,cmsdk-uart"; - reg = <0x40009000 0x1000>; - interrupts = <21 3 20 3>; - interrupt-names = "tx", "rx"; - clocks = <&sysclk>; - current-speed = <115200>; - }; - - gpio0: gpio@40010000 { - compatible = "arm,cmsdk-gpio"; - reg = <0x40010000 0x1000>; - interrupts = <6 3>; - gpio-controller; - #gpio-cells = <2>; - }; - - gpio1: gpio@40011000 { - compatible = "arm,cmsdk-gpio"; - reg = <0x40011000 0x1000>; - interrupts = <7 3>; - gpio-controller; - #gpio-cells = <2>; - }; - - gpio2: gpio@40012000 { - compatible = "arm,cmsdk-gpio"; - reg = <0x40012000 0x1000>; - interrupts = <16 3>; - gpio-controller; - #gpio-cells = <2>; - }; - - gpio3: gpio@40013000 { - compatible = "arm,cmsdk-gpio"; - reg = <0x40013000 0x1000>; - interrupts = <17 3>; - gpio-controller; - #gpio-cells = <2>; - }; - - eth0: eth@40200000 { - /* Linux has "smsc,lan9115" */ - compatible = "smsc,lan9220"; - /* Such a big size from memory map in AN385 */ - /* Actual reg range is ~0x200 */ - reg = <0x40200000 0x100000>; - interrupts = <13 3>; - }; - - i2c_touch: i2c@40022000 { - compatible = "arm,versatile-i2c"; - clock-frequency = ; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x40022000 0x1000>; - }; - - i2c_audio_conf: i2c@40023000 { - compatible = "arm,versatile-i2c"; - clock-frequency = ; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x40023000 0x1000>; - }; - - i2c_shield0: i2c@40029000 { - compatible = "arm,versatile-i2c"; - clock-frequency = ; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x40029000 0x1000>; - }; - - i2c_shield1: i2c@4002a000 { - compatible = "arm,versatile-i2c"; - clock-frequency = ; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x4002a000 0x1000>; - }; - - gpio_led0: mps2_fpgaio@40028000 { - compatible = "arm,mps2-fpgaio-gpio"; - - reg = <0x40028000 0x4>; - gpio-controller; - #gpio-cells = <1>; - ngpios = <2>; - }; - - gpio_button: mps2_fpgaio@40028008 { - compatible = "arm,mps2-fpgaio-gpio"; - - reg = <0x40028008 0x4>; - gpio-controller; - #gpio-cells = <1>; - ngpios = <2>; - }; - - gpio_misc: mps2_fpgaio@4002804c { - compatible = "arm,mps2-fpgaio-gpio"; - - reg = <0x4002804c 0x4>; - gpio-controller; - #gpio-cells = <1>; - ngpios = <10>; - }; - - }; -}; - -&nvic { - arm,num-irq-priority-bits = <3>; }; diff --git a/boards/arm/mps2/mps2_base.dtsi b/boards/arm/mps2/mps2_base.dtsi new file mode 100644 index 00000000000..7d332d7f063 --- /dev/null +++ b/boards/arm/mps2/mps2_base.dtsi @@ -0,0 +1,265 @@ +/* Copyright 2024 Arm Limited and/or its affiliates */ +/* SPDX-License-Identifier: Apache-2.0 */ + +/ { + compatible = "arm,mps2"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + led0 = &led_0; + led1 = &led_1; + sw0 = &user_button_0; + sw1 = &user_button_1; + watchdog0 = &wdog0; + }; + + chosen { + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,uart-pipe = &uart1; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; + + leds { + compatible = "gpio-leds"; + led_0: led_0 { + gpios = <&gpio_led0 0>; + label = "USERLED0"; + }; + + led_1: led_1 { + gpios = <&gpio_led0 1>; + label = "USERLED1"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button_0: button_0 { + label = "USERPB0"; + gpios = <&gpio_button 0>; + zephyr,code = ; + }; + + user_button_1: button_1 { + label = "USERPB1"; + gpios = <&gpio_button 1>; + zephyr,code = ; + }; + }; + + sram0: memory@20000000 { + compatible = "mmio-sram"; + reg = <0x20000000 0x400000>; + }; + + flash0: flash@0 { + compatible = "soc-nv-flash"; + reg = <0 0x400000>; + }; + + sim_flash_controller: sim_flash_controller { + compatible = "zephyr,sim-flash"; + #address-cells = <1>; + #size-cells = <1>; + erase-value = <0x00>; + + flash_sim0: flash_sim@0 { + compatible = "soc-nv-flash"; + reg = <0x00000000 0x8000>; + erase-block-size = <1024>; + write-block-size = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + storage_partition: partition@0 { + label = "storage_partition"; + reg = <0x00000000 0x8000>; + }; + }; + }; + }; + + sysclk: system-clock { + compatible = "fixed-clock"; + clock-frequency = <25000000>; + #clock-cells = <0>; + }; + + soc { + timer0: timer@40000000 { + compatible = "arm,cmsdk-timer"; + reg = <0x40000000 0x1000>; + interrupts = <8 3>; + }; + + timer1: timer@40001000 { + compatible = "arm,cmsdk-timer"; + reg = <0x40001000 0x1000>; + interrupts = <9 3>; + }; + + dtimer0: dtimer@40002000 { + compatible = "arm,cmsdk-dtimer"; + reg = <0x40002000 0x1000>; + interrupts = <10 3>; + }; + + uart0: uart@40004000 { + compatible = "arm,cmsdk-uart"; + reg = <0x40004000 0x1000>; + interrupts = <1 3 0 3>; + interrupt-names = "tx", "rx"; + clocks = <&sysclk>; + current-speed = <115200>; + }; + + uart1: uart@40005000 { + compatible = "arm,cmsdk-uart"; + reg = <0x40005000 0x1000>; + interrupts = <3 3 2 3>; + interrupt-names = "tx", "rx"; + clocks = <&sysclk>; + current-speed = <115200>; + }; + + uart2: uart@40006000 { + compatible = "arm,cmsdk-uart"; + reg = <0x40006000 0x1000>; + interrupts = <5 3 4 3>; + interrupt-names = "tx", "rx"; + clocks = <&sysclk>; + current-speed = <115200>; + }; + + uart3: uart@40007000 { + compatible = "arm,cmsdk-uart"; + reg = <0x40007000 0x1000>; + interrupts = <19 3 18 3>; + interrupt-names = "tx", "rx"; + clocks = <&sysclk>; + current-speed = <115200>; + }; + + wdog0: wdog@40008000 { + compatible = "arm,cmsdk-watchdog"; + clocks = <&sysclk>; + reg = <0x40008000 0x1000>; + }; + + uart4: uart@40009000 { + compatible = "arm,cmsdk-uart"; + reg = <0x40009000 0x1000>; + interrupts = <21 3 20 3>; + interrupt-names = "tx", "rx"; + clocks = <&sysclk>; + current-speed = <115200>; + }; + + gpio0: gpio@40010000 { + compatible = "arm,cmsdk-gpio"; + reg = <0x40010000 0x1000>; + interrupts = <6 3>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio1: gpio@40011000 { + compatible = "arm,cmsdk-gpio"; + reg = <0x40011000 0x1000>; + interrupts = <7 3>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio2: gpio@40012000 { + compatible = "arm,cmsdk-gpio"; + reg = <0x40012000 0x1000>; + interrupts = <16 3>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio3: gpio@40013000 { + compatible = "arm,cmsdk-gpio"; + reg = <0x40013000 0x1000>; + interrupts = <17 3>; + gpio-controller; + #gpio-cells = <2>; + }; + + eth0: eth@40200000 { + /* Linux has "smsc,lan9115" */ + compatible = "smsc,lan9220"; + /* Such a big size from memory map in AN385 */ + /* Actual reg range is ~0x200 */ + reg = <0x40200000 0x100000>; + interrupts = <13 3>; + }; + + i2c_touch: i2c@40022000 { + compatible = "arm,versatile-i2c"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40022000 0x1000>; + }; + + i2c_audio_conf: i2c@40023000 { + compatible = "arm,versatile-i2c"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40023000 0x1000>; + }; + + i2c_shield0: i2c@40029000 { + compatible = "arm,versatile-i2c"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40029000 0x1000>; + }; + + i2c_shield1: i2c@4002a000 { + compatible = "arm,versatile-i2c"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4002a000 0x1000>; + }; + + gpio_led0: mps2_fpgaio@40028000 { + compatible = "arm,mps2-fpgaio-gpio"; + reg = <0x40028000 0x4>; + gpio-controller; + #gpio-cells = <1>; + ngpios = <2>; + }; + + gpio_button: mps2_fpgaio@40028008 { + compatible = "arm,mps2-fpgaio-gpio"; + reg = <0x40028008 0x4>; + gpio-controller; + #gpio-cells = <1>; + ngpios = <2>; + }; + + gpio_misc: mps2_fpgaio@4002804c { + compatible = "arm,mps2-fpgaio-gpio"; + reg = <0x4002804c 0x4>; + gpio-controller; + #gpio-cells = <1>; + ngpios = <10>; + }; + }; +}; + +&nvic { + arm,num-irq-priority-bits = <3>; +}; diff --git a/drivers/gpio/gpio_mmio32.c b/drivers/gpio/gpio_mmio32.c index b88fac97a8e..5244f45f29e 100644 --- a/drivers/gpio/gpio_mmio32.c +++ b/drivers/gpio/gpio_mmio32.c @@ -147,6 +147,13 @@ static int gpio_mmio32_port_toggle_bits(const struct device *dev, return 0; } +int gpio_mmio_pin_interrupt_configure(const struct device *port, + gpio_pin_t pin, + enum gpio_int_mode, enum gpio_int_trig) +{ + return -ENOTSUP; +} + DEVICE_API(gpio, gpio_mmio32_api) = { .pin_configure = gpio_mmio32_config, .port_get_raw = gpio_mmio32_port_get_raw, @@ -154,6 +161,7 @@ DEVICE_API(gpio, gpio_mmio32_api) = { .port_set_bits_raw = gpio_mmio32_port_set_bits_raw, .port_clear_bits_raw = gpio_mmio32_port_clear_bits_raw, .port_toggle_bits = gpio_mmio32_port_toggle_bits, + .pin_interrupt_configure = gpio_mmio_pin_interrupt_configure, }; int gpio_mmio32_init(const struct device *dev) diff --git a/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/board.cmake b/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/board.cmake index 27c74975756..f89df3a4486 100644 --- a/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/board.cmake +++ b/tests/cmake/hwm/board_extend/oot_root/boards/arm/mps2/board.cmake @@ -3,6 +3,7 @@ # Copyright (c) 2024, Nordic Semiconductor ASA if(CONFIG_BOARD_MPS2_AN521_CPUTEST) + set(SUPPORTED_EMU_PLATFORMS qemu) set(QEMU_CPU_TYPE_${ARCH} cortex-m33) set(QEMU_FLAGS_${ARCH} -cpu ${QEMU_CPU_TYPE_${ARCH}} diff --git a/tests/drivers/gpio/gpio_api_1pin/testcase.yaml b/tests/drivers/gpio/gpio_api_1pin/testcase.yaml index dd6a1149a25..a60abbc0065 100644 --- a/tests/drivers/gpio/gpio_api_1pin/testcase.yaml +++ b/tests/drivers/gpio/gpio_api_1pin/testcase.yaml @@ -13,6 +13,7 @@ tests: platform_exclude: - mps2/an385 - mps2/an521/cpu0 + - mps2/an383 - neorv32 drivers.gpio.1pin.aw9523b: tags: diff --git a/tests/drivers/watchdog/wdt_basic_api/testcase.yaml b/tests/drivers/watchdog/wdt_basic_api/testcase.yaml index da3497f41be..1002ab86199 100644 --- a/tests/drivers/watchdog/wdt_basic_api/testcase.yaml +++ b/tests/drivers/watchdog/wdt_basic_api/testcase.yaml @@ -16,6 +16,7 @@ tests: - s32z2xxdc2/s32z270/rtu1 - s32z2xxdc2@D/s32z270/rtu0 - s32z2xxdc2@D/s32z270/rtu1 + - mps2/an383 drivers.watchdog.stm32wwdg: filter: dt_compat_enabled("st,stm32-window-watchdog") or dt_compat_enabled("st,stm32-watchdog") extra_args: DTC_OVERLAY_FILE="boards/stm32_wwdg.overlay" diff --git a/tests/net/socket/tcp/testcase.yaml b/tests/net/socket/tcp/testcase.yaml index a7593ffcdd3..aa7fc4cbee5 100644 --- a/tests/net/socket/tcp/testcase.yaml +++ b/tests/net/socket/tcp/testcase.yaml @@ -11,7 +11,9 @@ common: # FIXME: This test fails very frequently on mps2/an385 due to the system # timer stability issues, so keep it disabled until the root cause # is fixed (GitHub issue zephyrproject-rtos/zephyr#48608). - platform_exclude: mps2/an385 + platform_exclude: + - mps2/an385 + - mps2/an383 tests: net.socket.tcp: extra_configs: diff --git a/tests/subsys/llext/testcase.yaml b/tests/subsys/llext/testcase.yaml index 2d97da954cf..c7fe918444c 100644 --- a/tests/subsys/llext/testcase.yaml +++ b/tests/subsys/llext/testcase.yaml @@ -7,6 +7,7 @@ common: - s32z2xxdc2/s32z270/rtu1 # See commit 18a0660 # platforms that are always skipped by the runtime filter - qemu_cortex_m0 + - mps2/an383 - qemu_xtensa/dc233c/mmu integration_platforms: - qemu_cortex_a9 # ARM Cortex-A9 (ARMv7-A ISA)