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arch: arc: modify the linker template for APPLICAITON Memory

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The application memory area has a requirement of address alignment,
especially when MPU requires power of 2.

Modify the linker tmemplate to apply application memory address
alignment generation

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
This commit is contained in:
Wayne Ren 2018-02-12 19:20:22 +08:00 • committed by ruuddw
commit 8d284116b0
1 changed files with 19 additions and 12 deletions
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31
include/arch/arc/v2/linker.ld
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@ -39,12 +39,13 @@
#ifdef CONFIG_ARC_MPU_ENABLE #ifdef CONFIG_ARC_MPU_ENABLE
#if CONFIG_ARC_MPU_VER == 2 #if CONFIG_ARC_MPU_VER == 2
#define MPU_ADDR_ALIGN . = ALIGN(2048); #define MPU_MIN_SIZE 2048
#elif CONFIG_ARC_MPU_VER == 3 #elif CONFIG_ARC_MPU_VER == 3
#define MPU_ADDR_ALIGN . = ALIGN(32); #define MPU_MIN_SIZE 32
#endif #endif
#define MPU_MIN_SIZE_ALIGN . = ALIGN(MPU_MIN_SIZE );
#else #else
#define MPU_ADDR_ALIGN #define MPU_MIN_SIZE_ALIGN
#endif #endif
#if defined(CONFIG_XIP) #if defined(CONFIG_XIP)
@ -118,7 +119,7 @@ SECTIONS {
} GROUP_LINK_IN(ROMABLE_REGION) } GROUP_LINK_IN(ROMABLE_REGION)
_image_rodata_end = .; _image_rodata_end = .;
MPU_ADDR_ALIGN MPU_MIN_SIZE_ALIGN
_image_rom_end = .; _image_rom_end = .;
_image_rom_size = _image_rom_end - _image_rom_start; _image_rom_size = _image_rom_end - _image_rom_start;
@ -129,7 +130,9 @@ SECTIONS {
#ifdef CONFIG_APPLICATION_MEMORY #ifdef CONFIG_APPLICATION_MEMORY
SECTION_DATA_PROLOGUE(_APP_DATA_SECTION_NAME, (OPTIONAL),) SECTION_DATA_PROLOGUE(_APP_DATA_SECTION_NAME, (OPTIONAL),)
{ {
MPU_ADDR_ALIGN MPU_MIN_SIZE_ALIGN
#include <app_data_alignment.ld>
__app_ram_start = .; __app_ram_start = .;
__app_data_ram_start = .; __app_data_ram_start = .;
_image_ram_start = .; _image_ram_start = .;
@ -155,19 +158,23 @@ SECTIONS {
{ {
APP_INPUT_SECTION(.noinit) APP_INPUT_SECTION(.noinit)
APP_INPUT_SECTION(".noinit.*") APP_INPUT_SECTION(".noinit.*")
/*
* for MPU v2,the application memory section must be aligned to the size of
* section
*/
MPU_ADDR_ALIGN
} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION) } GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
__app_last_address_used = .;
/* Pad out application ram area to make MPU friendly */
SECTION_PROLOGUE(app_pad, (NOLOAD OPTIONAL),)
{
. = ALIGN(_app_data_align);
MPU_MIN_SIZE_ALIGN
} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
__app_ram_end = .; __app_ram_end = .;
__app_ram_size = __app_ram_end - __app_ram_start; __app_ram_size = __app_ram_end - __app_ram_start;
#endif /* CONFIG_APPLICATION_MEMORY */ #endif /* CONFIG_APPLICATION_MEMORY */
SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),) { SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),) {
MPU_ADDR_ALIGN MPU_MIN_SIZE_ALIGN
/* /*
* For performance, BSS section is assumed to be 4 byte aligned and * For performance, BSS section is assumed to be 4 byte aligned and
* a multiple of 4 bytes * a multiple of 4 bytes
@ -224,7 +231,7 @@ SECTIONS {
__data_ram_end = .; __data_ram_end = .;
MPU_ADDR_ALIGN MPU_MIN_SIZE_ALIGN
/* Define linker symbols */ /* Define linker symbols */
_image_ram_end = .; _image_ram_end = .;