diff --git a/drivers/adc/adc_stm32.c b/drivers/adc/adc_stm32.c index 9558ccdefaa..9875d43a932 100644 --- a/drivers/adc/adc_stm32.c +++ b/drivers/adc/adc_stm32.c @@ -161,6 +161,18 @@ static const u32_t table_samp_time[] = { SMP_TIME(247, S_5), SMP_TIME(640, S_5), }; +#elif defined(CONFIG_SOC_SERIES_STM32L1X) +static const u16_t acq_time_tbl[8] = {5, 10, 17, 25, 49, 97, 193, 385}; +static const u32_t table_samp_time[] = { + SMP_TIME(4, S), + SMP_TIME(9, S), + SMP_TIME(16, S), + SMP_TIME(24, S), + SMP_TIME(48, S), + SMP_TIME(96, S), + SMP_TIME(192, S), + SMP_TIME(384, S), +}; #endif /* 16 external channels. */ @@ -456,7 +468,8 @@ static int adc_stm32_channel_setup(struct device *dev, #if !defined(CONFIG_SOC_SERIES_STM32F2X) && \ !defined(CONFIG_SOC_SERIES_STM32F4X) && \ !defined(CONFIG_SOC_SERIES_STM32F7X) && \ - !defined(CONFIG_SOC_SERIES_STM32F1X) + !defined(CONFIG_SOC_SERIES_STM32F1X) && \ + !defined(CONFIG_SOC_SERIES_STM32L1X) static void adc_stm32_calib(struct device *dev) { struct adc_stm32_cfg *config = @@ -534,12 +547,16 @@ static int adc_stm32_init(struct device *dev) defined(CONFIG_SOC_SERIES_STM32G4X) LL_ADC_SetCommonClock(__LL_ADC_COMMON_INSTANCE(adc), LL_ADC_CLOCK_SYNC_PCLK_DIV4); +#elif defined(CONFIG_SOC_SERIES_STM32L1X) + LL_ADC_SetCommonClock(__LL_ADC_COMMON_INSTANCE(adc), + LL_ADC_CLOCK_ASYNC_DIV4); #endif #if !defined(CONFIG_SOC_SERIES_STM32F2X) && \ !defined(CONFIG_SOC_SERIES_STM32F4X) && \ !defined(CONFIG_SOC_SERIES_STM32F7X) && \ - !defined(CONFIG_SOC_SERIES_STM32F1X) + !defined(CONFIG_SOC_SERIES_STM32F1X) && \ + !defined(CONFIG_SOC_SERIES_STM32L1X) /* * Calibration of F1 series has to be started after ADC Module is * enabled. diff --git a/drivers/pinmux/stm32/pinmux_stm32l1x.h b/drivers/pinmux/stm32/pinmux_stm32l1x.h index a137f970e96..5c87f08dc0a 100644 --- a/drivers/pinmux/stm32/pinmux_stm32l1x.h +++ b/drivers/pinmux/stm32/pinmux_stm32l1x.h @@ -17,26 +17,42 @@ (STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL) #define STM32L1X_PINMUX_FUNC_PA0_USART2_CTS \ (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP) +#define STM32L1X_PINMUX_FUNC_PA0_ADC1_IN0 \ + STM32_MODER_ANALOG_MODE #define STM32L1X_PINMUX_FUNC_PA1_PWM2_CH2 \ (STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL) #define STM32L1X_PINMUX_FUNC_PA1_USART2_RTS \ (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL) +#define STM32L1X_PINMUX_FUNC_PA1_ADC1_IN1 \ + STM32_MODER_ANALOG_MODE #define STM32L1X_PINMUX_FUNC_PA2_PWM2_CH3 \ (STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL) #define STM32L1X_PINMUX_FUNC_PA2_USART2_TX \ (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP) +#define STM32L1X_PINMUX_FUNC_PA2_ADC1_IN2 \ + STM32_MODER_ANALOG_MODE #define STM32L1X_PINMUX_FUNC_PA3_PWM2_CH4 \ (STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL) #define STM32L1X_PINMUX_FUNC_PA3_USART2_RX \ (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL) +#define STM32L1X_PINMUX_FUNC_PA3_ADC1_IN3 \ + STM32_MODER_ANALOG_MODE #define STM32L1X_PINMUX_FUNC_PA4_SPI1_NSS \ (STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_PULLUP) +#define STM32L1X_PINMUX_FUNC_PA4_ADC1_IN4 \ + STM32_MODER_ANALOG_MODE #define STM32L1X_PINMUX_FUNC_PA5_SPI1_SCK \ (STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL) +#define STM32L1X_PINMUX_FUNC_PA5_ADC1_IN5 \ + STM32_MODER_ANALOG_MODE #define STM32L1X_PINMUX_FUNC_PA6_SPI1_MISO \ (STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN) +#define STM32L1X_PINMUX_FUNC_PA6_ADC1_IN6 \ + STM32_MODER_ANALOG_MODE #define STM32L1X_PINMUX_FUNC_PA7_SPI1_MOSI \ (STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN) +#define STM32L1X_PINMUX_FUNC_PA7_ADC1_IN7 \ + STM32_MODER_ANALOG_MODE #define STM32L1X_PINMUX_FUNC_PA9_USART1_TX \ (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_PULLUP) #define STM32L1X_PINMUX_FUNC_PA10_USART1_RX \ @@ -51,8 +67,12 @@ /* Port B */ #define STM32L1X_PINMUX_FUNC_PB0_PWM3_CH3 \ (STM32_PINMUX_ALT_FUNC_2 | STM32_PUSHPULL_NOPULL) +#define STM32L1X_PINMUX_FUNC_PB0_ADC1_IN8 \ + STM32_MODER_ANALOG_MODE #define STM32L1X_PINMUX_FUNC_PB1_PWM3_CH4 \ (STM32_PINMUX_ALT_FUNC_2 | STM32_PUSHPULL_NOPULL) +#define STM32L1X_PINMUX_FUNC_PB1_ADC1_IN9 \ + STM32_MODER_ANALOG_MODE #define STM32L1X_PINMUX_FUNC_PB3_PWM2_CH2 \ (STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL) #define STM32L1X_PINMUX_FUNC_PB3_SPI1_SCK \ @@ -99,20 +119,40 @@ (STM32_PINMUX_ALT_FUNC_3 | STM32_PUSHPULL_NOPULL) #define STM32L1X_PINMUX_FUNC_PB12_SPI2_NSS \ (STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_PULLUP) +#define STM32L1X_PINMUX_FUNC_PB12_ADC1_IN18 \ + STM32_MODER_ANALOG_MODE #define STM32L1X_PINMUX_FUNC_PB13_PWM9_CH1 \ (STM32_PINMUX_ALT_FUNC_3 | STM32_PUSHPULL_NOPULL) #define STM32L1X_PINMUX_FUNC_PB13_SPI2_SCK \ (STM32_PINMUX_ALT_FUNC_5 | STM32_PUSHPULL_NOPULL) +#define STM32L1X_PINMUX_FUNC_PB13_ADC1_IN19 \ + STM32_MODER_ANALOG_MODE #define STM32L1X_PINMUX_FUNC_PB14_PWM9_CH2 \ (STM32_PINMUX_ALT_FUNC_3 | STM32_PUSHPULL_NOPULL) #define STM32L1X_PINMUX_FUNC_PB14_SPI2_MISO \ (STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN) +#define STM32L1X_PINMUX_FUNC_PB14_ADC1_IN20 \ + STM32_MODER_ANALOG_MODE #define STM32L1X_PINMUX_FUNC_PB15_PWM11_CH1 \ (STM32_PINMUX_ALT_FUNC_3 | STM32_PUSHPULL_NOPULL) #define STM32L1X_PINMUX_FUNC_PB15_SPI2_MOSI \ (STM32_PINMUX_ALT_FUNC_5 | STM32_PUPDR_PULL_DOWN) +#define STM32L1X_PINMUX_FUNC_PB15_ADC1_IN21 \ + STM32_MODER_ANALOG_MODE /* Port C */ +#define STM32L1X_PINMUX_FUNC_PC0_ADC1_IN10 \ + STM32_MODER_ANALOG_MODE +#define STM32L1X_PINMUX_FUNC_PC1_ADC1_IN11 \ + STM32_MODER_ANALOG_MODE +#define STM32L1X_PINMUX_FUNC_PC2_ADC1_IN12 \ + STM32_MODER_ANALOG_MODE +#define STM32L1X_PINMUX_FUNC_PC3_ADC1_IN13 \ + STM32_MODER_ANALOG_MODE +#define STM32L1X_PINMUX_FUNC_PC4_ADC1_IN14 \ + STM32_MODER_ANALOG_MODE +#define STM32L1X_PINMUX_FUNC_PC5_ADC1_IN15 \ + STM32_MODER_ANALOG_MODE #define STM32L1X_PINMUX_FUNC_PC6_PWM3_CH1 \ (STM32_PINMUX_ALT_FUNC_2 | STM32_PUSHPULL_NOPULL) #define STM32L1X_PINMUX_FUNC_PC7_PWM3_CH2 \ @@ -145,5 +185,25 @@ (STM32_PINMUX_ALT_FUNC_3 | STM32_PUSHPULL_NOPULL) #define STM32L1X_PINMUX_FUNC_PE1_PWM11_CH1 \ (STM32_PINMUX_ALT_FUNC_3 | STM32_PUSHPULL_NOPULL) +#define STM32L1X_PINMUX_FUNC_PE7_ADC1_IN22 \ + STM32_MODER_ANALOG_MODE +#define STM32L1X_PINMUX_FUNC_PE8_ADC1_IN23 \ + STM32_MODER_ANALOG_MODE +#define STM32L1X_PINMUX_FUNC_PE9_ADC1_IN24 \ + STM32_MODER_ANALOG_MODE +#define STM32L1X_PINMUX_FUNC_PE10_ADC1_IN25 \ + STM32_MODER_ANALOG_MODE + +/* Port F */ +#define STM32L1X_PINMUX_FUNC_PF6_ADC1_IN27 \ + STM32_MODER_ANALOG_MODE +#define STM32L1X_PINMUX_FUNC_PF7_ADC1_IN28 \ + STM32_MODER_ANALOG_MODE +#define STM32L1X_PINMUX_FUNC_PF8_ADC1_IN29 \ + STM32_MODER_ANALOG_MODE +#define STM32L1X_PINMUX_FUNC_PF9_ADC1_IN30 \ + STM32_MODER_ANALOG_MODE +#define STM32L1X_PINMUX_FUNC_PF10_ADC1_IN31 \ + STM32_MODER_ANALOG_MODE #endif /* ZEPHYR_DRIVERS_PINMUX_STM32_PINMUX_STM32L1X_H_ */ diff --git a/dts/arm/st/l1/stm32l1.dtsi b/dts/arm/st/l1/stm32l1.dtsi index 661b23b50c5..d37baa4c3e6 100644 --- a/dts/arm/st/l1/stm32l1.dtsi +++ b/dts/arm/st/l1/stm32l1.dtsi @@ -112,6 +112,16 @@ label = "UART_1"; }; + adc1: adc@40012400 { + compatible = "st,stm32-adc"; + reg = <0x40012400 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000200>; + interrupts = <18 0>; + status = "disabled"; + label = "ADC_1"; + #io-channel-cells = <1>; + }; + pinctrl: pin-controller@40020000 { compatible = "st,stm32-pinmux"; #address-cells = <1>; diff --git a/soc/arm/st_stm32/stm32l1/dts_fixup.h b/soc/arm/st_stm32/stm32l1/dts_fixup.h index 90db8d701ce..36c7ca4ae07 100644 --- a/soc/arm/st_stm32/stm32l1/dts_fixup.h +++ b/soc/arm/st_stm32/stm32l1/dts_fixup.h @@ -84,5 +84,7 @@ #define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL +#define DT_ADC_1_NAME DT_ST_STM32_ADC_40012400_LABEL + #define DT_RTC_0_NAME DT_INST_0_ST_STM32_RTC_LABEL /* End of SoC Level DTS fixup file */ diff --git a/soc/arm/st_stm32/stm32l1/soc.h b/soc/arm/st_stm32/stm32l1/soc.h index d3000ceb903..2f4887866d9 100644 --- a/soc/arm/st_stm32/stm32l1/soc.h +++ b/soc/arm/st_stm32/stm32l1/soc.h @@ -51,6 +51,10 @@ #include #endif +#ifdef CONFIG_ADC_STM32 +#include +#endif + #if defined(CONFIG_COUNTER_RTC_STM32) #include #include