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gpio_qmsi: Use level sensitive interrupts

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For QMSI drivers with combined interrupts, we need to use level
triggered interrupts. This is the case of the GPIO controller.

If we keep it configured as EDGE, the user will never be able to
get a pin configured as LEVEL to fire more than 1 interrupt.

Change-Id: I36bffc79183ca97f431c4f5811ed5d56e2fd82e8
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
This commit is contained in:
Jesus Sanchez-Palencia 2016-02-01 09:45:57 -02:00 • committed by Anas Nashif
commit 8d0c9124a0
1 changed files with 1 additions and 1 deletions
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2
drivers/gpio/gpio_qmsi.c
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@ -259,7 +259,7 @@ int gpio_qmsi_init(struct device *port)
sys_write32(~(0), reg + PORTA_EOI); sys_write32(~(0), reg + PORTA_EOI);
IRQ_CONNECT(CONFIG_GPIO_QMSI_0_IRQ, CONFIG_GPIO_QMSI_0_PRI, qm_gpio_isr_0, IRQ_CONNECT(CONFIG_GPIO_QMSI_0_IRQ, CONFIG_GPIO_QMSI_0_PRI, qm_gpio_isr_0,
0, IOAPIC_EDGE | IOAPIC_HIGH); 0, IOAPIC_LEVEL | IOAPIC_HIGH);
/* Enable GPIO IRQ and unmask interrupts for Lakemont. */ /* Enable GPIO IRQ and unmask interrupts for Lakemont. */
sys_clear_bit(QM_SCSS_INT_BASE + INT_GPIO_MASK, 0); sys_clear_bit(QM_SCSS_INT_BASE + INT_GPIO_MASK, 0);