drivers: spi: rv32m1_spi: Convert driver to new DT_INST macros
Convert driver to use DT_INST macros and remove related board per instance Kconfig symbol usage. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
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parent
03d48d894d
commit
8c60bc0b07
2 changed files with 35 additions and 140 deletions
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@ -49,16 +49,6 @@ config UART_RV32M1_LPUART
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default y
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depends on SERIAL
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if SPI
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config SPI_0
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default y
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config SPI_1
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default y
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endif # SPI
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config PWM_2
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default y
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depends on PWM
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@ -6,6 +6,8 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT openisa_rv32m1_lpspi
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#include <errno.h>
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#include <drivers/spi.h>
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#include <drivers/clock_control.h>
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@ -276,134 +278,37 @@ static const struct spi_driver_api spi_mcux_driver_api = {
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.release = spi_mcux_release,
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};
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#ifdef CONFIG_SPI_0
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static void spi_mcux_config_func_0(struct device *dev);
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#define SPI_RV32M1_INIT(n) \
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static void spi_mcux_config_func_##n(struct device *dev); \
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\
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static const struct spi_mcux_config spi_mcux_config_##n = { \
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.base = (LPSPI_Type *) DT_INST_REG_ADDR(n), \
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.clock_name = DT_INST_CLOCKS_LABEL(n), \
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.clock_subsys = (clock_control_subsys_t) \
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DT_INST_CLOCKS_CELL(n, name), \
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.irq_config_func = spi_mcux_config_func_##n, \
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.clock_ip_name = INST_DT_CLOCK_IP_NAME(n), \
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.clock_ip_src = kCLOCK_IpSrcFircAsync, \
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}; \
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\
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static struct spi_mcux_data spi_mcux_data_##n = { \
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SPI_CONTEXT_INIT_LOCK(spi_mcux_data_##n, ctx), \
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SPI_CONTEXT_INIT_SYNC(spi_mcux_data_##n, ctx), \
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}; \
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\
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DEVICE_AND_API_INIT(spi_mcux_##n, DT_INST_LABEL(n), \
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&spi_mcux_init, &spi_mcux_data_##n, \
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&spi_mcux_config_##n, \
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POST_KERNEL, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&spi_mcux_driver_api); \
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\
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static void spi_mcux_config_func_##n(struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(n), \
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0, \
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spi_mcux_isr, DEVICE_GET(spi_mcux_##n), 0); \
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irq_enable(DT_INST_IRQN(n)); \
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}
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static const struct spi_mcux_config spi_mcux_config_0 = {
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.base = (LPSPI_Type *) DT_OPENISA_RV32M1_LPSPI_SPI_0_BASE_ADDRESS,
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.clock_name = DT_OPENISA_RV32M1_LPSPI_SPI_0_CLOCK_CONTROLLER,
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.clock_subsys = (clock_control_subsys_t)
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DT_OPENISA_RV32M1_LPSPI_SPI_0_CLOCK_NAME,
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.irq_config_func = spi_mcux_config_func_0,
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.clock_ip_name = kCLOCK_Lpspi0,
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.clock_ip_src = kCLOCK_IpSrcFircAsync,
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};
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static struct spi_mcux_data spi_mcux_data_0 = {
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SPI_CONTEXT_INIT_LOCK(spi_mcux_data_0, ctx),
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SPI_CONTEXT_INIT_SYNC(spi_mcux_data_0, ctx),
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};
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DEVICE_AND_API_INIT(spi_mcux_0, DT_OPENISA_RV32M1_LPSPI_SPI_0_LABEL,
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&spi_mcux_init, &spi_mcux_data_0, &spi_mcux_config_0,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&spi_mcux_driver_api);
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static void spi_mcux_config_func_0(struct device *dev)
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{
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IRQ_CONNECT(DT_OPENISA_RV32M1_LPSPI_SPI_0_IRQ_0,
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DT_OPENISA_RV32M1_LPSPI_SPI_0_IRQ_0_PRIORITY,
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spi_mcux_isr, DEVICE_GET(spi_mcux_0), 0);
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irq_enable(DT_OPENISA_RV32M1_LPSPI_SPI_0_IRQ_0);
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}
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#endif /* SPI_0 */
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#ifdef CONFIG_SPI_1
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static void spi_mcux_config_func_1(struct device *dev);
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static const struct spi_mcux_config spi_mcux_config_1 = {
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.base = (LPSPI_Type *) DT_OPENISA_RV32M1_LPSPI_SPI_1_BASE_ADDRESS,
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.clock_name = DT_OPENISA_RV32M1_LPSPI_SPI_1_CLOCK_CONTROLLER,
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.clock_subsys = (clock_control_subsys_t)
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DT_OPENISA_RV32M1_LPSPI_SPI_1_CLOCK_NAME,
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.irq_config_func = spi_mcux_config_func_1,
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.clock_ip_name = kCLOCK_Lpspi1,
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.clock_ip_src = kCLOCK_IpSrcFircAsync,
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};
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static struct spi_mcux_data spi_mcux_data_1 = {
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SPI_CONTEXT_INIT_LOCK(spi_mcux_data_1, ctx),
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SPI_CONTEXT_INIT_SYNC(spi_mcux_data_1, ctx),
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};
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DEVICE_AND_API_INIT(spi_mcux_1, DT_OPENISA_RV32M1_LPSPI_SPI_1_LABEL,
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&spi_mcux_init, &spi_mcux_data_1, &spi_mcux_config_1,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&spi_mcux_driver_api);
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static void spi_mcux_config_func_1(struct device *dev)
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{
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IRQ_CONNECT(DT_OPENISA_RV32M1_LPSPI_SPI_1_IRQ_0,
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DT_OPENISA_RV32M1_LPSPI_SPI_1_IRQ_0_PRIORITY,
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spi_mcux_isr, DEVICE_GET(spi_mcux_1), 0);
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irq_enable(DT_OPENISA_RV32M1_LPSPI_SPI_1_IRQ_0);
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}
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#endif /* SPI_1 */
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#ifdef CONFIG_SPI_2
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static void spi_mcux_config_func_2(struct device *dev);
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static const struct spi_mcux_config spi_mcux_config_2 = {
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.base = (LPSPI_Type *) DT_OPENISA_RV32M1_LPSPI_SPI_2_BASE_ADDRESS,
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.clock_name = DT_OPENISA_RV32M1_LPSPI_SPI_2_CLOCK_CONTROLLER,
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.clock_subsys = (clock_control_subsys_t)
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DT_OPENISA_RV32M1_LPSPI_SPI_2_CLOCK_NAME,
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.irq_config_func = spi_mcux_config_func_2,
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.clock_ip_name = kCLOCK_Lpspi2,
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.clock_ip_src = kCLOCK_IpSrcFircAsync,
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};
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static struct spi_mcux_data spi_mcux_data_2 = {
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SPI_CONTEXT_INIT_LOCK(spi_mcux_data_2, ctx),
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SPI_CONTEXT_INIT_SYNC(spi_mcux_data_2, ctx),
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};
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DEVICE_AND_API_INIT(spi_mcux_2, DT_OPENISA_RV32M1_LPSPI_SPI_2_LABEL,
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&spi_mcux_init, &spi_mcux_data_2, &spi_mcux_config_2,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&spi_mcux_driver_api);
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static void spi_mcux_config_func_2(struct device *dev)
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{
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IRQ_CONNECT(DT_OPENISA_RV32M1_LPSPI_SPI_2_IRQ_0,
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DT_OPENISA_RV32M1_LPSPI_SPI_2_IRQ_0_PRIORITY,
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spi_mcux_isr, DEVICE_GET(spi_mcux_2), 0);
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irq_enable(DT_OPENISA_RV32M1_LPSPI_SPI_2_IRQ_0);
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}
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#endif /* SPI_2 */
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#ifdef CONFIG_SPI_3
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static void spi_mcux_config_func_3(struct device *dev);
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static const struct spi_mcux_config spi_mcux_config_3 = {
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.base = (LPSPI_Type *) DT_OPENISA_RV32M1_LPSPI_SPI_3_BASE_ADDRESS,
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.clock_name = DT_OPENISA_RV32M1_LPSPI_SPI_3_CLOCK_CONTROLLER,
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.clock_subsys = (clock_control_subsys_t)
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DT_OPENISA_RV32M1_LPSPI_SPI_3_CLOCK_NAME,
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.irq_config_func = spi_mcux_config_func_3,
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.clock_ip_name = kCLOCK_Lpspi3,
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.clock_ip_src = kCLOCK_IpSrcFircAsync,
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};
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static struct spi_mcux_data spi_mcux_data_3 = {
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SPI_CONTEXT_INIT_LOCK(spi_mcux_data_3, ctx),
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SPI_CONTEXT_INIT_SYNC(spi_mcux_data_3, ctx),
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};
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DEVICE_AND_API_INIT(spi_mcux_3, DT_OPENISA_RV32M1_LPSPI_SPI_3_LABEL,
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&spi_mcux_init, &spi_mcux_data_3, &spi_mcux_config_3,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&spi_mcux_driver_api);
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static void spi_mcux_config_func_3(struct device *dev)
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{
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IRQ_CONNECT(DT_OPENISA_RV32M1_LPSPI_SPI_3_IRQ_0,
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DT_OPENISA_RV32M1_LPSPI_SPI_3_IRQ_0_PRIORITY,
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spi_mcux_isr, DEVICE_GET(spi_mcux_3), 0);
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irq_enable(DT_OPENISA_RV32M1_LPSPI_SPI_3_IRQ_0);
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}
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#endif /* CONFIG_SPI_3 */
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DT_INST_FOREACH(SPI_RV32M1_INIT)
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