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uart: update stm32 uart to support LL clock control driver

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After introducing STM32Cube based clock control driver for
stm32 family, update stm32 serial driver to support it.
Once supported across the whole family, a clean up will be done.

Change-Id: I7100bc699e7918c8be71d58091da1860ab734e25
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2017-01-23 17:55:57 +01:00 • committed by Maureen Helm
commit 8c4f2a353f
2 changed files with 25 additions and 4 deletions
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25
drivers/serial/uart_stm32.c
View file

@ -291,11 +291,13 @@ static int uart_stm32_init(struct device *dev)
__uart_stm32_get_clock(dev);
/* enable clock */
#if defined(CONFIG_SOC_SERIES_STM32F1X) || \
defined(CONFIG_SOC_SERIES_STM32F3X) || \
defined(CONFIG_SOC_SERIES_STM32L4X)
#if (defined(CONFIG_SOC_SERIES_STM32F1X) || \
defined(CONFIG_SOC_SERIES_STM32F3X) || \
defined(CONFIG_SOC_SERIES_STM32L4X)) && \
!defined(CONFIG_CLOCK_CONTROL_STM32_CUBE)
clock_control_on(data->clock, config->clock_subsys);
#elif defined(CONFIG_SOC_SERIES_STM32F4X)
#elif defined(CONFIG_SOC_SERIES_STM32F4X) || \
defined(CONFIG_CLOCK_CONTROL_STM32_CUBE)
clock_control_on(data->clock,
(clock_control_subsys_t *)&config->pclken);
#endif
@ -330,6 +332,10 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_1 = {
.irq_config_func = uart_stm32_irq_config_func_1,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
},
#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
.pclken = { .bus = STM32_CLOCK_BUS_APB2,
.enr = LL_APB2_GRP1_PERIPH_USART1 },
#else
#ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART1),
#elif CONFIG_SOC_SERIES_STM32F3X
@ -340,6 +346,7 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_1 = {
#elif CONFIG_SOC_SERIES_STM32L4X
.clock_subsys = UINT_TO_POINTER(STM32L4X_CLOCK_SUBSYS_USART1),
#endif /* CONFIG_SOC_SERIES_STM32FX */
#endif /* CLOCK_CONTROL_STM32_CUBE */
};
static struct uart_stm32_data uart_stm32_dev_data_1 = {
@ -393,6 +400,10 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_2 = {
.irq_config_func = uart_stm32_irq_config_func_2,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
},
#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
.pclken = { .bus = STM32_CLOCK_BUS_APB1,
.enr = LL_APB1_GRP1_PERIPH_USART2 },
#else
#ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART2),
#elif CONFIG_SOC_SERIES_STM32F3X
@ -403,6 +414,7 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_2 = {
#elif CONFIG_SOC_SERIES_STM32L4X
.clock_subsys = UINT_TO_POINTER(STM32L4X_CLOCK_SUBSYS_USART2),
#endif /* CONFIG_SOC_SERIES_STM32FX */
#endif /* CLOCK_CONTROL_STM32_CUBE */
};
static struct uart_stm32_data uart_stm32_dev_data_2 = {
@ -456,6 +468,10 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_3 = {
.irq_config_func = uart_stm32_irq_config_func_3,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
},
#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
.pclken = { .bus = STM32_CLOCK_BUS_APB1,
.enr = LL_APB1_GRP1_PERIPH_USART3 },
#else
#ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART3),
#elif CONFIG_SOC_SERIES_STM32F3X
@ -465,6 +481,7 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_3 = {
#elif CONFIG_SOC_SERIES_STM32L4X
.clock_subsys = UINT_TO_POINTER(STM32L4X_CLOCK_SUBSYS_USART3),
#endif /* CONFIG_SOC_SERIES_STM32F4X */
#endif /* CLOCK_CONTROL_STM32_CUBE */
};
static struct uart_stm32_data uart_stm32_dev_data_3 = {

4
drivers/serial/uart_stm32.h
View file

@ -16,6 +16,9 @@
struct uart_stm32_config {
struct uart_device_config uconf;
/* clock subsystem driving this peripheral */
#if defined(CONFIG_CLOCK_CONTROL_STM32_CUBE)
struct stm32_pclken pclken;
#else
#if defined(CONFIG_SOC_SERIES_STM32F1X) || \
defined(CONFIG_SOC_SERIES_STM32F3X) || \
defined(CONFIG_SOC_SERIES_STM32L4X)
@ -23,6 +26,7 @@ struct uart_stm32_config {
#elif defined(CONFIG_SOC_SERIES_STM32F4X)
struct stm32f4x_pclken pclken;
#endif
#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
};
/* driver data */